CN102664188B - Gallium nitride-based high-electron-mobility transistor with composite buffering layer - Google Patents
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- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 19
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- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims abstract description 5
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical compound [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 claims abstract 2
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- 239000002356 single layer Substances 0.000 claims description 10
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 4
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- 229910052738 indium Inorganic materials 0.000 claims 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 13
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 229910002704 AlGaN Inorganic materials 0.000 abstract 1
- 150000001875 compounds Chemical class 0.000 abstract 1
- -1 gallium nitride compound Chemical class 0.000 abstract 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
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- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 description 1
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
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Abstract
一种具有复合缓冲层的氮化镓基高电子迁移率晶体管，属于半导体器件领域。该晶体管包含衬底（108），氮化铝成核层（107），氮化镓沟道层（201），氮化铝插入层（105），铝镓氮势垒层（104）以及势垒层上形成的源极（101）、漏极（102）和栅极（103），其中源极（101）和漏极（102）与铝镓氮势垒层（104）形成欧姆接触，栅极（103）与铝镓氮势垒层（104）形成肖特基接触，其特征是，它还包含一层位于氮化镓沟道层（201）和氮化铝成核层（107）之间的铝铟氮/氮化镓复合缓冲层（202），以抑制电子在缓冲层内的输运，降低器件缓冲层泄漏电流，提升器件击穿电压与输出功率。
A gallium nitride-based high electron mobility transistor with a compound buffer layer belongs to the field of semiconductor devices. The transistor comprises a substrate (108), an aluminum nitride nucleation layer (107), a gallium nitride channel layer (201), an aluminum nitride insertion layer (105), an aluminum gallium nitride barrier layer (104) and a barrier The source (101), drain (102) and gate (103) formed on the layer, wherein the source (101) and the drain (102) form an ohmic contact with the aluminum gallium nitride barrier layer (104), and the gate (103) forming a Schottky contact with the AlGaN barrier layer (104), characterized in that it also includes a layer between the GaN channel layer (201) and the AlN nucleation layer (107) The aluminum indium nitride/gallium nitride compound buffer layer (202) is used to suppress the transport of electrons in the buffer layer, reduce the leakage current of the buffer layer of the device, and increase the breakdown voltage and output power of the device.
Description
技术领域technical field
一种具有复合缓冲层旳氮化镓基高电子迁移率晶体管，属于半导体器件领域，可以有效降低器件的泄漏电流和提高器件击穿电压。A gallium nitride-based high electron mobility transistor with a composite buffer layer belongs to the field of semiconductor devices and can effectively reduce the leakage current of the device and increase the breakdown voltage of the device.
技术背景technical background
氮化镓基高电子迁移率晶体管(GaN HEMT)不但具有氮化镓材料禁带宽度大、临界击穿电场高、电子饱和漂移速度高、耐高温、抗辐射和良好的化学稳定性等优异特性，同时氮化镓材料可以与铝镓氮（AlGaN）等材料形成具有高浓度和高迁移率的二维电子气沟道，因此特别适用于高压、大功率和高温应用，是电力电子应用最具潜力的晶体管之一。Gallium nitride-based high electron mobility transistor (GaN HEMT) not only has excellent characteristics such as large bandgap width of gallium nitride material, high critical breakdown electric field, high electron saturation drift velocity, high temperature resistance, radiation resistance and good chemical stability. At the same time, gallium nitride materials can form two-dimensional electron gas channels with high concentration and high mobility with materials such as aluminum gallium nitride (AlGaN), so they are especially suitable for high-voltage, high-power and high-temperature applications, and are the most suitable for power electronics applications. One of the potential transistors.
图1为已有技术GaN HEMT结构剖面图，主要包括衬底（108），氮化铝（AlN）成核层（107），氮化镓（GaN）缓冲层（106），氮化铝（AlN）插入层（105），铝镓氮（AlGaN）势垒层（104）以及势垒层上形成的源极（101）、漏极（102）和栅极（103），其中源极（101）和漏极（102）与AlGaN势垒层（104）形成欧姆接触，栅极（103）与AlGaN势垒层（104）形成肖特基接触。但是对于普通GaN HEMT而言，当器件承受耐压时，从源极（101）注入的电子可以经过GaN缓冲层（106）到达漏极（102），形成漏电通道，过大的缓冲层泄漏电流会导致器件提前击穿，使器件的击穿电压远低于理论预期，限制了GaN HEMT的输出能力。Figure 1 is a cross-sectional view of the prior art GaN HEMT structure, which mainly includes a substrate (108), an aluminum nitride (AlN) nucleation layer (107), a gallium nitride (GaN) buffer layer (106), an aluminum nitride (AlN) ) insertion layer (105), aluminum gallium nitride (AlGaN) barrier layer (104) and the source (101), drain (102) and gate (103) formed on the barrier layer, wherein the source (101) The drain electrode (102) forms an ohmic contact with the AlGaN barrier layer (104), and the gate (103) forms a Schottky contact with the AlGaN barrier layer (104). But for ordinary GaN HEMTs, when the device withstands the withstand voltage, the electrons injected from the source (101) can pass through the GaN buffer layer (106) to the drain (102), forming a leakage channel, and the excessive buffer layer leakage current It will lead to premature breakdown of the device, so that the breakdown voltage of the device is much lower than the theoretical expectation, which limits the output capability of GaN HEMT.
在本发明提出以前，为降低器件缓冲层泄漏电流，提高器件击穿电压，通常使用以下方法来实现高阻态缓冲层设计：Before the present invention was proposed, in order to reduce the device buffer layer leakage current and improve the device breakdown voltage, the following methods were usually used to realize the design of the high-resistance buffer layer:
1、在GaN缓冲层（106）内掺入碳、铁等杂质[Eldad Bahat-Treidel et al.，“AlGaN/GaN/GaN:CBack-Barrier HFETs With Breakdown Voltage of Over1kV and Low RON×A”,Transactions onElectron Devices,VOL.57,No.11,3050-3058(2010)]。碳、铁等杂质会在氮化镓材料内引入深能级电子陷阱，俘获从源极注入至缓冲层内的电子，从而降低缓冲层的泄漏电流，但是该技术对器件击穿电压提升有限，无法充分发挥氮化镓材料的耐压优势，该同时碳、铁等杂质引入的深能级陷阱同样会导致诸如器件输出电流下降、电流崩塌效应和反应速度下降等缺点。1. Doping impurities such as carbon and iron in the GaN buffer layer (106) [Eldad Bahat-Treidel et al., "AlGaN/GaN/GaN: CBack-Barrier HFETs With Breakdown Voltage of Over1kV and Low R ON ×A", Transactions on Electron Devices, VOL.57, No.11, 3050-3058 (2010)]. Impurities such as carbon and iron will introduce deep-level electron traps into the gallium nitride material to capture electrons injected from the source into the buffer layer, thereby reducing the leakage current of the buffer layer. However, this technology has limited improvement in the breakdown voltage of the device. It is impossible to fully utilize the withstand voltage advantages of gallium nitride materials. At the same time, the deep energy level traps introduced by impurities such as carbon and iron will also lead to disadvantages such as device output current drop, current collapse effect, and reaction speed drop.
2、使用AlGaN等背势垒缓冲层结构[Oliver Gilt et al.，“Normally-off AlGaN/GaN HFET withp-type GaN Gate and AlGaN Buffer”,Integrated Power Electronics Systems,2010]。AlGaN等背势垒的使用增大了从沟道二维电子气到缓冲层的势垒高度，从而降低了器件缓冲层泄漏电流，但是该技术同样对器件击穿电压提升有限，未能充分体现氮化镓材料的耐压优势，同时AlGaN背势垒不仅在缓冲层和沟道之间由于晶格失配引入陷阱，而且缓冲层中AlGaN和势垒层中AlGaN具有相反的极化效应，会降低沟道二维电子气浓度，增大器件导通电阻。2. Use a back barrier buffer layer structure such as AlGaN [Oliver Gilt et al., "Normally-off AlGaN/GaN HFET withp-type GaN Gate and AlGaN Buffer", Integrated Power Electronics Systems, 2010]. The use of back potential barriers such as AlGaN increases the barrier height from the two-dimensional electron gas in the channel to the buffer layer, thereby reducing the leakage current of the device buffer layer, but this technology also has a limited increase in the breakdown voltage of the device and cannot fully reflect GaN material has the advantage of withstand voltage, and at the same time, the AlGaN back barrier not only introduces traps due to lattice mismatch between the buffer layer and the channel, but also AlGaN in the buffer layer and AlGaN in the barrier layer have opposite polarization effects, which will Reduce the concentration of two-dimensional electron gas in the channel and increase the on-resistance of the device.
3、使用AlGaN/GaN或AlN/GaN等复合缓冲层结构[Manabu Yanagihara et al.，“Recentadvances in GaN transistors for future emerging application”,Phys.Status Solidi A,Vol.206,No.6,1221-1227(2009)]。AlGaN/GaN或AlN/GaN复合结构在缓冲层内引入超晶格能带结构，相比缓冲层掺杂和铝镓氮背势垒结构，该结构可以进一步抑制电子在缓冲层内的输运，提升器件击穿电压，但由于AlGaN和AlN材料与GaN材料的晶格失配同样会破坏缓冲层的晶体结构，引入陷阱和极化电荷，降低器件性能。3. Use composite buffer layer structures such as AlGaN/GaN or AlN/GaN [Manabu Yanagihara et al., "Recent advances in GaN transistors for future emerging application", Phys.Status Solidi A, Vol.206, No.6, 1221-1227 (2009)]. The AlGaN/GaN or AlN/GaN composite structure introduces a superlattice band structure in the buffer layer. Compared with the buffer layer doping and the AlGaN back barrier structure, this structure can further inhibit the transport of electrons in the buffer layer. The breakdown voltage of the device is improved, but the lattice mismatch between AlGaN and AlN materials and GaN materials will also destroy the crystal structure of the buffer layer, introduce traps and polarization charges, and reduce device performance.
4、在[王晓亮等，宽带隙氮化镓基异质结场效应晶体管结构及制作方法，CN100555660C]中公布了一种使用铝（铟）镓氮（AlxInyGazN）超晶格缓冲层的氮化镓基场效应晶体管结构。该结构可以降低材料的晶格缺陷和提高沟道二维电子气迁移率。但是所述的氮化镓基异质结场效应晶体管使用了晶格常数不同的AlxInyGazN超晶格缓冲层，会在缓冲层内引入新的失配应力，引入陷阱和极化电荷。同时它还包括一层位于铝（铟）镓氮超晶格层和高迁移率氮化镓层之间的非有意掺杂或有意掺杂氮化镓高阻层，该高阻层虽然可以减小电子向缓冲层的泄漏，但是对器件击穿电压的提升有限，不能充分发挥氮化镓材料的优势，同时该高阻层内的深能级陷阱会造成器件输出电流下降、电流崩塌效应和反应速度下降。4. In [Wang Xiaoliang et al., Wide Bandgap Gallium Nitride-Based Heterojunction Field Effect Transistor Structure and Fabrication Method, CN100555660C], a superlattice using aluminum (indium) gallium nitride (Al x In y Ga z N) was announced GaN-based field-effect transistor structure with buffer layer. The structure can reduce the lattice defect of the material and improve the two-dimensional electron gas mobility of the channel. However, the GaN-based heterojunction field effect transistor uses an AlxInyGazN superlattice buffer layer with different lattice constants, which will introduce new mismatch stress in the buffer layer , and introduce traps and poles. chemical charge. At the same time, it also includes a non-intentionally doped or intentionally doped GaN high-resistance layer between the Al(In)GaN superlattice layer and the high-mobility GaN layer. Although the high-resistance layer can reduce The leakage of small electrons to the buffer layer, but the improvement of the breakdown voltage of the device is limited, and the advantages of gallium nitride materials cannot be fully utilized. At the same time, the deep energy level traps in the high resistance layer will cause the output current of the device to drop, the current collapse effect and Reaction speed decreased.
发明内容Contents of the invention
本发明的目的是为了抑制电子在缓冲层内的输运，降低器件泄漏电流，从而使器件具有更高的击穿电压，本发明提出了一种使用铝铟氮/氮化镓（AlInN/GaN）复合缓冲层耐压结构的GaN HEMT。与以上方法相比，本发明的主要优势有：（1）在缓冲层内引入超晶格能带结构，阻挡电子向缓冲层内部渗透，降低缓冲层泄漏电流；（2）通过精确控制AlInN中In摩尔组分，可以做到AlInN材料和GaN材料晶格的完美匹配，避免了由于应力引入的缺陷和陷阱；（3）不使用非有意掺杂或有意掺杂的GaN高阻缓冲层，在降低缓冲层泄露电流的同时避免了GaN高阻缓冲层内深能级陷阱对器件性能的影响。The purpose of the present invention is to suppress the transport of electrons in the buffer layer and reduce the leakage current of the device, so that the device has a higher breakdown voltage. ) GaN HEMT with composite buffer layer voltage-resistant structure. Compared with the above methods, the main advantages of the present invention are: (1) Introduce a superlattice energy band structure in the buffer layer to prevent electrons from penetrating into the buffer layer and reduce the leakage current of the buffer layer; (2) Through precise control of AlInN The In molar composition can achieve a perfect match between AlInN material and GaN material lattice, avoiding defects and traps introduced by stress; (3) Do not use unintentionally doped or intentionally doped GaN high-resistance buffer layer, in While reducing the leakage current of the buffer layer, the influence of the deep level traps in the GaN high-resistance buffer layer on the performance of the device is avoided.
本发明提供的氮化镓基高电子迁移率晶体管结构如图2所示，主要包括衬底（108），AlN成核层（107），GaN沟道层（201），AlN插入层（105），AlGaN势垒层（104）以及势垒层上形成的源极（101）、漏极（102）和栅极（103），其中源极（101）和漏极（102）与势垒层（104）形成欧姆接触，栅极（103）与势垒层（104）形成肖特基接触，其特征是，它还包括一层位于GaN沟道层（201）和AlN成核层（107）之间的AlInN/GaN复合缓冲层（202）。该复合缓冲层在AlN成核层（107）之上按GaN/AlInN……GaN/AlInN重复排列直到复合缓冲层所需的厚度，该缓冲层厚度为1μm～8μm。其中AlInN单层厚度为1nm～10nm，GaN单层厚度为10nm～50nm。AlInN/GaN复合缓冲层（202）中AlInN层内In摩尔组分为17%～18%，以确保AlInN材料与GaN材料晶格常数相同。The GaN-based high electron mobility transistor structure provided by the present invention is shown in Figure 2, mainly including a substrate (108), an AlN nucleation layer (107), a GaN channel layer (201), and an AlN insertion layer (105) , the AlGaN barrier layer (104) and the source (101), drain (102) and gate (103) formed on the barrier layer, wherein the source (101) and drain (102) and the barrier layer ( 104) Forming an ohmic contact, the gate (103) and the barrier layer (104) form a Schottky contact, which is characterized in that it also includes a layer between the GaN channel layer (201) and the AlN nucleation layer (107) AlInN/GaN composite buffer layer (202) between them. The composite buffer layer is repeatedly arranged GaN/AlInN...GaN/AlInN on the AlN nucleation layer (107) until the thickness required by the composite buffer layer is 1 μm-8 μm. Wherein the thickness of the AlInN single layer is 1 nm to 10 nm, and the thickness of the GaN single layer is 10 nm to 50 nm. In the AlInN/GaN composite buffer layer (202), the In molar composition in the AlInN layer is 17%-18%, so as to ensure that the AlInN material has the same lattice constant as the GaN material.
根据本发明提供的氮化镓基高电子迁移率晶体管，所述衬底可以是蓝宝石（Al2O3）、碳化硅（SiC）或者硅（Si）；所述AlN成核层（107）的厚度为10nm到3μm，所述GaN沟道层（201）厚度为5nm到2μm；所述AlN插入层（105）厚度为1nm到5nm；所述AlGaN势垒层（104）厚度为10nm到50nm。According to the GaN-based high electron mobility transistor provided by the present invention, the substrate may be sapphire (Al 2 O 3 ), silicon carbide (SiC) or silicon (Si); the AlN nucleation layer (107) The thickness of the GaN channel layer (201) is 5nm to 2μm; the thickness of the AlN insertion layer (105) is 1nm to 5nm; the thickness of the AlGaN barrier layer (104) is 10nm to 50nm.
根据本发明提供的GaN HEMT，所述AlInN/GaN复合缓冲层（202）的能带结构如图3所示，此时缓冲层内的电子输运过程可分为横向输运（沿x方向）和纵向输运（沿y方向），与已有技术GaN缓冲层（106）或AlGaN背势垒相比，电子在y方向的输运受到了限制，其主要的输运机制有两种：第一，热激发传导，即电子获得足够的能量跃迁过AlInN势垒（图中过程a），但在沿着y方向的运动过程中，会与晶格相互作用重新落回到氮化镓势阱中，此时电子需要再一次获得能量才能继续向缓冲层内部输运；第二，多阱连续共振遂穿传导（图中过程b），即电子依次遂穿过多个势阱向缓冲层内部运动，通过合理设计缓冲层参数，可以降电子的这种遂穿几率降至零。这就降低了电子在缓冲层内的渗透深度，减小了器件缓冲层泄漏电流，从而提高了器件击穿电压。According to the GaN HEMT provided by the present invention, the energy band structure of the AlInN/GaN composite buffer layer (202) is shown in Figure 3, at this time, the electron transport process in the buffer layer can be divided into lateral transport (along the x direction) and longitudinal transport (along the y direction), compared with the prior art GaN buffer layer (106) or AlGaN back potential barrier, the transport of electrons in the y direction is restricted, and there are two main transport mechanisms: the first First, thermally stimulated conduction, that is, electrons gain enough energy to jump through the AlInN potential barrier (process a in the figure), but during the movement along the y direction, they will interact with the lattice and fall back to the GaN potential well At this time, electrons need to gain energy again to continue transporting to the buffer layer; second, multi-well continuous resonance tunneling conduction (process b in the figure), that is, electrons sequentially pass through multiple potential wells to the buffer layer Movement, by rationally designing the parameters of the buffer layer, the tunneling probability of electrons can be reduced to zero. This reduces the penetration depth of electrons in the buffer layer, reduces the leakage current of the buffer layer of the device, and thus improves the breakdown voltage of the device.
附图说明Description of drawings
图1是己有技术GaN HEMT结构示意图。主要包括衬底（108），AlN成核层（107），GaN缓冲层（106），AlN插入层（105），AlGaN势垒层（104）以及势垒层上形成的源极（101）、漏极（102）和栅极（103），其中源极（101）和漏极（102）与势垒层（104）形成欧姆接触，栅极（103）与势垒层（104）形成肖特基接触。Figure 1 is a schematic diagram of the GaN HEMT structure in the prior art. It mainly includes a substrate (108), an AlN nucleation layer (107), a GaN buffer layer (106), an AlN insertion layer (105), an AlGaN barrier layer (104) and a source (101) formed on the barrier layer, The drain (102) and the gate (103), wherein the source (101) and the drain (102) form an ohmic contact with the barrier layer (104), and the gate (103) forms a Schottky contact with the barrier layer (104) base contact.
图2是本发明提供的氮化镓基高电子迁移率晶体管结构示意图。主要包括衬底（108），AlN成核层（107），AlInN/GaN复合缓冲层（202），GaN沟道层（201），AlN插入层（105），AlGaN势垒层（104）以及势垒层上形成的源极（101）、漏极（102）和栅极（103）。Fig. 2 is a schematic structural diagram of a gallium nitride-based high electron mobility transistor provided by the present invention. It mainly includes a substrate (108), an AlN nucleation layer (107), an AlInN/GaN composite buffer layer (202), a GaN channel layer (201), an AlN insertion layer (105), an AlGaN barrier layer (104) and a potential A source (101), a drain (102) and a gate (103) are formed on the barrier layer.
图3是本发明提供的GaN HEMT中AlInN/GaN复合缓冲层能带结构与电子纵向输运机制示意图，其中Eg-AlInN为AlInN材料禁带宽度，Eg-GaN为GaN材料禁带宽度。Figure 3 is a schematic diagram of the energy band structure and electron longitudinal transport mechanism of the AlInN/GaN composite buffer layer in the GaN HEMT provided by the present invention, where E g-AlInN is the band gap of the AlInN material, and E g-GaN is the band gap of the GaN material.
图5a是本发明提供的GaN HEMT与已有技术GaN HEMT转移特性比较，其中横坐标为栅极电压（Vg），纵坐标为源漏电流（Ids），实线为本发明晶体管图2使用AlInN/GaN复合缓冲层（202）结构的转移特性，虚线为已有技术晶体管图1使用GaN缓冲层（106）结构的转移特性，器件源漏电压（Vds）为10V。Figure 5a is a comparison of transfer characteristics between the GaN HEMT provided by the present invention and the prior art GaN HEMT, where the abscissa is the gate voltage (V g ), the ordinate is the source-drain current (I ds ), and the solid line is the transistor of the present invention Figure 2 Using the transfer characteristics of the AlInN/GaN composite buffer layer (202) structure, the dotted line is the transfer characteristics of the prior art transistor Fig. 1 using the GaN buffer layer (106) structure, and the source-drain voltage (V ds ) of the device is 10V.
图5b是本发明提供的GaN HEMT与已有技术GaN HEMT截止状态下源漏泄漏电流比较，其中其中横坐标为栅极电压（Vg），纵坐标为源漏泄露电流（Ileak），实线为本发明晶体管图2使用AlInN/GaN复合缓冲层（202）结构的泄漏电流，虚线为已有技术晶体管图1使用GaN缓冲层（106）结构的泄漏电流，器件源漏电压（Vds）为10V。Figure 5b is a comparison of the source-drain leakage current between the GaN HEMT provided by the present invention and the GaN HEMT in the prior art in the cut-off state, where the abscissa is the gate voltage (V g ), and the ordinate is the source-drain leakage current (I leak ). The line is the leakage current of the transistor of the present invention using the AlInN/GaN composite buffer layer (202) structure in Figure 2, the dotted line is the leakage current of the prior art transistor Figure 1 using the GaN buffer layer (106) structure, and the source-drain voltage of the device (V ds ) is 10V.
图6a是本发明带有AlInN/GaN复合缓冲层（202）的垂直器件结构示意图。主要包括衬底（108）、AlInN/GaN复合缓冲层（202）、GaN沟道层（201）以及阳极（601）和阴极（602）两个电极，其中阳极（601）和GaN沟道层（201）、阴极（602）和衬底（108）均形成欧姆接触。Fig. 6a is a schematic diagram of a vertical device structure with an AlInN/GaN composite buffer layer (202) according to the present invention. It mainly includes a substrate (108), an AlInN/GaN composite buffer layer (202), a GaN channel layer (201), and two electrodes, an anode (601) and a cathode (602), wherein the anode (601) and the GaN channel layer ( 201), the cathode (602) and the substrate (108) all form ohmic contacts.
图6b是图6a所示的垂直器件结构电流电压特性比较，其中横坐标为阳极电压（VA），纵坐标为阳极电流（IA），，实线为本发明使用AlInN/GaN复合缓冲层（202）结构的电压电流特性，虚线为巳有技术使用GaN缓冲层（106）结构的电压电流特性。Figure 6b is a comparison of the current-voltage characteristics of the vertical device structure shown in Figure 6a, where the abscissa is the anode voltage (V A ), the ordinate is the anode current (I A ), and the solid line is the AlInN/GaN composite buffer layer used in the present invention The voltage and current characteristics of the (202) structure, the dotted line is the voltage and current characteristics of the existing technology using the GaN buffer layer (106) structure.
具体实施方案specific implementation plan
在本发明中，所述AlInN/GaN复合缓冲层（202）结构中AlInN单层厚度，GaN单层厚度和缓冲层总厚度可以根据具体器件指标要求，使用SENTAURUS、？MEDICI等器件仿真软件确定，以使器件在截止状态下的缓冲层泄漏电流达到最小，最大地提升器件的耐压能力。In the present invention, the AlInN single-layer thickness, GaN single-layer thickness and total buffer layer thickness in the AlInN/GaN composite buffer layer (202) structure can be used according to specific device index requirements, using SENTAURUS, ? Device simulation software such as MEDICI determines to minimize the leakage current of the buffer layer of the device in the off state and maximize the withstand voltage capability of the device.
为验证本发明中所述的AlInN/GaN复合缓冲层（202）结构抑制泄漏电流的效果，分别对使用AlInN/GaN复合缓冲层（202）和GaN缓冲层（106）的GaN HEMT进行了仿真。使用AlInN/GaN复合缓冲层（202）的GaN HEMT中，GaN沟道层（201）厚度为30nm，AlInN/GaN复合缓冲层（202）厚度为3μm，AlInN/GaN复合缓冲层（202）内AlInN单层厚度为5nm，GaN单层厚度为20nm；使用GaN缓冲层（106）的GaN HEMT中，GaN缓冲层（106）厚度为3μm。两种器件其他参数完全相同，具体参数值如表1所示，器件转移特性如图5a所示。In order to verify the effect of the AlInN/GaN composite buffer layer (202) structure described in the present invention in suppressing leakage current, GaN HEMTs using the AlInN/GaN composite buffer layer (202) and the GaN buffer layer (106) were respectively simulated. In the GaN HEMT using the AlInN/GaN composite buffer layer (202), the thickness of the GaN channel layer (201) is 30 nm, the thickness of the AlInN/GaN composite buffer layer (202) is 3 μm, and the AlInN/GaN composite buffer layer (202) is The thickness of the single layer is 5 nm, and the thickness of the GaN single layer is 20 nm; in the GaN HEMT using the GaN buffer layer (106), the thickness of the GaN buffer layer (106) is 3 μm. The other parameters of the two devices are exactly the same, the specific parameter values are shown in Table 1, and the transfer characteristics of the devices are shown in Figure 5a.
从器件转移特性比较可以看出，使用AlInN/GaN复合缓冲层（202）结构的GaN HEMT具有更好的夹断特性，同时在相同的二维电子气浓度下表现出更大的输出电流（栅极电压Vg为1V时，AlInN/GaN复合缓冲层（202）GaN HEMT输出电流为1.30A/mm，而GaN缓冲层（106）GaN HEMT输出电流为1.09A/mm），说明AlInN/GaN复合缓冲层（202）结构具有更好的二维电子气限域性和更小的缓冲层泄漏电流。From the comparison of device transfer characteristics, it can be seen that the GaN HEMT using the AlInN/GaN composite buffer layer (202) structure has better pinch-off characteristics, and at the same time exhibits a larger output current (gate When the electrode voltage V g is 1V, the AlInN/GaN composite buffer layer (202) GaN HEMT output current is 1.30A/mm, while the GaN buffer layer (106) GaN HEMT output current is 1.09A/mm), indicating that the AlInN/GaN composite The buffer layer (202) structure has better two-dimensional electron gas confinement and smaller buffer layer leakage current.
图5b为截止状态下，使用AlInN/GaN复合缓冲层（202）与GaN缓冲层（106）的GaN HEMT源漏泄露电流比较,从图中可以看出，在截止状态下，使用AlInN/GaN复合缓冲层（202）的GaN HEMT源漏泄露电流（实线）比使用GaN缓冲层（106）的GaN HEMT（虚线）下降了约7个数量级，说明AlInN/GaN复合缓冲层（202）有效地抑制了电子在缓冲层内的输运，降低器件缓冲层泄漏电流。Figure 5b is a comparison of GaN HEMT source-drain leakage currents using AlInN/GaN composite buffer layer (202) and GaN buffer layer (106) in the cut-off state. It can be seen from the figure that in the cut-off state, AlInN/GaN composite The GaN HEMT source-drain leakage current (solid line) of the buffer layer (202) is about 7 orders of magnitude lower than that of the GaN HEMT (dashed line) using the GaN buffer layer (106), indicating that the AlInN/GaN composite buffer layer (202) effectively suppresses The transport of electrons in the buffer layer is improved, and the leakage current of the buffer layer of the device is reduced.
表1器件仿真结构参数Table 1 Device Simulation Structure Parameters
为进一步验证AlInN/GaN复合缓冲层（202）结构抑制缓冲层泄漏电流的效果，分别对图6a所示使用本发明AlInN/GaN复合缓冲层（202）和使用已有技术GaN缓冲层（106）垂直器件结构的电流-电压进行了仿真。其中GaN沟道层（201）厚度均为30nm，硅衬底厚度均为0.5μm，使用AlInN/GaN复合缓冲层（202）的垂直结构中，AlInN/GaN复合缓冲层（202）厚度为0.5μm，AlInN/GaN复合缓冲层（202）内AlInN单层厚度为5nm，GaN单层厚度为20nm；使用GaN缓冲层（106）的GaN HEMT中，GaN缓冲层（106）厚度为0.5μm。In order to further verify the effect of the AlInN/GaN composite buffer layer (202) structure on suppressing the leakage current of the buffer layer, the AlInN/GaN composite buffer layer (202) of the present invention and the GaN buffer layer (106) of the prior art shown in FIG. The current-voltage simulation of the vertical device structure was carried out. The thickness of the GaN channel layer (201) is 30nm, and the thickness of the silicon substrate is 0.5μm. In the vertical structure using the AlInN/GaN composite buffer layer (202), the thickness of the AlInN/GaN composite buffer layer (202) is 0.5μm , the AlInN single layer thickness in the AlInN/GaN composite buffer layer (202) is 5nm, and the thickness of the GaN single layer is 20nm; in the GaN HEMT using the GaN buffer layer (106), the thickness of the GaN buffer layer (106) is 0.5μm.
器件仿真结果如图6b所示：巳有技术GaN缓冲层（106）结构其泄漏电流很大（虚线），电流随着电压的增大而线性增大直至饱和；而0.5μm厚的AlInN/GaN复合缓冲层则有效地抑制了泄漏电流（实线），直到200V左右器件的电流才开始缓慢增大。The device simulation results are shown in Figure 6b: the existing GaN buffer layer (106) structure has a large leakage current (dotted line), and the current increases linearly with the increase of voltage until saturation; while the 0.5 μm thick AlInN/GaN The composite buffer layer effectively suppresses the leakage current (solid line), and the current of the device does not begin to increase slowly until about 200V.
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