CN102637498A - Laminated ceramic piezoresistor with core electrode layer unit - Google Patents
Laminated ceramic piezoresistor with core electrode layer unit Download PDFInfo
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- CN102637498A CN102637498A CN2011100640733A CN201110064073A CN102637498A CN 102637498 A CN102637498 A CN 102637498A CN 2011100640733 A CN2011100640733 A CN 2011100640733A CN 201110064073 A CN201110064073 A CN 201110064073A CN 102637498 A CN102637498 A CN 102637498A
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- 239000000919 ceramic Substances 0.000 title claims abstract description 26
- 239000004020 conductor Substances 0.000 claims abstract description 13
- 229910010293 ceramic material Inorganic materials 0.000 claims abstract description 5
- 238000003475 lamination Methods 0.000 claims description 19
- 208000027418 Wounds and injury Diseases 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 208000014674 injury Diseases 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 1
- 239000011469 building brick Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- Thermistors And Varistors (AREA)
Abstract
A laminated ceramic piezoresistor with core electrode layer unit is composed of a laminated body with several laminated body layers made of ceramic material and stacked sequentially, two side electrode layers made of electrically conducting material and arranged at opposite sides of said laminated body, and a core electrode layer unit made of electrically conducting material and arranged in said laminated body in such manner that it is electrically connected to one of said terminal electrodes.
Description
Technical field
The present invention relates to a kind of laminated ceramic electronic building brick, particularly relate to a kind of laminated ceramic piezo-resistance.
Background technology
Consult Fig. 1, existing laminated ceramic piezo-resistance comprises a lamination body 11, two termination electrodes 12, and one group of electrode layer structure 13.This lamination body 11 has several layers of body layer 111 that is made up of ceramic material and piles up in regular turn respectively; Described two termination electrodes 12 are formed on the two opposite sides portion of this lamination body 11 with electric conducting material; This electrode layer structure 13 has several layers of electrode layer 131 that is formed on each body layer 111 and contacts with described two termination electrodes 12 respectively alternately and be electrically connected with the electric conducting material printing; And the orthographic projection that arbitrary electrode layer 131 is in reverse to the end that connects this termination electrode 12 is contained an adjacent time electrode layer 131 and is in reverse to the zone of its end that connects this termination electrode 12 and constitutes electric capacity; Guarantee its capacitance scope by the design of described alternating expression electrode layer 131; And other electrical stablizing; And with the voltage clamp in the circuit in a relatively-stationary range of voltage values, when avoiding the instantaneous voltage surging to produce to the injury of late-class circuit (scheming not shown).
Present laminated ceramic piezo-resistance really can be according to the design of the electrode layer 131 of left and right sides alternating expression, and at Electrostatic Discharge, when burst current produces, and punctures conducting and makes circuit breaker, to reach the purpose of protection late-class circuit.
But; Be subject to the corresponding area that electric capacity is proportional to adjacent two electrode layers; And be inversely proportional to the physical characteristic of the distance of adjacent two electrode layers, therefore, the capacitance of the laminated ceramic piezo-resistance of alternating expression structure can increase along with the increase of electrode layer 131 numbers of plies like this; So under the prerequisite of the ability of keeping required anti-static discharge and anti-burst current, can't the capacitance design be reduced to below the 1pf.
In addition; Left and right sides alternating expression electrode layer 131 structure Design although it is so are exactly originally when the high voltage that continues to receive above design limit, and order free and form and puncture conducting be formed on the metal oxide materials of the electrode layer 131 on the described body layer 111; And then make circuit breaker, reach the protection late-class circuit purpose; But alternating expression design electrode layer 131 structures also can alternately receive the affecting power that left and right two end electrodes 12 is bestowed because of the electrode layer about 131 of left and right sides link electrode 12 continuously when puncturing conducting like this; And accumulate a large amount of heat energy fast, and then cause burning or even cause large-scale whole circuit fire.
Therefore, existing laminated ceramic piezo-resistance needs to improve, and then provides circuit more perfect protection.
Summary of the invention
The object of the present invention is to provide a kind ofly to have low electric capacity, and the safe laminated ceramic piezo-resistance with nuclear core electrode layer unit.
A kind of laminated ceramic piezo-resistance with nuclear core electrode layer unit of the present invention comprises a lamination body, two termination electrodes, two lateral electrode unit, and a nuclear core electrode layer unit.
This lamination body has several layers of body layer that is constituted and piled up in regular turn by ceramic material respectively.
Described two termination electrodes are respectively formed at the two opposite sides portion of this lamination body with electric conducting material.
Described two lateral electrode layer unit are formed in this lamination body with electric conducting material and are up and down that the compartment of terrain contacts and is electrically connected with described two termination electrodes respectively, and are positioned to face than upper strata and the lateral electrode layer unit that be connected with this termination electrode and contain another near the orthographic projection of the part-structure of other end electrode and form electric capacity than the part-structure of the lateral electrode layer unit of lower floor.
This nuclear core electrode layer unit is formed in this lamination body with electric conducting material, and is not arranged in described two termination electrodes and two scopes that lateral electrode layer box limit contiguously with described two termination electrodes and two lateral electrode layer unit.
Preferably, this nuclear core electrode layer unit also have several layers respectively the printing be formed on the different body layer and discontiguous each other nuclear core electrode layer.
Preferably, each lateral electrode layer unit also has one deck printing and is formed on the lateral electrode layer on the body layer.
Preferably, a lateral electrode layer unit exists overlapping in the orthographic projection on this nuclear core electrode layer unit and another lateral electrode layer unit orthographic projection on this nuclear core electrode layer unit.
Preferably, each lateral electrode layer unit also have several layers respectively printing be formed on the lateral electrode layer on the different body layer.
Preferably, a lateral electrode layer unit exists overlapping in the orthographic projection on this nuclear core electrode layer unit and another lateral electrode layer unit orthographic projection on this nuclear core electrode layer unit.
Useful effect of the present invention is: with the nuclear core electrode layer unit that is arranged in the lamination body and is not electrically connected with termination electrode, lateral electrode layer unit; And can be under the specification requirement of fixing apparent size; Significantly reduce the predetermined capacitance of element; Increase the utilization scope of element, simultaneously, arrive above the high voltage of design limit when puncturing conducting continuing to receive; Significantly prolong and receive that left and right two termination electrodes continue electric energy is provided and time of causing the heat energy accumulation or burning late-class circuit, effectively improving safety.
Description of drawings
Fig. 1 is a cross-sectional schematic, and existing laminated ceramic piezo-resistance is described;
Fig. 2 is a cross-sectional schematic, and a kind of one first preferred embodiment with laminated ceramic piezo-resistance of nuclear core electrode layer unit of the present invention is described;
Fig. 3 is a cross-sectional schematic, and a kind of one second preferred embodiment with laminated ceramic piezo-resistance of nuclear core electrode layer unit of the present invention is described.
Embodiment
Below in conjunction with accompanying drawing and two embodiment the present invention is elaborated.
Consult Fig. 2, one first preferred embodiment that the present invention is a kind of to have the laminated ceramic piezo-resistance of nuclear core electrode layer unit comprises a lamination body 21, two termination electrodes 22, two groups of lateral electrode layer unit 23, and one group of nuclear core electrode layer unit 24.
This lamination body 21 has several layers of body layer 211 that is made up of ceramic material and piles up in regular turn respectively.
Described two termination electrodes 22 are respectively formed at the two opposite sides portion of this lamination body 21 with electric conducting material.
Described two groups of lateral electrode layer unit 23 are formed in this lamination body 21 with electric conducting material; And be up and down that the compartment of terrain contacts and is electrically connected with said two end electrodes 22 respectively, and be positioned at and contain another than upper strata and the lateral electrode layer unit 23 that be connected with this termination electrode 22 near the orthographic projection of the part-structure of other end electrode 22 and form electric capacity than the part-structure of the lateral electrode layer unit 23 of lower floor; In the present embodiment; Each lateral electrode layer unit 23 has one deck printing and is formed on the lateral electrode layer 231 on the body layer 211, and is positioned at and contains another than upper strata and the lateral electrode layer 231 that is connected with this termination electrode 22 near the orthographic projection of the part-structure of other end electrode 22 and form the electric capacity with predetermined capacitance value than the lateral electrode layer 231 of lower floor.
This nuclear core electrode layer unit 24 is formed in this lamination body 21 with electric conducting material; And be not arranged in described two termination electrodes 22 and two scopes that lateral electrode layer unit 23 frames are limit contiguously with described two termination electrodes 22 and two lateral electrode layer unit 23; In the present embodiment; This nuclear core electrode layer unit 24 have several layers respectively the printing be formed on the different body layer 211 and discontiguous each other nuclear core electrode layer 241; One lateral electrode layer unit 23 exists overlapping in the orthographic projection on this nuclear core electrode layer unit 24 and another lateral electrode layer unit 23 orthographic projection on this nuclear core electrode layer unit 24, be limited in its scope and should examine core electrode layer unit 24 with described two termination electrodes 22.
Above-mentioned laminated ceramic piezo-resistance with nuclear core electrode layer unit 24; The lateral electrode layer 231 that intermeshes by upper and lower orthographic projection and form the electric capacity of predetermined value; Simultaneously; Cooperate and to have that several layers of nuclear core electrode layer 241 constitute and the nuclear core electrode layer unit 24 that do not contact and when receiving high voltage, surging, static discharge with termination electrode 22, lateral electrode layer unit 23; Mainly cooperate two-layer lateral electrode layer 231 to form the puncture conducting, and then make circuit breaker, to guarantee electrical stablizing by the nuclear core electrode layer 241 that on described body layer 211 and not contact with described termination electrode 22, lateral electrode layer 231; And can avoid injury with the voltage clamp in the circuit in a relatively-stationary range of voltage values to late-class circuit.
Simultaneously; When the high voltage that continues to receive above design limit; Because described nuclear core electrode layer 241 does not contact with termination electrode 22, the lateral electrode layer 231 of both sides; Therefore the affecting power that alternately receives left and right two termination electrodes 22 continuously about not understanding and bestowed and accumulate a large amount of heat energy fast, and then can effectively delay to burn or cause the generation of large-scale whole circuit fire.
Moreover; Though be subject to the corresponding area that electric capacity is proportional to the adjacent electrode layer; And be inversely proportional to the physical characteristic of the distance of adjacent electrode layer; Described laminated ceramic piezo-resistance with nuclear core electrode layer unit 24 forms the electric capacity of predetermined value because of the zone of the lateral electrode layer 231 that only has upper and lower orthographic projection to intermesh, so can under the prerequisite of the ability that does not have influence on anti-static discharge and anti-burst current, capacitance effectively be reduced to below the 1pf.
Consult Fig. 3; A kind of one second preferred embodiment of the present invention with laminated ceramic piezo-resistance of nuclear core electrode layer unit; Similar with above-mentioned first preferred embodiment; Difference only be described two lateral electrode layer unit 23 have respectively several layers respectively printing be formed on the lateral electrode layer 231 on the different body layer 211; Cooperate again whereby to have the nuclear core electrode layer unit 24 that several layers of nuclear core electrode layer 241 constitute and contacts with termination electrode 22, lateral electrode layer unit 23, and can design electric capacity less than 1pf, when guaranteeing to avoid the generation of instantaneous voltage surging to the injury of late-class circuit.
In sum; The present invention is a kind of new laminated ceramic piezo-resistance, by lateral electrode layer unit 23 between the upper and lower at a distance from and be connected and the structural design of the nuclear core electrode layer unit 24 that does not contact away from each other with termination electrode 22, lateral electrode layer unit 23 with termination electrode 22; And clamp down under the electrical functionality prerequisite of voltage not influencing anti-static discharge, surging, reduction; Reduce electric capacity to 1pf, slow down simultaneously when continuing to receive the high voltage that surpasses the design upper limit and after puncturing, accumulate the speed of heat energy because of the electric energy of constantly bestowing; And then delay to burn or cause the generation of large-scale whole circuit fire, so can reach the object of the invention really.
Claims (6)
1. one kind has the laminated ceramic piezo-resistance of examining core electrode layer unit; Comprise: a lamination body, two termination electrodes; And two lateral electrode layer unit; This lamination body has several layers of body layer that is constituted and piled up in regular turn by ceramic material respectively; Described two termination electrodes are respectively formed at the two opposite sides portion of this lamination body with electric conducting material, and described two lateral electrode layer unit are formed in this lamination body with electric conducting material and are up and down that the compartment of terrain contacts and is electrically connected with said two termination electrodes respectively; It is characterized in that:
In described two lateral electrode layer unit; Be positioned at and contain another than upper strata and the lateral electrode layer unit that be connected with one of them termination electrode near the orthographic projection of the part-structure of another termination electrode and be positioned at than the part-structure of the lateral electrode layer unit of lower floor and form electric capacity; And this laminated ceramic piezo-resistance also comprises a nuclear core electrode layer unit; This nuclear core electrode layer unit is formed in this lamination body with electric conducting material, is not arranged in described two termination electrodes and two scopes that lateral electrode layer unit institute frame is limit in contact with described two termination electrodes and two lateral electrode layer unit.
2. the laminated ceramic piezo-resistance with nuclear core electrode layer unit according to claim 1 is characterized in that: this nuclear core electrode layer unit also has several layers and prints respectively and be formed on the different body layer and discontiguous each other nuclear core electrode layer.
3. the laminated ceramic piezo-resistance with nuclear core electrode layer unit according to claim 2, it is characterized in that: each lateral electrode layer unit also has one deck printing and is formed on the lateral electrode layer on the body layer.
4. the laminated ceramic piezo-resistance with nuclear core electrode layer unit according to claim 3, it is characterized in that: a lateral electrode layer unit exists overlapping in the orthographic projection on this nuclear core electrode layer unit and another lateral electrode layer unit orthographic projection on this nuclear core electrode layer unit.
5. the laminated ceramic piezo-resistance with nuclear core electrode layer unit according to claim 2 is characterized in that: each lateral electrode layer unit also have several layers respectively printing be formed on the lateral electrode layer on the different body layer.
6. the laminated ceramic piezo-resistance with nuclear core electrode layer unit according to claim 5, it is characterized in that: a lateral electrode layer unit exists overlapping in the orthographic projection on this nuclear core electrode layer unit and another lateral electrode layer unit orthographic projection on this nuclear core electrode layer unit.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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TW100104298 | 2011-02-09 | ||
TW100104298A TW201234393A (en) | 2011-02-09 | 2011-02-09 | Multi-layer varistor having core electrode unit |
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CN102637498A true CN102637498A (en) | 2012-08-15 |
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CN2011100640733A Pending CN102637498A (en) | 2011-02-09 | 2011-03-17 | Laminated ceramic piezoresistor with core electrode layer unit |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1627452A (en) * | 2003-12-08 | 2005-06-15 | 联顺精密工业股份有限公司 | Method for insulating element surface of chip mode ceramics excess voltage suppressor in multiple layer type |
CN1681053A (en) * | 2004-01-13 | 2005-10-12 | 阿维科斯公司 | High current feedthrough device |
TWI282564B (en) * | 2005-11-10 | 2007-06-11 | Yageo Corp | Surface mount device having a cushioning layer therein and the method of making the same |
WO2010012661A1 (en) * | 2008-07-28 | 2010-02-04 | Epcos Ag | Multilayer component |
WO2010089294A1 (en) * | 2009-02-03 | 2010-08-12 | Epcos Ag | Electrical multilayered component |
-
2011
- 2011-02-09 TW TW100104298A patent/TW201234393A/en unknown
- 2011-03-17 CN CN2011100640733A patent/CN102637498A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1627452A (en) * | 2003-12-08 | 2005-06-15 | 联顺精密工业股份有限公司 | Method for insulating element surface of chip mode ceramics excess voltage suppressor in multiple layer type |
CN1681053A (en) * | 2004-01-13 | 2005-10-12 | 阿维科斯公司 | High current feedthrough device |
TWI282564B (en) * | 2005-11-10 | 2007-06-11 | Yageo Corp | Surface mount device having a cushioning layer therein and the method of making the same |
WO2010012661A1 (en) * | 2008-07-28 | 2010-02-04 | Epcos Ag | Multilayer component |
WO2010089294A1 (en) * | 2009-02-03 | 2010-08-12 | Epcos Ag | Electrical multilayered component |
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TW201234393A (en) | 2012-08-16 |
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Application publication date: 20120815 |