201234393 六、發明說明： 【發明所屬之技術領域】 本發明是有關於-種積層陶£電子元件，特別是指積層 陶瓷壓敏電阻。 【先前技術】 參閱圖1，現有的積層陶瓷壓敏電阻包含一個積層本體 u、二個端電極12，及一組電極層結構13。該積層本體u 具有多數分別由陶瓷材料構成並依序堆疊的本體層m，該 一個端電極12以導電材料形成在該積層本體u的相反兩側 部，該電極層結構13具有多數以導電材料印刷形成在每一 本體層111 _L並交錯地分別與該二端電極12接觸而電連接 的電極層131，且任-電極層131反向於連接該—端電極12 的端部的正投影涵蓋相鄰的次一電極層131反向於其連接 。亥一端電極12的端部的區域而構成電容，藉由該等交錯式 電極層131 @設計確保其電容值範圍，以及其他電性的穩 定，並將電路中的電壓箝制於一個相對固定的電壓值範圍， 避免暫態電壓突波產生時對後級電路（圖未示出）的傷害。 目前的積層陶瓷壓敏電阻確實可以依左右交錯式的電 極層131的設計，而在靜電放電（ESD)、突波電流產生時， 崩潰導通而使電路斷路，以達到保護後級電路的目的。 但疋，焚限於電容正比於相鄰二電極層的對應面積，及 反比於相鄰二電極層的距離的物理特性，因此，這樣交錯式 結構的積層陶瓷壓敏電阻的電容值會隨著電極層131層數 的增加而增加，所以在維持所需的耐靜電放電和耐突波電流 201234393 的能力的前提下’無法將電容值設計降低至ipf以下。 此外，雖然這樣左右交錯式電極層131結構的設計原 本就是在持續受到超過設計限制的高電壓時，令形成在該等 本體層1111的電極層131的金屬氧化物材料游離而形成崩 潰導通’進而使電路斷路、達到保護後級電路的目的，但是， 這樣交錯式設計電極層131結構在崩潰導通時，還會因為左 右連接端電極12的電極層131左右交替地連續受到左、右 二端電極12所施予的電能影響，而快速累積大量的熱能， 進而導致燒毀或甚至引發大規模的整體線路火災。 因此，目則的積層陶瓷壓敏電阻需要改善，進而提供電 路更完善的保護。 ^ 【發明内容】 因此’本發明之目的，即在提供一種具有低電容且安全 性高的具有核芯電極層單元的積層陶瓷壓敏電阻。 於是，本發明一種具有核芯電極層單元的積層陶瓷壓敏 電阻包含-積層本體、二端電極、二側電極單元，及一核芯 電極層單元。 該積層本體具有多數分別由陶究材料構成並依序堆疊 的本體層。 該二個端電極以導電材料分別形成在該積層本體的相 反兩側部。 該二側電極層單元以導電材料形成在該積層本體中並 呈上下間隔地分別與該二端電極接觸而電連接，且位於較上 層並與該一端電極連接的側電極層單元臨靠近另一端電極 201234393 的部分結構的正投影涵蓋另一較下層的側電極層單元的部 分結構而形成電容。 該核芯電極層單元以導電材料形成在該積層本體中，且 不與該二端電極及泫二側電極層單元接觸地位於該二端電 極與該二側電極層單元框限的範圍中。 較佳地’所述的核芯電極層單元具有多數分別印刷形成 在每一本體層上且彼此不接觸的核芯電極層。 較佳地，所述的每一側電極層單元具有一印刷形成在每 一本體層上的側電極層。 較佳地’所述的每一側電極層單元臨靠近未連接的另一 側電極層單元的端部結構的正投影涵蓋該核芯電極層單元 的部分結構。 較佳地’所述的每一側電極層單元具有多數印刷形成在 每一本體層上的側電極層。 較佳地，所述的每一側電極層單元臨靠近未連接的另一 側電極層單元的端部結構的正投影涵蓋該核芯電極層單元 的部分結構。 本發明之功效在於：以位於積層本體中且不與端電極、 側電極層單元電連接的核芯電極層單元的設計，可以在固定 外觀尺寸的規格要求下’大幅降低元件的預設電容值，增加 元件的運用範圍，同時，在持續受到超過設計限制的高電壓 而至崩潰導通時，大幅延長受到左、右二端電極持續提供電 能而導致熱能累積或燒毁後級電路的時間，有效提升安全 201234393 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在1 下配合參考圖式之二個較佳實施例的詳細說明中，將可清楚 的呈現。 在本發明被詳細描述之前，要注意的是，在以下的說明 内容中，類似的元件是以相同的編號來表示。 參閱圖2’本發明一種具有核芯電極層單元的積層陶瓷 壓敏電阻的-第-較佳實施例，包含—個積層本體2ι、二 個端電極22、二組側電極層單元23,及一組核芯電極居： 元24。 該積層本體21具有多數分別由陶究材料構成並 疊的本體層211。 該二個端電極22以導電材料分別形成在該積層本體& 的相反兩側部。 該二組側電極層單元23以導電材料形成在該積層本體 21中’並呈上下間隔地分別與該二端電極22接觸而電連 接’且位於較上層並與該—端電極21連接的側電極層單元 23臨靠近另—端電極21的部分結構的正投影涵蓋另-較下 層的側電極層單元23的部分結構而形成電容；在本例中， 每一側電極層單元23具有—印刷形成在每—本體層2ιι上 的側電極層23卜且位純上層並與該—端電極22連接的 側電極層231臨靠近另一端雷搞&加v 心&電極22的部分結構的正投影涵201234393 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a multilayer electronic component, and more particularly to a laminated ceramic varistor. [Prior Art] Referring to Fig. 1, a conventional laminated ceramic varistor comprises a laminated body u, two terminal electrodes 12, and a set of electrode layer structures 13. The laminated body u has a plurality of body layers m each composed of a ceramic material and sequentially stacked, and the one end electrode 12 is formed of a conductive material on opposite sides of the laminated body u. The electrode layer structure 13 has a plurality of conductive materials. An electrode layer 131 is formed on each of the body layers 111_L and alternately electrically connected to the two terminal electrodes 12, and the orthographic projection of the electrode layer 131 opposite to the end portion connecting the terminal electrodes 12 is covered. The adjacent second electrode layer 131 is opposite to its connection. The area of the end of the electrode 12 at one end constitutes a capacitor, and the interdigitated electrode layer 131 @ design ensures the range of capacitance values, and other electrical stability, and clamps the voltage in the circuit to a relatively fixed voltage. Range of values, to avoid damage to the rear-stage circuit (not shown) when transient voltage surges are generated. The current laminated ceramic varistor can be designed according to the design of the left and right staggered electrode layer 131, and when the electrostatic discharge (ESD) and the surge current are generated, the circuit is broken and the circuit is broken to achieve the purpose of protecting the latter circuit. However, the combustion is limited to the physical properties of the capacitor proportional to the corresponding area of the adjacent two electrode layers and inversely proportional to the distance between the adjacent two electrode layers. Therefore, the capacitance of the multilayer ceramic varistor of such an interleaved structure will follow the electrode. The increase in the number of layers of layer 131 increases, so the capacity value design cannot be reduced below ipf while maintaining the required electrostatic discharge resistance and surge current resistance 201234393. In addition, although the structure of the left and right interleaved electrode layers 131 is originally designed to be continuously subjected to a high voltage exceeding the design limit, the metal oxide material formed on the electrode layers 131 of the body layers 1111 is freed to form a breakdown conduction. The circuit is disconnected to achieve the purpose of protecting the circuit of the latter stage. However, when the structure of the interleaved electrode layer 131 is collapsed and turned on, the electrode layers 131 of the left and right connecting end electrodes 12 are alternately continuously subjected to the left and right end electrodes. The impact of the electrical energy applied by 12, and the rapid accumulation of a large amount of thermal energy, which led to burning or even caused a large-scale overall line fire. Therefore, the multilayer ceramic varistor needs to be improved to provide better protection of the circuit. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a laminated ceramic varistor having a core electrode layer unit having low capacitance and high safety. Thus, a laminated ceramic varistor having a core electrode layer unit of the present invention comprises a laminated body, a two-terminal electrode, two side electrode units, and a core electrode layer unit. The laminated body has a plurality of body layers each composed of a ceramic material and sequentially stacked. The two terminal electrodes are respectively formed of conductive materials on opposite sides of the laminated body. The two-sided electrode layer unit is formed of a conductive material in the laminated body and is electrically connected to the two end electrodes in an upper and lower interval, and the side electrode layer unit located in the upper layer and connected to the one end electrode is adjacent to the other end. The orthographic projection of the partial structure of the electrode 201234393 covers a partial structure of the other lower layer side electrode layer unit to form a capacitance. The core electrode layer unit is formed of a conductive material in the laminated body, and is not in contact with the two-terminal electrode and the two-sided electrode layer unit in a range of the two-terminal electrode and the two-side electrode layer unit. Preferably, the core electrode layer unit has a plurality of core electrode layers respectively formed on each body layer and not in contact with each other. Preferably, each of the side electrode layer units has a side electrode layer printed on each of the body layers. Preferably, the orthographic projection of each of the side electrode layer units adjacent to the end structure of the other side electrode layer unit that is not connected covers a partial structure of the core electrode layer unit. Preferably, each of the side electrode layer units has a plurality of side electrode layers printed on each body layer. Preferably, the orthographic projection of each of the side electrode layer units adjacent to the end structure of the other side electrode layer unit that is not connected covers a partial structure of the core electrode layer unit. The utility model has the advantages that: the design of the core electrode layer unit located in the laminated body and not electrically connected to the terminal electrode and the side electrode layer unit can greatly reduce the preset capacitance value of the component under the requirement of the fixed external dimension. Increase the range of application of the component. At the same time, when the high voltage exceeds the design limit and the crash is turned on, the time for the left and right electrodes to continuously supply power to cause the heat to accumulate or burn the circuit of the latter stage is effectively extended. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Before the present invention is described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals. Referring to FIG. 2, a first preferred embodiment of a multilayer ceramic varistor having a core electrode layer unit includes a laminated body 2, two terminal electrodes 22, and two sets of side electrode layer units 23, and A group of core electrodes are located at: RMB 24. The laminated body 21 has a plurality of body layers 211 each composed of a ceramic material and stacked. The two terminal electrodes 22 are respectively formed on the opposite side portions of the laminated body & The two sets of side electrode layer units 23 are formed of a conductive material in the laminated body 21 and are electrically connected to the two end electrodes 22 and are electrically connected to each other and are located on the upper layer and connected to the end electrode 21 The orthographic projection of the partial structure of the electrode layer unit 23 adjacent to the other end electrode 21 covers a partial structure of the lower-side side electrode layer unit 23 to form a capacitance; in this example, each side electrode layer unit 23 has a printing The side electrode layer 23 formed on each of the body layer 2 and the side electrode layer 231 which is in the upper layer and connected to the terminal electrode 22 is adjacent to the other end of the Leisei & plus v core & Positive projection culvert
另i下層的側電極層231而形成預定電容值的電容。 省核4電極層單元24以導電材料形成在該積層本體U 201234393 中，且不與該二端電極22及 側電極層單元23接觸地位 於该一端電極22與該二侧電極 使’皁疋23框限的範圍中，在 本例中’該核芯電極層單元24具有多數分別印刷形成在每 一本體層211上且彼此不接觸的核芯電極層241，所述的每 一側電極層231臨靠近另一側雷揣 1J冤極層單几23端部的正投影 涵蓋該核芯電極層241對庳素$ — ^ 、 了應罪近该側端電極23的部分區 域，而與二端電極22將該核芯雷搞s s - 0, 发〜蒐極層早兀24限制其於其範 圍中。 上述的具有核芯電極層單元24的積層陶竞壓敏電阻， 藉^上、下正投影互相交錯的側電極層231而形成預定值的 電谷’同時，配合具有多數層核芯電極層241構成且不與端 電極22、側電極層單;^ 23接觸的核芯電極層單元24，而在 受到高電壓、突波、靜電放電時，主要由在該等本體層2ιι 上且不與該等端電極22、側電極層231接觸的核芯電極層 241配合二側電極層231形成崩潰導通’進而使電路斷路，Further, the side electrode layer 231 of the lower layer forms a capacitance of a predetermined capacitance value. The nuclear 4 electrode layer unit 24 is formed of a conductive material in the laminated body U 201234393, and is not in contact with the two-terminal electrode 22 and the side electrode layer unit 23 at the one end electrode 22 and the two side electrodes to make the 'saponin 23 In the range of the frame, in this example, the core electrode layer unit 24 has a plurality of core electrode layers 241 which are respectively formed on each of the body layers 211 and are not in contact with each other, and each of the side electrode layers 231 The orthographic projection near the end of the Thunder 1J 层 单 单 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 涵盖 核 核 核 核 核 核 核 核 核 核 核 核 核 核 核 核 核The electrode 22 engages the core-core ss-0, and the hair-search layer is limited to 24 in its range. The above-mentioned laminated ceramic pressure varistor having the core electrode layer unit 24 forms a predetermined value of the electric valley by the upper and lower projections of the side electrode layers 231 which are interlaced with each other, and is provided with a plurality of core electrode layers 241. The core electrode layer unit 24, which is formed not to be in contact with the terminal electrode 22 and the side electrode layer; 23, is mainly on the body layer 2 ιι and is not subjected to high voltage, surge, or electrostatic discharge. The core electrode layer 241 in which the isotropic electrode 22 and the side electrode layer 231 are in contact with the two-side electrode layer 231 forms a breakdown conduction, thereby breaking the circuit.
以確保電性的穩定’而可將電@中的電壓箝制於一個相對固 定的電壓值範圍’避免對後級電路的傷害。 I 同時，在持續受到超過設計限制的高電壓時，由於該等 核芯電極層241並不與兩側的端電極22、側電極層231接 觸，因此不會左右交替地連續受到左、右二端電極22所施 予的電能影響而快速累積大量的熱能，進而能有效延緩燒毁 或引發大規模的整體線路火災的發生。 再者’雖然受限於電容正比於相鄰電極層的對應面積， 及反比於相鄰電極層的距離的物理特性，所述的具有核芯電 8 201234393 極層單元24的積層陶瓷壓敏電阻因為僅有上、下正浐景，互 相交錯的側電極層231的區域形成預定值的電容因以 在不影響到耐靜電放電㈣突波電流的能力的前提下，將電 容值有效降低至Ipf以下。 參閱圖3,本發明一種具有核芯電極層單元的積層陶瓷 壓敏電阻的一第二較佳實施例，是與上述第一較佳實二列相 似，不同處僅在於二側電極層單元23分別具有多數個別印 刷形成在每一本體層21上的側電極層231，藉此再配合具 有多數層核K電極層241構成且不與端電極22、側電極層 單元23接觸的核芯電極層單元24，而可以小於lpf的電容 設計，確保避免暫態電壓突波產生時對後級電路的傷害。 示上所述本發明主要疋提出一種新的積層陶曼壓敏電 阻藉由側電極層單元2 3上下間隔且彼此遠離地與端電極 22連接，以及不與端電極22、側電極層單元23接觸的核芯 電極層單元24的結構設計，而在不影響耐靜電放電、突波、 降低箝制電壓的電性功能前提下，降低電容至lpf以下，同 時減緩持續受到超過設計上限的高電壓時而崩潰後，因不斷 施予的電能而累積熱能的速度，進而延緩燒毀或引發大規模 的整體線路火災的發生，故確實能達成本發明之目的。 惟以上所述者’僅為本發明之較佳實施例而已，當不能 以此限定本發明實施之範圍，即大凡依本發明申請專利範圍 及發明說明内容所作之簡單的等效變化與修飾，皆仍屬本發 明專利涵蓋之範圍内。 【圖式簡單說明】 201234393 圖1是一剖視示意圖，說明現有的積層陶瓷壓敏電阻； 圖2是一剖視示意圖，說明本發明一種具有核芯電極層 單元的積層陶瓷壓敏電阻的一第一較佳實施例；及 圖3是一剖視示意圖，說明本發明一種具有核芯電極層 單元的積層陶瓷壓敏電阻的一第二較佳實施例。In order to ensure electrical stability, the voltage in the electric @ can be clamped to a relatively fixed range of voltage values to avoid damage to the subsequent circuits. At the same time, when the core electrode layer 241 is not in contact with the terminal electrode 22 and the side electrode layer 231 on both sides, the core electrode layer 241 is not continuously connected to the left and right sides. The electric energy applied by the terminal electrode 22 quickly accumulates a large amount of heat energy, thereby effectively delaying the burning or causing a large-scale overall line fire. Furthermore, although the capacitance is proportional to the corresponding area of the adjacent electrode layer and the physical characteristics inversely proportional to the distance of the adjacent electrode layer, the laminated ceramic varistor having the core layer 8 201234393 pole layer unit 24 Since only the upper and lower positive lands are present, the interdigitated side electrode layer 231 region forms a capacitor of a predetermined value because the capacitance value is effectively reduced to Ipf without affecting the electrostatic discharge (four) surge current capability. the following. Referring to FIG. 3, a second preferred embodiment of a multilayer ceramic varistor having a core electrode layer unit is similar to the first preferred second column except that the two side electrode layer units 23 are different. Each of the side electrode layers 231 formed on each of the body layers 21 is individually printed, and the core electrode layer having the majority of the core K electrode layers 241 and not in contact with the terminal electrodes 22 and the side electrode layer units 23 is further incorporated. Unit 24, which can be smaller than the lpf capacitor design, ensures that damage to the subsequent stage of the circuit is avoided when transient voltage surges are generated. The present invention is mainly directed to a new laminated Tauman varistor connected to the terminal electrode 22 by the side electrode layer unit 2 and spaced apart from each other, and not to the terminal electrode 22 and the side electrode layer unit 23. The structure of the contact core electrode layer unit 24 is designed to reduce the capacitance below lpf while slowing down the high voltage exceeding the design upper limit without affecting the electrostatic discharge resistance, the surge, and the electrical function of reducing the clamping voltage. After the collapse, the speed of the thermal energy is accumulated due to the continuously applied electric energy, thereby delaying the burning or causing a large-scale overall line fire, so that the object of the present invention can be achieved. However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention, All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view showing a conventional laminated ceramic varistor; FIG. 2 is a cross-sectional view showing a multilayer ceramic varistor having a core electrode layer unit of the present invention; A first preferred embodiment; and FIG. 3 is a cross-sectional view showing a second preferred embodiment of a laminated ceramic varistor having a core electrode layer unit of the present invention.
10 201234393 【主要元件符號說明】 11.....積層本體 111 · · · ·本體層 12 .....端電極 13 .....電極層結構 131 · · · ·電極層 21.....積層本體 211——本體層 22 .....端電極 23 .....側電極層單元 2 31 · · · ·側電極層 24 .....核芯電極層單元 241——核芯電極層10 201234393 [Description of main component symbols] 11.....Laminated body 111 · · · · Body layer 12 ..... Terminal electrode 13 ..... Electrode layer structure 131 · · · · Electrode layer 21. ...layer body 211 - body layer 22 ..... terminal electrode 23 ..... side electrode layer unit 2 31 · · · · side electrode layer 24 ..... core electrode layer unit 241 - - core electrode layer