CN102637126B

CN102637126B - Method, device and system for timing embedded system

Info

Publication number: CN102637126B
Application number: CN201110038648.4A
Authority: CN
Inventors: 道远; 黄河清; 马奎; 王刚; 张亮
Original assignee: WUXI RESEARCH AND DEVELOPMENT CENTER OF HIGH-TECH WEINA SENSOR NETWORKS ENGINEERING TECHNOLOGY CAS; Wuxi Sensing Net Industrialization Research Institute
Current assignee: Jiangsu Perceptual Hengan Technology Co ltd
Priority date: 2011-02-15
Filing date: 2011-02-15
Publication date: 2015-05-13
Anticipated expiration: 2031-02-15
Also published as: CN102637126A

Abstract

The invention discloses a method, a device and a system for timing an embedded system. The method comprises the following steps of: receiving a first timing request carrying timer expiration time t1 and a callback function; judging whether a value t2 of a software component of the present time of the system is earlier than the timer expiration time t1; if the t2 is earlier than the t1, judging whether the t1 is up in a present hardware timing period according to the t2 and the timing period of a hardware timer; if the t2 is up in the timing period of the hardware timer, configuring a value of a comparison register to be a hardware component of the expiration time t2; and receiving an expiration pause signal transmitted by the comparison register, and invoking the callback function carried in the first timing request. The timing method of the embodiment of the invention has the advantages of higher timing precision and no need of frequent overflow pause of a hardware timer.

Description

The timing method of embedded system, device and system

Technical field

The present invention relates to embedded system technology field, be specifically related to a kind of timing method of embedded system, device and system.

Background technology

At present, use the technology of Internet of things of embedded system in industry widespread uses such as industry, traffic, medical treatment, electric power.In order to reduce power consumption and improve information transfer efficiency, time division multiple access (TDMA) (the TDMA with periodically sleep mode is often used in technology of Internet of things, Time Division Multiple Access) agreement, and TDMA agreement needs the timer support of high precision, long span.

Existing embedded system provides a kind of software timer, and it produces spilling mainly through configure hardware timer every one period of regular time (such as 1 millisecond) and interrupts, and drive software timing variable realizes clocking capability from Calais.Timings all in embedded system all realizes based on this software timer.

Inventor finds in the process of research prior art, and the time precision of existing software timer is produced the cycle decision of overflowing and interrupting by hardware timer.Can reduce system performance owing to overflowing interruption too frequently, therefore the precision of existing software timer is restricted, and is difficult to the demand meeting high time precision.

Summary of the invention

The invention provides a kind of timing method of embedded system, device and system, high-precision timing can be provided when avoiding hardware timer frequently to overflow interruption.

For solving the problems of the technologies described above, the embodiment of the present invention is achieved through the following technical solutions:

The timing method of the embedded system that the embodiment of the present invention provides, it comprises:

Receive the first timing request, in described first timing request, carry timer expiration time t1 and call back function;

Judge that whether the value t2 of the software components of current time in system is early than described timer expiration time t1;

If t2 is early than t1, then according to judging that whether described t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer;

If t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of described expiration time t1;

Receive the interruption that expires that described comparand register sends, call the call back function carried in described first timing request.

The embodiment of the present invention also provides a kind of timing device of embedded system, and it comprises:

Timing request receiver module, for receiving the first timing request, carries timer expiration time t1 and call back function in described first timing request;

First judge module, is connected with described timing request receiver module, for judging that whether the software components t2 of current time in system is early than described timer expiration time t1;

Second judge module, is connected with described first judge module, at described t2 early than described t1, then according to judging that whether described t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer;

Register arranges module, is connected respectively with comparand register and the second judge module, for when judging that t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of described t1;

Expire interruption processing module, is connected respectively with comparand register and timing request receiver module, for receiving the interruption that expires that described comparand register sends, calls the call back function carried in described first timing request.

The embodiment of the present invention also provides a kind of embedded timing system, and it comprises:

Hardware timer, for producing spilling interruption time-count cycle every hardware;

The software timer be connected with described hardware timer, described software timer is used for the software components interrupting providing the current time in system according to the spilling of described hardware timer;

The comparand register be connected with described hardware timer, described comparand register is used for, when the time set expires, producing the interruption that expires;

First judge module, is connected with described timing request receiver module, software timer respectively, for judging that whether the software components t2 of current time in system is early than described timer expiration time t1;

Register arranges module, is connected respectively with described comparand register, the second judge module, for when t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of described t1;

In the timing method of the embedded system provided in the embodiment of the present invention, if the timer expiration time t1 in timing request expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1 and t1, then comparand register at the hardware component of t1 to after date, be sent to interim disconnected, the embodiment of the present invention is according to the call back function carried in this interrupt call first timing request that expires.Compared with the spilling interrupt cycle only depending on hardware timer with timing accuracy of the prior art, the expiration time of timer is divided into the software components t2 of current time in system and hardware component two parts of t1 by the embodiment of the present invention, the timing accuracy of the embodiment of the present invention can be identical with the precision of the clock of hardware timer, the precision of the clock of hardware timer is higher than the spilling interrupt cycle of hardware timer, therefore the timing accuracy of timing method that provides of the embodiment of the present invention is higher, and does not need hardware timer to overflow interruption frequently.

Accompanying drawing explanation

In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, be briefly described to the accompanying drawing used required in prior art and embodiment below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.

Fig. 1 is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention one provides;

Fig. 2 is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention two provides;

Fig. 3 is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention three provides;

Fig. 4 is the structural representation of the timing device of the embedded timing system that the embodiment of the present invention four provides;

Fig. 5 is the structural representation of the embedded timing system that the embodiment of the present invention five provides;

Fig. 6 is the structural representation of the embedded timing system that the embodiment of the present invention six provides;

Fig. 7 is the method flow diagram of the software components of the embedded timing system acquisition current time in system that the embodiment of the present invention six provides;

Fig. 8 is the method flow diagram of the embedded timing system execution timing request that the embodiment of the present invention provides;

Fig. 9 is the method flow diagram of the embedded timing system process interruption that the embodiment of the present invention provides;

Figure 10 sets the method flow diagram that next expiration time module performs the next timing request in orderly timing queue in the embedded timing system that provides of the embodiment of the present invention;

Figure 11 is that the embedded timing system that the embodiment of the present invention provides performs the method flow diagram cancelling timing request;

Figure 12 is the course of work schematic diagram of the embedded timing system that the embodiment of the present invention provides.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.

The invention provides a kind of timing method of embedded system, device and system.Technical scheme for a better understanding of the present invention, is described in detail embodiment provided by the invention below in conjunction with accompanying drawing.

It is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention one provides see Fig. 1, Fig. 1.

The timing method of the embedded system that the embodiment of the present invention one provides can comprise:

A1, receive the first timing request, in the first timing request, carry timer expiration time t1 and call back function.

Concrete, the timing request be currently received is called the first timing request by the embodiment of the present invention, so that distinguish with subsequently received timing request.Timer expiration time t1 and call back function is carried in first timing request.

A2, judge that whether the value t2 of software components of current time in system is early than timer expiration time t1.

Concrete, the embodiment of the present invention obtains the value t2 of the software components of current time in system, and judges that whether the software components t2 of current time in system is early than timer expiration time t1.If above-mentioned condition meets, then illustrate that this timing request can perform, the present invention continues to perform steps A 3.If above-mentioned condition does not meet, then illustrate that this timing request cannot perform, return timing failure.Wherein, the software components of current time in system is determined according to the spilling of hardware timer interrupt cycle, and its value changes along with the change of hardware time-count cycle, in the embodiment of the present invention, obtains the currency t2 of software components.The hardware component of current time in system was determined according to the clock period of hardware timer.Such as, the current time in system is 1.5 milliseconds, then 1 millisecond is the software components of current time in system, and 0.5 millisecond is then the hardware component of current time in system.Accordingly, timer expiration time also comprises software components and hardware component.

Wherein, arrange comparand register required time to determine according to concrete comparand register.In embodiments of the present invention, the current time in system comprises software components and hardware component, and the software components of current time in system is determined according to the spilling of hardware timer interrupt cycle, and the hardware component of current time in system is determined according to the reading of hardware timer.

If A3 t2 is early than t1, then according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

Concrete, the embodiment of the present invention judged result be t2 early than t1 time, according to judging t1 the time-count cycle of hardware timer in t2 and system whether within Current hardware time-count cycle.If t1 then, then performs steps A 4 within Current hardware time-count cycle.If t1 not within Current hardware time-count cycle then, then show the first timing request timing success, and do not need to process this timing request within Current hardware time-count cycle, can when next hardware arrive time-count cycle, trigger to perform and judge the first timing request whether step (i.e. above-mentioned steps A3) then within Current hardware time-count cycle according to the software components t2 of current time in system and t1.In embodiments of the present invention, by the time-count cycle of hardware timer referred to as hardware time-count cycle.

It should be noted that, the embodiment of the present invention is when returning execution steps A 3, the software components of current time in system there occurs change, the embodiment of the present invention need according to the software components t2 of new current time in system judge the first timing request whether within Current hardware time-count cycle then.

If A4 t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1.

Concrete, in the embodiment of the present invention, the value of the comparand register in hardware is set to the hardware component of t1 so that comparand register at the t4 of setting to after date, turn back to interim breaking.Wherein, the hardware component of t1 equals the time interval t4 of t2 and t1, and the value of comparand register also can be set to the time interval t4 of t2 and t1 by the embodiment of the present invention.

The interruption that expires that A5, reception comparand register send, calls the call back function carried in the first timing request.

Concrete, comparand register turns back to interim disconnected, then the hardware component of t1 is described then, namely the first timing request expires, now calls the call back function carried in the first timing request.

In the timing method of the embedded system provided in the embodiment of the present invention, if the timer expiration time t1 in the first timing request expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1, comparand register arrange time to after date, be sent to interim disconnected, the embodiment of the present invention is according to the call back function carried in this interrupt call first timing request that expires.Compared with the spilling interrupt cycle only depending on hardware timer with the timing accuracy in the software timer of prior art, the expiration time of timer is divided into the software components t2 of current time in system and hardware component two parts of t1 by the embodiment of the present invention, the timing accuracy of the embodiment of the present invention can be identical with the precision of the clock of hardware timer, the precision of the clock of hardware timer is higher than the spilling interrupt cycle of hardware timer, therefore the timing accuracy of timing method that provides of the embodiment of the present invention is higher, and does not need hardware timer to overflow interruption frequently.

It is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention two provides see Fig. 2, Fig. 2.

The timing method of the embedded system that the embodiment of the present invention two provides comprises:

B1, receive the first timing request, in the first timing request, carry timer expiration time t1 and call back function.

B2, judge that whether the software components t2 of current time in system is early than timer expiration time t1.

Wherein, in the embodiment of the present invention, the implementation of step B1-B2 is identical with the steps A 1-A2 in above-described embodiment one, details see above-described embodiment, in this no longer repeated description.

If B3 t2 is early than t1, then the first timing request is joined in orderly timer queue according to the sequencing of expiration time.

Wherein, multiple timing request can be there is in preset orderly timer queue, multiple timing request arranges according to the sequencing of expiration time, and overdue timing request is positioned at the first node of orderly timer queue at first, and last overdue timing request is positioned at the end of queue.

B4, judging whether the first timing request of receiving is positioned at the first node of orderly timer queue, if so, then triggering according to judging t1 whether overdue step within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

Concrete, if the first timing request is positioned at the first node of orderly timer queue, then triggers according to judging t1 whether overdue step within Current hardware time-count cycle the time-count cycle of t2 and hardware timer, namely triggering and performing step B5.

If the first timing request is not positioned at the first node of orderly timer queue, then show temporarily not process the first timing request, the first timing request timing success, returns the handle of timer.

B5, to judge that according to the time-count cycle of t2 and hardware timer whether t1 expires within Current hardware time-count cycle.

If B6 t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1.

The interruption that expires that B7, reception comparand register send, calls the call back function carried in the first timing request.

Wherein, in the embodiment of the present invention, the implementation of step B5-B7 is identical with the steps A 3-A5 in above-described embodiment one, details see above-described embodiment, in this no longer repeated description.

In embodiments of the present invention, by joining in orderly timer queue by the timing request received according to the sequencing of expiration time, multiple timing request can be processed.

Further, the timing method that the embodiment of the present invention provides, after execution step B7, can further include:

B8, from orderly timer queue, delete the first timing request.

Concrete, the embodiment of the present invention, after calling the call back function carried in the first timing request, deletes the first timing request from orderly timer queue.Be arranged in the second timing request after orderly timer queue first timing request after deletion first timing request, be positioned at the first node of orderly timer queue.

B9, obtain the second timing request of the first node of orderly timer queue, in the second timing request, carry timer expiration time t5 and call back function.

Wherein, the call back function carried in the second timing request that explorer obtains is different with the call back function carried in the first timing request.

B10, judge whether then the second timing request according to the value t6 of the software components of current time in system and t5.

Concrete, if judge the second timing request then according to the value t6 of the software components of current time in system and t5, such as the second timing request at deletion first timing request or, in the process of software components obtaining the current time in system then, then perform step B11, otherwise perform step B12.

It should be noted that, the process of embodiment of the present invention execution step B10 implies the step of the value t6 of the software components obtaining the current time in system.

B11, the second timing request then, then call the call back function carried in the second timing request, delete the second timing request from orderly timer queue.

The embodiment of the present invention have invoked the call back function carried in the second timing request, deletes the second timing request from orderly timer queue.

B12, the second timing request not then, then according to judging that whether t5 expires within Current hardware time-count cycle the time-count cycle of t6 and hardware timer.

Concrete, if judge, t5 expires within Current hardware time-count cycle, then perform step B13, otherwise show that the second timing request does not need to process within Current hardware time-count cycle, can when next hardware arrive time-count cycle, trigger to perform and judge the second timing request whether step (i.e. above-mentioned steps B12) then within Current hardware time-count cycle according to t6 and t5.

If B13 t5 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t5.

The interruption that expires that B14, reception comparand register send, calls the call back function carried in the second timing request.

Concrete, the embodiment of the present invention is calling the call back function carried in the second timing request, and the second timing request is finished.

The embodiment of the present invention is by joining in orderly timer queue by the timing request received, and the first node of orderly timer queue is overdue time at first in the timer that arranges of all users.Like this, when a timer is to after date, can obtain immediately and the next one is set and will to expire the expiration time of timer, because do not need to travel through all timers, so greatly save the time arranged needed for next timer.When user sets timer, by the mode inserted in order, timer is inserted orderly timer queue.By using orderly timer queue, set while the timing method that the embodiment of the present invention provides can support multiple expiration time, can be multiplexing by modules, naturally synchronous between each module, do not need the time to change.

The embodiment of the present invention can realize the high-precision timing function of long span, and by using orderly timer queue, set while can supporting multiple expiration time, the scope of application is wider.In addition, the embodiment of the present invention can realize high precision timing based on the comparison passage of hardware timer, extremely low to hardware resource requirements, it is adapted at the rare embedded system of hardware resource realizes, relative to existing software timing method, it is also less that the embodiment of the present invention interrupts expense, realizes cost also lower.

It is the process flow diagram of the timing method of the embedded system that the embodiment of the present invention three provides see Fig. 3, Fig. 3.

The timing method of the embedded system that the embodiment of the present invention three provides mainly comprises:

C1, receive the first timing request, in the first timing request, carry timer expiration time t1 and call back function.

C2, judge that whether the value t2 of software components of current time in system is early than timer expiration time t1, and whether the hardware component of t1 is greater than and arranges comparand register required time t3.

Concrete, the embodiment of the present invention obtains the value t2 of the software components of current time in system, and judge that whether the value t2 of the software components of current time in system is early than timer expiration time t1, and whether the hardware component of t1 is greater than and arranges comparand register required time t3.If above-mentioned two conditions are all satisfied, then illustrate that this first timing request can perform, the present invention continues to perform step C3.If one of above-mentioned two conditions do not meet, then illustrate that this first timing request cannot perform, return timing failure.

Wherein, the software components of current time in system is determined according to the spilling of hardware timer interrupt cycle.Arrange comparand register required time to determine according to concrete comparand register.

If C3 t2 is early than t1, and the hardware component of t1 is greater than t3, then according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

Concrete, the embodiment of the present invention judged result be t2 early than t1, and when the hardware component of t1 is greater than t3, then according to judging t1 the time-count cycle of hardware timer in t2 and system whether within Current hardware time-count cycle.If t1 then, then performs step C4 within Current hardware time-count cycle.If t1 not within Current hardware time-count cycle then, then show the first timing request timing success, and do not need to process this timing request within Current hardware time-count cycle, can when next hardware arrive time-count cycle, trigger to perform and judge the first timing request whether step (i.e. above-mentioned steps C3) then within Current hardware time-count cycle according to the software components t2 of current time in system and t1.

It should be noted that, the embodiment of the present invention is when returning execution step C3, the software components of current time in system there occurs change, the embodiment of the present invention need according to the software components t2 of new current time in system judge the first timing request whether within Current hardware time-count cycle then.

If C4 t1 expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1.

Concrete, in the embodiment of the present invention, the value of the comparand register in hardware is set to the hardware component of t1 so that comparand register at the hardware component of t1 to after date, turn back to interim breaking.

The interruption that expires that C5, reception comparand register send, calls the call back function carried in the first timing request.

In the timing method of the embedded system provided in the embodiment of the present invention, judge whether the hardware component of t1 is greater than by increase and comparand register required time t3 is set, can avoid arranging useless expiration time in comparand register, enhance the stability of the timing method that the embodiment of the present invention provides.

Above the timing method of the embedded system that the embodiment of the present invention provides is described in detail, below at the timing device describing the embedded timing system that the embodiment of the present invention provides.

It is the structural representation of the timing device of the embedded timing system that the embodiment of the present invention four provides see Fig. 4, Fig. 4.

The timing device of the embedded timing system that the embodiment of the present invention four provides comprises: timing request receiver module 110, first judge module 130, second judge module 140, register arrange module 150 and the interruption processing module 160 that expires.

Wherein, timing request receiver module 110, for receiving the first timing request, carries timer expiration time t1 and call back function in the first timing request;

First judge module 130, is connected with timing request receiver module 110, for judging that whether the value t2 of the software components of current time in system is early than timer expiration time t1;

Second judge module 140, is connected with the first judge module 130, at t2 early than t1, then according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer;

Register arranges module 150, is connected respectively with comparand register and the second judge module 140, for when t1 expires within Current hardware time-count cycle, then the value of this comparand register is set to the hardware component of t1;

Expire interruption processing module 160, is connected respectively with comparand register and timing request receiver module 110, for receiving the interruption that expires that comparand register sends, calls the call back function carried in the first timing request.

The timing device of the embedded system that the embodiment of the present invention three provides can be used in the timing method that previous embodiment one provides.In embodiments of the present invention, if the timer expiration time t1 in the first timing request expires within Current hardware time-count cycle, then the value of comparand register is set to the hardware component of t1, comparand register arrange t4 to after date, be sent to interim disconnected, the embodiment of the present invention is according to the call back function carried in this interrupt call first timing request that expires.Compared with the spilling interrupt cycle only depending on hardware timer with the timing accuracy in the software timer of prior art, the expiration time of timer is divided into the software components t2 of current time in system and hardware component two parts of t1 by the embodiment of the present invention, the timing accuracy of the embodiment of the present invention can be identical with the precision of the clock of hardware timer, the precision of the clock of hardware timer is higher than the spilling interrupt cycle of hardware timer, therefore the timing accuracy of timing device that provides of the embodiment of the present invention is higher, and does not need hardware timer to overflow interruption frequently.

Further, the timing device that the embodiment of the present invention provides can also comprise:

Queue adds module 170, is connected with the first judge module 130, for when t2 is early than t1, joins in orderly timer queue by the first timing request according to the sequencing of expiration time;

3rd judge module 180, for judging whether the first timing request received is positioned at the first node of orderly timer queue;

First trigger module 190, respectively with the second judge module 140 and the 3rd judge module 180 are connected, for when the 3rd judge module 180 judges that the first timing request is positioned at the first node of orderly timer queue, trigger the second judge module 140 according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

The timing device that the embodiment of the present invention provides adds module 170, the 3rd judge module 180 and the first trigger module 190 by increasing queue, timing device can be made can to process multiple timing request, further enhancing the function of the timing device that the embodiment of the present invention provides, the adaptability of the timing device that the embodiment of the present invention is provided is wider.

Queue removing module 200, interruption processing module 160 is connected with expiring, and after calling in the interruption processing module 160 that expires the call back function carried in the first timing request, deletes the first timing request from orderly timer queue.

The embodiment of the present invention, by increasing queue removing module 200, after the first timing request is finished, can delete the first timing request from orderly timer queue, thus saves the storage space of storage queue, namely saves the storage space of timing device.

Second trigger module 120, respectively with the second judge module 140, the 3rd judge module 180 are connected, for judging that at the second judge module 140 t1 does not expire within Current hardware time-count cycle, and the 3rd judge module 180 judges that the first timing request is positioned at the first node of orderly timer queue, then when next hardware arrives time-count cycle, trigger the second judge module 140 according to the software components t2 of current time in system and t1 judge the first timing request whether within Current hardware time-count cycle then.

It should be noted that, the content such as information interaction, implementation in above-mentioned embedded timing device between each module, because the timing method embodiment with embedded system of the present invention is based on same design, particular content see describing in the inventive method embodiment, can repeat no more herein.

Above the timing device of the embedded system that the embodiment of the present invention four provides is described in detail, the embedded timing system of the correspondence that the embodiment of the present invention also provides.

See the structural representation that Fig. 5, Fig. 5 are the embedded timing systems that the embodiment of the present invention five provides.

The embedded timing system that the embodiment of the present invention five provides comprises: hardware timer 310, software timer 320, comparand register 330, timing request receiver module 340, first judge module 360, second judge module 370, register arrange module 380 and the interruption processing module 390 that expires.

Wherein, hardware timer 310, for producing spilling interruption time-count cycle every hardware, wherein hardware is relevant with concrete hardware timer for time-count cycle;

Software timer 320 is connected with hardware timer 310, for interrupting according to the spilling of hardware timer 310 software components providing the current time in system;

Comparand register 330 is connected with hardware timer 310, when comparand register 330 is for expiring in the time set, produces the interruption that expires;

Timing request receiver module 340, for receiving the first timing request, carries timer expiration time t1 and call back function in the first timing request;

First judge module 360, is connected with timing request receiver module 340, for judging that whether the value t2 of the software components of current time in system is early than timer expiration time t1;

Second judge module 370, is connected with the first judge module 360, at t2 early than t1, then according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer 310;

Register arranges module 380, is connected respectively with comparand register 330, timing request receiver module 340, for when t1 expires within Current hardware time-count cycle, then the value of comparand register 330 is set to the hardware component of t1;

Expire interruption processing module 390, is connected respectively with comparand register 330 and timing request receiver module 340, for receiving the interruption that expires that comparand register sends, calls the call back function carried in the first timing request.

The embedded timing system provided in the embodiment of the present invention four can be used in the timing method that previous embodiment one provides.In embodiments of the present invention, if the timer expiration time t1 in timing request expires within Current hardware time-count cycle, then register arranges the hardware component that the value of comparand register 330 is set to t1 by module 380.Comparand register 330 is at the hardware component of t1 to after date, and be sent to interim disconnected, the interruption processing module that expires 390 is according to the call back function carried in this interrupt call first timing request that expires.Compared with the spilling interrupt cycle only depending on hardware timer with timing accuracy of the prior art, the expiration time of timer is divided into the software components t2 of current time in system and hardware component two parts of t1 by the timing system that the embodiment of the present invention provides, the timing accuracy of timing device can be identical with the precision of the clock of hardware timer, the precision of the clock of hardware timer is higher than the spilling interrupt cycle of hardware timer, therefore the timing accuracy of embedded timing system that provides of the embodiment of the present invention is higher, and does not need hardware timer to overflow interruption frequently.

Further, the timing system that the embodiment of the present invention provides can also comprise:

Queue adds module 400, is connected with the first judge module 360, at t2 early than t1, and when the hardware component of t1 is greater than t3, the first timing request is joined in orderly timer queue according to the sequencing of expiration time;

3rd judge module 410, for judging whether the first timing request received is positioned at the first node of orderly timer queue;

First trigger module 420, respectively with the second judge module 370 and the 3rd judge module 410 are connected, for when the 3rd judge module 410 judges that the first timing request is positioned at the first node of orderly timer queue, trigger the second judge module 370 according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

The timing device that the embodiment of the present invention provides adds module 400, the 3rd judge module 410 and the first trigger module 420 by increasing queue, timing system can be made to process multiple timing request simultaneously, further enhancing the function of the timing system that the embodiment of the present invention provides, the adaptability of the timing system that the embodiment of the present invention is provided is wider.

Queue removing module 430, interruption processing module 390 is connected with expiring, and after calling in the interruption processing module 390 that expires the call back function carried in the first timing request, deletes the first timing request from orderly timer queue.

The embodiment of the present invention, by increasing queue removing module 430, after the first timing request is finished, can delete the first timing request from orderly timer queue, thus saves the storage space of storage queue, namely saves the storage space of timing system.

It should be noted that, the content such as information interaction, implementation in above-mentioned embedded timing system between each module, because the timing method embodiment with embedded system of the present invention is based on same design, particular content see describing in the inventive method embodiment, can repeat no more herein.

Further, the embedded timing system that the embodiment of the present invention four provides also comprises:

Queue update module 440, respectively with the second judge module 370, queue removing module 430 are connected, after deleting the first timing request at queue removing module 430 from orderly timer queue, then obtain the second timing request of the first node of orderly timer queue, trigger the second judge module 370 and judge that the software components t2 of current time in system is whether early than the expiration time of the second timing request, carries timer expiration time and call back function in the second timing request;

The embedded system that the embodiment of the present invention four provides is by increasing queue update module 440, can make embedded timing system after the first timing request is finished, continue to perform the second timing request in orderly timer queue, the timing request sequentially performed in orderly timer queue can be realized.

Further, software timer 320 in the embedded timing system that the embodiment of the present invention provides, also for having no progeny in the spilling receiving hardware timer 310 transmission, triggers the second timing request that queue update module 440 obtains the first node of orderly timer queue.In embodiments of the present invention, software timer 320 receives in spilling has no progeny, show that the software components of current time in system needs to add 1, software timer 320 obtains the second timing request by triggering queue update module 440, and then first judge module 360 perform and judge the second timing request whether step then according to the software components t6 of current time in system and t5, if then, then perform the second timing request.

Further, the embedded timing system that the embodiment of the present invention provides, also comprises:

Second trigger module 350, be connected with the second judge module 370, for judging that at the second judge module 370 t1 does not expire within Current hardware time-count cycle, then when next hardware arrives time-count cycle, trigger the second judge module 370 according to the software components t2 of current time in system and t1 judge the first timing request whether within Current hardware time-count cycle then.

The embedded timing system that the embodiment of the present invention provides is by increase by second trigger module 350, can in the first timing request no longer Current hardware time-count cycle in overdue situation, when next hardware arrives time-count cycle, again judge the first timing request whether within Current hardware time-count cycle then, so that at the first timing request to after date, embedded timing system performs this timing request.

Further, the embedded timing system that the embodiment of the present invention provides can also comprise:

Timing request cancels module 450, be connected with queue removing module 430, for receiving cancellation timing request, cancel the expiration time t9 carrying in timing request and need the 3rd timing request cancelled, timing request is cancelled module 450 and also from orderly timer queue, is deleted the 3rd timing request for triggering queue removing module 430.

Wherein, above-mentioned queue removing module 430 also for deleting the 3rd timing request from orderly timer queue.

The embedded timing system that the embodiment of the present invention provides cancels module 450 by increasing timing request, and the embedded system that the embodiment of the present invention can be made to provide increases cancels timing function, better adaptability.

Further, in the embedded system that the embodiment of the present invention provides:

Described 3rd judge module 410 is also cancelled module 450 with timing request and is connected, for judging whether the 3rd timing request is positioned at the first node of orderly timer queue;

Second judge module 370 is also connected with the 3rd judge module 410, for when the 3rd judge module 410 judges that the 3rd timing request is positioned at the first node of orderly timer queue, then according to the software components t10 of current time in system with judge that whether t9 expires within Current hardware time-count cycle the time-count cycle of hardware timer;

Register arranges module 380 also for judging that at the second judge module 370 t9 expires within Current hardware time-count cycle, then the value of comparand register 330 emptied;

3rd trigger module 460, respectively module 380 is set with register, queue update module 440 is connected, for arranging after the value of comparand register 330 empties by module 380 at register, trigger the second timing request that queue update module 440 obtains the first node of orderly timer queue.

In the embedded timing system that the embodiment of the present invention provides, register arranges module 380 by the value of comparand register 330 being emptied, and can realize being timed to of cancellation comparand register interim disconnected, thus cancel the 3rd timing request.

Above the embedded system that the embodiment of the present invention four provides being described in detail, for understanding the embodiment of the present invention in more detail, having provided the particular circuit configurations figure of embodiment of the present invention embedded system below.

See the structural representation that Fig. 6, Fig. 6 are the embedded timing systems that the embodiment of the present invention six provides.

The embedded timing system that the embodiment of the present invention six provides comprises external interface, internal module and hardware support three part.It should be noted that, the embedded timing system in the embodiment of the present invention can be called embedded timing system.

The wherein external interface interface that provides timer function to call for other modules of embedded system, it comprises and obtains current time module 1011, and arrange timer module 1012, module 1013 cancelled by timer.Embedded timing system internal module group achieves the function logic that it provides on the basis of hardware support.Hardware support is the clock source driving embedded timing system normally to work, and it at least comprises a hardware timer 1051, comparand register 1052 and interrupts flag 1053.The function of the internal module of embedded timing system is equivalent to the function of above-mentioned embedded timing device, is below described in detail.

Embedded timing system internal module comprises upper-layer functionality logic, bottom interrupt logic and intermediate data structure three class.Corresponding to three functional interfaces that embedded timing system externally provides, upper-layer functionality logic comprises system time acquisition module 1021, and module 1023 cancelled by timer setting module 1022 and timer.Wherein, the function of the timing request receiver module in above-mentioned timing device embodiment, the first judge module, the second judge module is realized by the timer setting module 1022 in the embodiment of the present invention.

Bottom interrupt logic, for the treatment of the interruption that expires of hardware timer 1051, expires and interrupts being divided into expiring according to interruption status interrupting and overflow interrupting two states.Intermediate data structure is software timer 1031, in order timer queue 1032 and interruption status variable 1044.

In the embedded timing system that inventive embodiments provides, obtain the software components of current time module 1011 retrieval system current time, it obtains by the calling system time software components that 1021 modules obtain the current time in system.

User configures a new timer and the handle obtaining new timer by arranging timer module 1012, deploy content comprises the expiration time of timer and the entry address of call back function 1014, so that setting-up time is to after date, timer can call this call back function.Arrange timer module 1012 and receive outside timing request, timing request comprises the expiration time of timer.

Module 1013 cancelled by timer, cancels a timer be in definition status by timer handle.

System time acquisition module 1021 obtains the software variable of current time in system.Current time in system comprises software components and hardware component, and wherein software components is obtained by the reading of reading software timer 1031, and hardware component then obtains by directly reading hardware timer 1051.

Timer setting module 1022 processes the timer that user is arranged.In embodiments of the present invention, orderly timer queue is specially orderly timer queue, and the first judge module in timing device, the second judge module, queue add the function that module, the 3rd judge module, queue removing module and register arrange module and realized by timer setting module 1022.

Timer setting module 1022 by the timer expiration time in newer timing request and orderly timer queue 1032 fastest to time timer expiration time, judge to be inserted into orderly timer queue 1032, or direct control comparand register 1052, expiration time is set.

Timer is cancelled module 1023 and is cancelled the timer set by timer handle.If treat that cancellation timing request is not the first node in orderly timer queue, then directly from orderly timer queue, directly can delete this timer; If first node, then need operation comparand register 1052 and call the next expiration time module 1033 of setting.

It should be noted that, the first judge module, the second judge module, the 3rd judge module, the 4th judge module not clear and definite in the embedded timing system that the embodiment of the present invention five provides, but the corresponding function of these modules all uses in embedded timing system, in the embodiment of the present invention, the function of the first judge module, the second judge module, the 3rd judge module is used in timer setting module 1022.The function of the first judge module also cancels module 1023 at timer, set in the modules such as next expiration time module 1033 and use, and do not enumerate herein.In addition, the first trigger module, the second trigger module, the 3rd trigger module not clear and definite in the embedded timing system that the embodiment of the present invention five provides, but the acting in embedded timing system to have of these functional modules uses, the embodiment of the present invention by above-mentioned first trigger module, the second trigger module function use in timer setting module 1022.The function of the 3rd trigger module uses in timer cancellation module 1023.

In the embedded timing system that the embodiment of the present invention provides, the function of queue update module is specifically realized by the next expiration time module 1033 of setting.Set next expiration time module 1033 and take out first node from orderly timer queue 1032, judge whether expiration time is in Current hardware time-count cycle (corresponding to the first judge module and the second judge module), and comparand register 1052 is set to expiration time or spilling time (module is set corresponding to register), corresponding amendment interruption status variable simultaneously.

The down trigger that interruption processing module 1041 is produced by comparand register 1052, it is triggered to phase interruption processing module 1042 by judging the state of interruption status variable 1044 or overflows interruption processing module 1043.

The interruption processing module that expires 1042 represents that timer expires, and it takes out first node from orderly timer queue, and calls the call back function carried in timing request, and calls the next expiration time module 1033 of setting.

Overflow interruption processing module 1043 and represent that the time-count cycle of hardware timer overflows, its trigger software timer 1031 adds 1, and calls the next expiration time module 1033 of setting.

In the embodiment of the present invention, the software components of current time in system was determined according to the time-count cycle of hardware timer 1051.Software timer 1031 is responsible for the software components of maintenance system current time, and it can interrupt from adding 1 according to the spilling of hardware timer 1051, each from adding after 1, triggers the next expiration time module 1033 of setting.Wherein, software timer 1031 certainly add the spilling cycle that the cycle is hardware timer.

Orderly timer queue 1032 is the data structures storing the timer that user is arranged.The timer that user is arranged arranges according to the sequencing of expiration time, and overdue timer makes number one (first node) at first, and overdue timer is the header element of orderly timer queue at first.Main operation due to timer is inserted and deletes, so have employed the data structure of chained list; And timer needs when expiring to find out overdue timer as early as possible from timer chain meter, therefore have employed the mode of sequential chained list, the first node of chained list is exactly overdue timer, eliminates and travels through the time delay of whole chained list and the uncertainty of time delay.

The interruption being all multiplexing comparand register 1052 due to spilling interruption and the interruption that expires realizes, and the embedded timing system that therefore embodiment of the present invention provides distinguishes interrupt type by interruption status variable 1044.Interruption status variable is modified by the next expiration time module 1033 of setting.

For understanding the embedded timing system that the embodiment of the present invention provides in more detail, below provide the concrete implementation of timing request.

With reference to figure 7 to Figure 11, describe the specific implementation flow process of each inside modules of the embodiment of the present invention in detail.

In order to ensure the stable operation of embedded timing system, the module in the embodiment of the present invention enters Shi Douhui and enters atomic operation, and exits atomic operation when returning.

It is the method flow diagram of the software components of the embedded timing system acquisition current time in system that the embodiment of the present invention provides see Fig. 7, Fig. 7.

The embedded timing system that the embodiment of the present invention provides needs the software components repeatedly obtaining the current time in system, and acquisition methods comprises:

First S601, system time acquisition module 1021 read hardware timer, are designated as the software components of current time in system, and read interruption flag.

The state of S602, judgement interruption flag.

Concrete, system time acquisition module 1021 judges whether interrupt flag is set, and whether the interruption status variable interrupting being designated is wait for overflow status.

Be set if S603 interrupts flag, and interruption status variable overflows for waiting for, the then reading of system time acquisition module 1021 reading software timer 1031, and the reading in software timer 1031 is added 1, the software components of current time in system is software timer 1031 and adds the reading after 1.

If S604 interruption status variable 1044 is not wait for overflowing, or interruption flag is not set, then the software components of current time in system is exactly the reading of software timer 1031.

The software components of S605, retrieval system current time.

The embodiment of the present invention is by judging the state of interrupting flag, can be called in the process of system time acquisition module 1021 in interrupt mask, and the spilling that this interrupt mask process just spans comparand register 1052 is interrupted, then software timer 1031 should add 1 and but not add, and system time acquisition module 1021 can by checking that interrupting flag compensate this nonsynchronous situation.

See the method flow diagram that Fig. 8, Fig. 8 are the embedded timing system execution timing request that the embodiment of the present invention provides.

Timer module 1012 is set and imports timing request into, in this timing request, carry timer expiration time t1 and call back function.

As shown in Figure 8, the method for embedded timing system execution timing request comprises:

The value t2 of S701, the software components of acquisition current time in system.

Concrete, system time acquisition module 1021 obtains the value t2 of the software components of current time in system.

S702, judge that whether the software components t2 of current time in system is early than expiration time t1, and whether the hardware component of t1 is greater than and arranges comparand register required time t3.

Concrete, if timer setting module 1022 judges that expiration time t1 is before the software components t2 of current time in system, or the hardware component of t1 is too little (namely expiration time is too fast), is less than and arranges comparand register required time t3, then return null pointer; Otherwise, illustrate that this timing request can perform, perform step S703.

This new timer is inserted orderly timer queue by the mode inserted in order by S703, timer setting module 1022.

Concrete, timer setting module 1022 is by the expiration time t1 carried in timing request and get back to function and all insert in newly assigned timer, is then inserted in orderly timer queue according to the sequencing of expiration time by new timer.

S704, timer setting module 1022 judge whether this new timer is positioned at first of queue.

Concrete, if if judge that new timer is not in the position of queue heads, then return timing success, and the handle of this timer returned to user; Otherwise, perform step S705.

S705, timer setting module 1022 judge whether new timer expires at Current hardware time-count cycle.

Concrete, timer setting module 1022, according to the hardware time-count cycle of new timer expiration time t1, the software components t2 of current time current time in system and hardware timer 1051, judges whether timer expires at Current hardware time-count cycle.If cross this new timer not to expire time-count cycle at Current hardware, then return timing success, and return the handle of time timer; Otherwise, perform step S706.

S706, the value of comparand register 1052 is revised as the hardware component of t1, and to arrange interruption status variable be that wait expires interruption status.

Concrete, the embodiment of the present invention after being provided with comparand register 1052 and interruption status variable 1044, can also return timing success.

In the embodiment of the present invention, the value of comparand register 1052 is revised as the hardware component of t1 by timer setting module 1022, and comparand register 1052 can be made when the hardware component of t1 arrives, and is sent to interim disconnected to interruption processing module 1041.

See the method flow diagram that Fig. 9, Fig. 9 are the embedded timing system process interruptions that the embodiment of the present invention provides.

The method that the embedded timing system process that the embodiment of the present invention provides is interrupted comprises:

S801, interruption processing module 1041 obtain interruption status variable, determine whether that wait expires interruption status.

Concrete, comparand register 1052 produces expire interruption or hardware timer 1052 and produces the interruption that expires, then interruption flag 1053 is carried out set.Interruption processing module 1041 is had no progeny in receiving, and the state according to interruption status variable 1044 carries out respective handling.To expire interruption status if the state of interruption status variable 1044 is wait, then perform step S802, namely start execution and to expire interrupt processing, otherwise perform step S806, namely start to perform and overflow interrupt processing.

S802, from orderly timing queue, take out first node.

Concrete, timer setting module 1022 (is specially timer chain meter) from orderly timing queue, takes out first node, this first node and overdue timer.

S803, call the call back function of timer.

Concrete, function callback module 1014 calls the call back function of overdue timer, and usual call back function is very short, only sends an event to task manager, then returns immediately.Call back function is finished, then this timing request is finished.

The space of S804, timer setting module 1022 release timer.

In the embedded timing system that the embodiment of the present invention provides, interrupt producing before arranging next timer here from expiring of comparand register 1052, hardware timer 1051 is still in operation, and likely cross over overflow value, so need to compare the timer expiration time being positioned at first node in time of Current hardware timer 1051 and chained list here, judge that whether by leap in the past the spilling time, namely performs step S805.

S805, timer setting module 1022 judge whether above-mentioned timer expiration time crosses over spilling point break period of hardware timer 1051.

Concrete, interrupt if timer setting module 1022 judges that hardware timer 1051 there occurs to overflow, then call immediately and overflow interruption processing module 1043, perform step S806, otherwise, perform step S807.In embodiments of the present invention, by judging whether above-mentioned timer expiration time crosses over the spilling interrupt event point of hardware timer, can avoid losing this to come and the interruption of the spilling in future, cause system time software variable mistake, to such an extent as to accurately can not reflect system time.

S806, spilling interruption processing module 1043 perform and overflow interrupt processing.

Concrete, overflow if occur and interrupt, then overflow interruption processing module 1043 trigger software timer 1031 from adding 1, and call next expiration time module 1033 and perform next timing request, namely perform step S807.

S807, set next expiration time module 1033 and perform next timing request.

Wherein, set the next timing request that next expiration time module 1033 performs in timer chain meter to describe in detail in follow-up embodiment.

Set the method flow diagram that next expiration time module performs the next timing request in orderly timing queue in the embedded timing system that provides of the embodiment of the present invention see Figure 10, Figure 10.

The method setting the next timing request that next expiration time module 1033 performs in orderly timing queue in the embedded timing system that the embodiment of the present invention provides mainly comprises:

First node is taken out in S901, in order timing queue.

Concrete, next expiration time module 1033 is set from orderly timing queue (timer chain meter), obtains timer in first node, if timer chain meter is empty, then comparand register is set to overflow value, and interruption status variable is set for waiting for that spilling is interrupted, then end operation.If timer chain meter is not empty, then obtain the timing request of chain heading node, perform step S902.Wherein, expiration time and call back function is carried in timing request.

S902, judge timer expiration time whether mistake.

Concrete, next expiration time module 1033 is set and judges timer expiration time whether mistake according to the software components of current time in system.If expiration time is mistake, then perform step S903, namely call the interruption processing module that expires, then end operation.If expiration time did not have, then performed step S904.

S903, call interruption processing module perform interrupt processing.

Wherein, next expiration time module 1033 is set and calls the associated description of process see above-mentioned step S801-S807 that interruption processing module 1041 performs interrupt processing, in this no longer repeated description.

S904, judge that whether timer expires within Current hardware time-count cycle.

Concrete, above-mentioned deterministic process comprises: judge whether the hardware component of timer expiration time is greater than the time arranging comparand register, the time of comparand register is set if be greater than, then judge that whether timer expiration time expires within Current hardware time-count cycle further, if so, then step S905 is performed.Otherwise, perform step S906.Wherein, the deterministic process in step S904 can be realized by the first judge module in the embodiment of the present invention and the second judge module, and the function of the first judge module and the second judge module can be included in and arrange in next expiration time module 1033.

S905, the value of comparand register is set to the hardware component of expiration time.

In embodiments of the present invention, the value of comparand register 1052 is set to the hardware component of expiration time by timer setting module 1022, and interruption status variable 1044 be set for wait expire interruption so that comparand register 1052 in the time arranged to after date, change interruption flag.

S906, comparand register is set to overflow value, and interruption status variable is set interrupts for waiting for overflowing.

Concrete, if timer setting module 1022 judges that expiration time is not equal to the software components of current time in system, then represent that timer expiration time is after Current hardware time-count cycle, therefore comparand register 1052 is set to overflow value, and interruption status variable is set for waiting for that spilling is interrupted, then end operation.

See the method flow diagram that Figure 11, Figure 11 are the embedded timing system execution cancellation timing request that the embodiment of the present invention provides.

As shown in figure 11, the embedded timing system that the embodiment of the present invention provides performs the method cancelling timing request and mainly comprises:

S1001, timer are cancelled module 1023 and are received the timer cancellation request that module 1013 transmission cancelled by timer.

Concrete, embedded timing system can receive the timer cancellation request that module 1013 transmission cancelled by timer, then performs step S1002.Wherein, the expiration time carrying in timing request and need the timing request cancelled is cancelled.

S1002, judge whether timing request to be cancelled is positioned at the first node of timer chain meter.

Concrete, the handle obtained when timer cancels module 1023 by arranging timer cancels corresponding timer.Timer cancels module 1023 at the first node obtaining timer chain meter, if judge that timer chain meter is as empty, then return mistake; Otherwise judge that whether timer to be cancelled is exactly the first node of timer chain meter.

If wait that cancelling timing request is not first node, then perform step S1003, otherwise, perform step S1004.

S1003, judge whether timing request to be cancelled is arranged in timer chain meter.

Concrete, timer cancels module 1023 judging to wait to cancel the first node that timing request is not positioned at timer chain meter, then judge whether timing request to be cancelled is arranged in timer chain meter further.If timing request to be cancelled is arranged in timer chain meter, then perform step S1005.Wait that if judge cancelling timing request is be not in timer chain meter, then returning mistake, is likely repeat cancellation to cause.

S1004, delete from timer chain meter wait cancel timing request, release storage space.

Concrete, timer is cancelled module 1023 and is being judged that, when cancellation timing request is first node, delete from timer chain meter and wait to cancel timing request, release storage space, then performs step S1006.

S1005, delete from timer chain meter wait cancel timing request, release storage space.

Concrete, timer is cancelled module 1023 and is being judged to wait to cancel the first place that timing request is not positioned at timer chain meter, but is arranged in timer chain meter, then delete in timer chain meter and wait to cancel timing request, release storage space, then returns and cancels timer success message.

S1006, judge to wait whether cancel timing request expires.

Concrete, timer is cancelled module 1023 and is being judged when cancellation timing request is first node, delete from timer chain meter after cancellation timing request, further judge this wait cancel timing request whether expire, judge to treat that cancellation timing request is not yet due if module 1023 cancelled by timer, then perform step S1007, otherwise perform step S1009.

S1007, judge to wait to cancel timing request whether within Current hardware time-count cycle then.

Concrete, timer is cancelled module 1023 and is being judged, when to cancel timing request be first node, to delete from timer chain meter after cancellation timing request, judge further to wait to cancel timing request whether within Current hardware time-count cycle then.If module 1023 cancelled by timer judge that this waits to cancel timing request within Current hardware time-count cycle then, then perform step S1008, otherwise return and cancel timer success message.

S1008, the next timing request arranged in timer chain meter.

Concrete, timer is cancelled module 1023 and is being judged to wait to cancel timing request within Current hardware time-count cycle then, then shot timers setting module 1022 before the value of comparand register 1052 is temporarily set to Current hardware timer periods little by little, prevent from producing less desirable interruption to arranging in next timing request (step S1012) in following operating process.

S1009, interruption flag to be emptied.

Concrete, judge to wait that cancelling timing request expires, then empty interruption flag, then perform step S1010 if module 1023 cancelled by timer.

S1010, judge the current time in system hardware component whether or the time point overflowing and interrupt will be crossed over.

Concrete, timer cancels module 1023 after interruption flag being emptied, whether the further hardware component judging the current time in system of the display of hardware timer 1051 is or will cross over the time point overflowing and interrupt, if spanned the time point overflowing and interrupt, then perform step S1011, if the time point overflowing and interrupt will be crossed over, then wait for and perform step S1011 after crossing over.If the hardware component of the current time in system of hardware timer 1051 not will cross over the time point overflowing and interrupt, then perform step S1012.

In embodiments of the present invention, judge whether that the thresholding that will cross over sets according to calling the instruction cycle of overflowing interruption code.

S1011, call interruption processing module perform overflow interrupt processing.

Concrete, timer cancels module 1023 when the hardware component of the current time in system judging hardware timer 1051 has crossed over the time of overflowing and interrupting, or judging that the hardware component of hardware timer 1051 will cross over the time point overflowing and interrupt, then after wait is crossed over, call interruption processing module 1041 and perform spilling interrupt processing.Wherein, interruption processing module 1041 performs the process of spilling interrupt processing see the associated description of above-mentioned steps S801-S807, no longer repeats at this.

S1012, next timing request is set.

Concrete, timer cancels module 1023 judging that the hardware component of the current time in system that hardware timer 1051 shows not will cross over the time point overflowing and interrupt, then call and arrange next expiration time module 1033, and return successfully.

For further understanding the embodiment of the present invention, provide the typical operation of the embedded timing system that the embodiment of the present invention provides below.

See the course of work schematic diagram that Figure 12, Figure 12 are the embedded timing systems that the embodiment of the present invention provides.

At initial phase, comparand register is set to overflow and interrupts, and overflows after the time point interrupting producing is hardware timer timing to 0xFFFF, before 0x0000, so from 0x0000, terminate to 0xFFFF a hardware time-count cycle.

Here suppose that embedded system does not support dynamic memory distribution, therefore have employed the method for static resource allocation: system initialisation phase creates an empty timer array, and generate empty timer chain meter, when setting timer, call timer_alloc from empty timer chain meter, take out an empty timer, the mode by inserting in order after inserting expiration time and call back function inserts timer chain meter.Same at initial phase, user sets four timers, inserts timer chain meter according to the sequencing of expiration time.It is pointed out that if embedded system supports dynamic memory distribution, also can dynamically allocation and reclaiming resource space.

When the spilling arranged upon initialization interrupts producing, first software timing variable is added 1 by embedded timing system module, visit again the first node timer 1 in timer chain meter, and find that its expiration time is in Current hardware time-count cycle, so comparand register to be set to the hardware component of timer 1 expiration time, and interruption that interruption status variable set up is become to expire.

When interrupting producing when expiring, timer 1 is ejected again from timer chain meter, call its call back function, then the first node timer 2 in timer chain meter is accessed, find that its expiration time is still in Current hardware time-count cycle, so comparand register to be set to the hardware component of timer 2 expiration time, and interruption that interruption status variable set up is become to expire.

When interrupting producing when expiring, timer 2 is ejected from timer chain meter, call its call back function, then the first node timer 3 in timer chain meter is accessed, find that its expiration time is not in Current hardware time-count cycle, so comparand register is set to overflow time point, and interruption status variable set up is become to overflow interruption.

When overflowing interruption and producing, first software timing variable is added 1, visit again the first node timer 3 in timer chain meter, and find that its expiration time is in Current hardware time-count cycle, so comparand register to be set to the hardware component of timer 3 expiration time, and interruption that interruption status variable set up is become to expire.

The rest may be inferred, and when the interruption of comparand register produces, all need that setting is next compares the value of depositing it wherein in disconnected process function, this value may be interruptions that expire, and also may be to overflow interruption, and this drives timing and the timing of embedded timing system.

The beneficial effect of the present invention's mixing timer is, it not only can realize the high-precision timing of long span and clocking capability, can also multiplexing by modules, support multiple timer while set; And, it need only use one in MCU in a hardware timer to compare passage, the lowest to hardware resource, therefore it is adapted at the rare embedded system of hardware resource realizes, and use system cross platform transplantability of this mixing timer very strong, and its to break pin also fewer than general software timer many.

One of ordinary skill in the art will appreciate that all or part of flow process realized in above-described embodiment method, that the hardware that can carry out instruction relevant by computer program has come, program can be stored in computer read/write memory medium, this program, when performing, can comprise the flow process of the embodiment as above-mentioned each side method.Wherein, storage medium can be magnetic disc, CD, read-only store-memory body (Read-Only Memory, ROM) or random store-memory body (Random Access Memory, RAM) etc.

Above the timing method of the embedded system that the embodiment of the present invention provides, device and system are described in detail, for one of ordinary skill in the art, according to the thought of the embodiment of the present invention, all will change in specific embodiments and applications, this description should not be construed as limitation of the present invention.

Claims

1. a timing method for embedded system, is characterized in that, comprising:

Receive the interruption that expires that described comparand register sends, call the call back function carried in described first timing request;

Also comprise:

If t1 does not expire within Current hardware time-count cycle, then when next hardware arrives time-count cycle, return to perform and judge described first timing request whether step then within Current hardware time-count cycle according to the software components t2 of current time in system and t1;

Also comprise:

Judge whether the hardware component of described t1 is greater than and comparand register required time t3 is set;

If described t2 is early than t1, then according to judging that whether t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer, comprising:

If t2 is early than t1, and the hardware component of described t1 is greater than t3, then according to judging that whether described t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

2. timing method according to claim 1, is characterized in that,

At described judgement t2 early than t1, and between judging that whether described t1 expires within Current hardware time-count cycle the described time-count cycle according to t2 and hardware timer, also comprise:

Described first timing request is joined in orderly timer queue according to the sequencing of expiration time;

Judge whether described first timing request that receives is positioned at the first node of described orderly timer queue, if so, then trigger and judge t1 whether overdue step within Current hardware time-count cycle the described time-count cycle according to t2 and hardware timer.

3. timing method according to claim 2, is characterized in that, described call the call back function carried in the first timing request after, also comprise,

Described first timing request is deleted from described orderly timer queue.

4. timing method according to claim 3, is characterized in that, described from orderly timer queue, delete described first timing request after, also comprise:

Obtain the second timing request of the first node of described orderly timer queue, return the software components t2 that performs and judge the current time in system whether early than the step of the expiration time t5 of described second timing request, in described second timing request, carry timer expiration time t5 and call back function.

5. a timing device for embedded system, is characterized in that, comprising:

Expire interruption processing module, is connected respectively with comparand register and timing request receiver module, for receiving the interruption that expires that described comparand register sends, calls the call back function carried in described first timing request;

Described timing device also comprises:

If do not expire within Current hardware time-count cycle for t1, then when next hardware arrives time-count cycle, return to perform and judge described first timing request whether module then within Current hardware time-count cycle according to the software components t2 of current time in system and t1;

Described timing device also comprises:

For judging whether the hardware component of described t1 is greater than the module arranging comparand register required time t3;

Described second judge module also for, if t2 is early than t1, and the hardware component of described t1 is greater than t3, then according to judging that whether described t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

6. device according to claim 5, is characterized in that, also comprises:

Queue adds module, is connected with the first judge module, for when described t2 is early than described t1, joins in orderly timer queue by described first timing request according to the sequencing of expiration time;

3rd judge module, for judging whether described first timing request received is positioned at the first node of described orderly timer queue;

First trigger module, respectively with the second judge module and the 3rd judge module are connected, for when described 3rd judge module judges that described first timing request is positioned at the first node of described orderly timer queue, trigger described second judge module according to judging that whether described t1 expires within Current hardware time-count cycle the time-count cycle of t2 and hardware timer.

7. timing device according to claim 6, is characterized in that, also comprises:

Queue removing module, interruption processing module is connected with expiring, and after calling in the described interruption processing module that expires the call back function carried in the first timing request, from described orderly timer queue, deletes described first timing request.

8. timing device according to claim 7, it is characterized in that, described queue removing module also for, obtain the second timing request of the first node of described orderly timer queue, return the software components t2 that performs and judge the current time in system whether early than the expiration time t5 of described second timing request, in described second timing request, carry timer expiration time t5 and call back function.