CN101299193A - Method for enhancing computer inner core timer control precision - Google Patents
Method for enhancing computer inner core timer control precision Download PDFInfo
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- CN101299193A CN101299193A CNA2008100664168A CN200810066416A CN101299193A CN 101299193 A CN101299193 A CN 101299193A CN A2008100664168 A CNA2008100664168 A CN A2008100664168A CN 200810066416 A CN200810066416 A CN 200810066416A CN 101299193 A CN101299193 A CN 101299193A
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Abstract
The present invention provides a method for improving control precision of a computer inner core timer. The method is realized under the support of the set inner core timer executive program, based on the preset system timing hardware clock and timing granularity, which including the following steps: 1. determining the timing granularity according to the specific objective platform and application environment; 2. relieving the binding relationship between the system timing hardware clock interrupt and the operating system time interrupt service program; 3. setting the timing hardware at eh system initialize time according to the timing precision value determined by the step 1; 4. inserting novel codes (including codes maintaining the self timing information, codes judging whether the timer is overtime and executing the overtime function and codes holding the operating system time according to the original system time rate) at the timing hardware clock interrupt entrance; 5 recompiling and loading the inner core, making the modification of the steps 2, 3, 4 to become effective, and repeating the step 4 and 5.
Description
Technical field
The present invention relates to a kind of method that improves computer inner core timer control precision, particularly a kind of method of the high precision timing incident being handled based on original computer system.
Background technology
Operating system is the program of the hardware and the software resource of supervisory computer or embedded platform, also is simultaneously the basis of application program operation.Operating system is a large-scale supervisor control program, and its effect is that all resources in the system are played a role to greatest extent according to establishing good sequential, is the user effective service interface of providing convenience.Wherein inner core timer is the basis of general-purpose operating system inner core managing time, and its effect is that the kernel task is carried out on the time point of appointment.Use timer the Timing Processing function need be set and set in advance a time-out time, after timer is activated, specified Timing Processing function will automatically perform when expiring.The standard kernel timer is subjected to the influence of kernel beat timer, hardware interrupts, other timers and asynchronous task easily.Particularly because standard kernel timer priority is lower than hard interruption, therefore have only after all hard interrupt service routines that is suspended are finished, inner core timer just can obtain carrying out, and in the worst case, timing services might be postponed 1 and even several system's beats fully.In view of the above defective that can't overcome, kernel can not satisfy strict timing application in the computer general-purpose operating system commonly used at present, need more can not be applied to degree of precision occasion regularly.In the particularly concrete application process, system's beat responsive operation of standard kernel is very heavy.These work generally include: beat sum, update system working time and the real time that update system produces, the scheduling of executing the task, balanced each operation queue, upgrade the overtime dynamic timing device of resource consumption and the statistical value of processor time, execution and calculating average load value or the like.Beat rate with simple raising kernel can cause the above-mentioned multinomial responsive operation of the frequent execution of system, thereby system load is increased sharply, and then can significantly reduce system performance.Therefore at present mainstream operation system, as UNIX/Linux, WinCE, kernel timeticks rate also only be set in 50Hz to 1000Hz.Yet the beat rate that is confined to this scope can not guarantee the finishing of precision timed task of inner core timer.In addition, timing stability is subjected to the Hardware I load to influence fairly obvious.Because the employed soft interruption of common inner core timer residing rank in the interruption system is lower, after being finished, the high-level hard interruption that must wait for all hang-up just can obtain carrying out, and system tends to produce a large amount of hardware interrupts when carrying out the hardware data read-write, therefore in the very big system of Hardware I load, the stability of standard kernel timer is difficult to guaranteed, carries out for high-precision timed task and does not then obviously know where to begin.
In the improvement project for the present existing problem of inner core timer,, also can improve precision regularly in various degree though some scheme is not special improvement project at timer.Comprising 1. additional mini kernel: for the support of hard real-time is provided, additional real-time micro-kernel, and the normal operations system is moved as the task of a low priority of this micro-kernel.Task in the conventional system can communicate by FIFO and real-time task.The representative instance of this scheme is RT-Linux.The shortcoming of this scheme is to need to increase a miniature kernel, and needs the communication between miniature kernel of maintenance and the common kernel, its cross-platform enforcement complexity height, difficult the realization.And this scheme just realized real-time characteristic in miniature kernel, do not improve the timer performance of normal operations system.2. clock chip is set to single and triggers its basic thought of state (One shot mode) and be: clock chip is set to single and triggers state, promptly to clock chip a time-out time is set at every turn, a time-out time is set in clock interrupt handling routine when this overtime incident takes place then once more as required.It utilizes the clock counter of CPU that the timing accuracy that can reach CPU frequency in theory is provided.The representative instance of this scheme has Kurt-Linux and Monta Vista Linux.The shortcoming of this scheme is to calculate continually and to be provided with the time-out time of clock chip and revises cumulative errors, and its algorithm itself moves the shared time and can have a negative impact to the timing effect, in fact is difficult to reach the timing accuracy of its nominal.3. use the additional hardware timer its: utilization system additional hardware timer is finished high precision timing.Obviously the limitation of this scheme is to require target platform to have at least one idle hardware timer, and this scheme in fact also belongs to a kind of single and trigger clock scheme, and such scheme 2 existing shortcomings are arranged equally.4. employing counter: adopting system's beat is digit, by the appendage counting and trigger timer.This scheme fundamental purpose is to replace timing to reduce the periodically expense of timing with counting, does not improve precision of timer.
Summary of the invention
The objective of the invention is under the prerequisite that does not increase any hardware facility, provide a kind of about the basic beat basis of computer operating system, realize method the high precision timing task management.
Basic design of the present invention is that this method is on the basis of system's timing hardware clock that presets and timing granularity, realizes under the support of supporting inner core timer executive routine, may further comprise the steps:
1. determine regularly granularity according to objectives platform and applied environment,
2. deactivation system regularly hardware clock interrupt and operating system beat interrupt service routine between binding relationship,
3. according to the determined timing accuracy value of step 1, constantly timing hardware is provided with at system initialization, thus the beat rate of elevator system timing hardware clock,
4. interrupt the porch at the timing hardware clock and insert fresh code, comprising: the code of safeguarding the timing information that this programme timing hierarchy is own, judge the code that whether timer expiry is arranged and carry out overtime function according to the timing information of being safeguarded, keep the code that the operating system beat interrupts by the former beat rate of system.
5. recompilate and load kernel, above step 2,3,4 modifications of being made are come into force, repeat 4., 5. step.
Because the technical scheme of this method has been removed the regularly binding relationship of hardware clock and the operation system clock interrupt service routine of system, further refinement the timing granularity of hardware clock, and realized new timing hierarchy at timing hardware interrupts service routine.The periodic interruptions that the direct using system timing of this new timing hierarchy hardware produces is as the timing source, and it mainly acts on and comprising: safeguard own timing information, carry out overtime task and keep the operating system beat.About the optimal value of timing granularity, should make a general scope according to objectives platform and applied environment, by concrete test the timing granularity is finely tuned to determine then.Concrete step can repeat above step.Like this, can effectively improve precision regularly and significantly be better than existing improvement technical scheme again.Because the periodic interruptions timing that regularly hardware produced of the direct using system of kernel timing hierarchy, rather than during according to the operating system rhythmic meter, the operating system beat is produced by the kernel timing hierarchy, rather than directly by system regularly hardware produce.What system's timing hardware produced like this is that periodic triggers is interrupted, rather than single triggers interruption.The user only needs timing hardware once is provided with and just can realize that timing accuracy and operating system beat rate are independently of one another, and it is constant to keep origin operation system beat rate.Thereby, not only improved timing accuracy, not only do not had the burden of too much increase system but also can guarantee the stability of system sequence.
Description of drawings
Fig. 1 is the regularly process flow diagram of the newly-increased code in hardware interrupts porch of system.
Wherein dotted line is the execution route of standard kernel interrupt service routine.
Embodiment
In can finding out clearly that with reference to accompanying drawing 1 the above concrete steps that statement realizes the object of the invention in summary of the invention one joint are 4., interrupt the porch at the timing hardware clock and insert the execution in step that fresh code determined and be:
1. enter the system hardware timer interrupt routine and proceed the timer timing according to the hardware timing frequency that has improved,
2. whether there is timed task to expire in the timing information that comparison is safeguarded,
3. do not have timed task to expire directly to verify or have timed task to expire and send corresponding " certain task is timed to " message code after verify original system and whether then interrupt beat,
4. original system interrupt beat then directly do not go to step 1., hardware regularly interrupts fast return, interrupts beat as original system and then goes to next the operation system clock interrupt routine beat, carries out the fast return of original system interrupt routine.
As seen, implement above Ji mouse and put after the case in an intrinsic beat of origin operation system, can not be subjected to any interference the realization inner core timer independent timing and according to the frequency that institute accurately sets hold accurately timing accuracy, the overtime function of startup computing, carry out the management of timed task.As long as set in advance timing granularity accurately, just can realize the object of the invention.
In order to realize regularly the optimum words of granularity, obviously be make a general scope according to objectives platform and applied environment, by concrete test the timing granularity is finely tuned at last more then and determine.
Above technological improvement is reflected in the concrete step of the present invention and is: improve computer inner core timer control precision method step 1.-5. also comprise:
6. by concrete test the timing granularity is further finely tuned, re-execute step 2, step 3 and step 5 after the adjustment.
Further provide below above concrete steps 1. in according to the decision of objectives platform and applied environment regularly the concrete steps of granularity be:
1. hardware clock interruption frequency is set improves multiple greater than 1 code ET
2. give code jif with origin operation system beat rate assignment, the system peripherals frequency is that assignment is given code pclk, regularly hardware clock frequency multiplication assignment is given code mult, system regularly hardware divider assignment gives code divi, so obtaining according to following computing method of computing system timing hardware period register value PERIOD:
PERIOD＝(pclk*mult)/(jif*divi*ET)
3. determine the timing granularity of inner core timer by above result of calculation.
It is 10-100 that the hardware clock interruption frequency of step in 1. improves multiple.
The obvious technique effect of comparing with existing program is:
Use simple method, in the situation that does not cause system overload, realized possessing more high-precision The inner core timer of degree and better stability. This method is with littler expense, and the actual measurement single is expense regularly Be about 1/8 of kernel beat expense, realized precision than the existing system precision of timer improve 10 times with On inner core timer. On general platform, can be less than the timing accuracy of 100us. Timer has Stability is not subjected to the Hardware I/O load to affect no accumulated error substantially preferably. Little to kernel modifications. Only need to revise the hardware clock beat and insert one section handling procedure, do not need additional mini kernel and extra Hardware timer, do not need frequently to reset the hardware timer count value yet. Kept the modular system joint Clap and characteristic, kept and original system between uniformity, be convenient to use.
The limit timing accuracy that this programme can reach can not less than time of implementation of Timing Processing function and The longest global interrupt shut-in time under the specific environment, otherwise can lose regularly beat of hardware, thus shadow Ring timing accuracy. Because timer moves in high-level hardware interrupts in this programme, this means The Timing Processing function can the term of execution monopolize system, therefore require the Timing Processing program should be as much as possible Fast succinct, in order to avoid consume system resource excessively.
Claims (5)
1, a kind of method that improves computer inner core timer control precision, this method are on the basis of system's timing hardware clock that presets and timing granularity, realize that under the support of supporting executive routine it is characterized in that: this method may further comprise the steps:
1. determine regularly granularity according to objectives platform and applied environment,
2. deactivation system regularly hardware clock interrupt and operating system beat interrupt service routine between binding relationship,
3. according to the determined timing accuracy value of step 1, constantly timing hardware is provided with at system initialization, thus the beat rate of elevator system timing hardware clock,
4. interrupt the porch at the timing hardware clock and insert fresh code, comprising: the code of safeguarding the timing information that this programme timing hierarchy is own, judge the code that whether timer expiry is arranged and carry out overtime function according to the timing information of being safeguarded, keep the code that the operating system beat interrupts by the former beat rate of system
5. recompilate and load kernel, above step 2,3,4 modifications of being made are come into force, repeat 4., 5. step.
2, the method for raising computer inner core timer control precision according to claim 1 is characterized in that 4. step in the timing hardware clock interruption porch insertion execution in step that fresh code determined is:
1. enter the system hardware timer interrupt routine and proceed the timer timing according to the hardware timing frequency that has improved,
2. whether there is timed task to expire in the timing information that comparison is safeguarded,
3. after not having timed task to expire directly to verify or having timed task to expire and send corresponding " certain task is timed to " message code, verify original system and whether then to interrupt beat,
4. original system interrupt beat then directly do not go to step 1., hardware regularly interrupts fast return, interrupts beat as original system and then goes to next the operation system clock interrupt routine beat, carries out the fast return of original system interrupt routine.
3, the method for raising computer inner core timer control precision according to claim 1, it is characterized in that improving computer inner core timer control precision method step 1.-5. also comprise:
6. by concrete test the timing granularity is further finely tuned, re-execute step 2, step 3 and step 5 after the adjustment.
4, the method for raising computer inner core timer control precision according to claim 1 is characterized in that the concrete steps according to objectives platform and applied environment decision timing granularity were during step was 1.:
1. hardware clock interruption frequency is set improves multiple greater than 1 code ET
2. give code jif with origin operation system beat rate assignment, the system peripherals frequency is that assignment is given code pclk, regularly hardware clock frequency multiplication assignment is given code mult, system regularly hardware divider assignment gives code divi, so obtaining according to following computing method of computing system timing hardware period register value PERIOD:
PERIOD＝(pclk*mult)/(jif*divi*ET)
3. determine the timing granularity of inner core timer by above result of calculation.
5, the method for raising computer inner core timer control precision according to claim 4 is characterized in that the hardware clock interruption frequency raising multiple during step 1. is 10-100.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102637126A (en) * | 2011-02-15 | 2012-08-15 | 无锡物联网产业研究院 | Method, device and system for timing embedded system |
| CN102968376A (en) * | 2012-12-10 | 2013-03-13 | 北京神舟航天软件技术有限公司 | System window phase sliding test method based on overall execution path process |
| CN103995766A (en) * | 2014-06-06 | 2014-08-20 | 山东超越数控电子有限公司 | Method for detecting and controlling temperatures of processor |
| CN105474127A (en) * | 2013-06-13 | 2016-04-06 | 微软技术许可有限责任公司 | Virtual per processor timers for multiprocessor systems |
| CN105550023A (en) * | 2015-12-03 | 2016-05-04 | 青岛海信移动通信技术股份有限公司 | Timer event processing method and device |
| CN110333843A (en) * | 2019-04-19 | 2019-10-15 | 中科创达(重庆)汽车科技有限公司 | Implementation method, device and the electronic equipment of virtual machine high-resolution timer |
| CN111562809A (en) * | 2020-04-15 | 2020-08-21 | 漳州市德恒电子有限公司 | Movement stability control method applied to four-stage driving |
| CN111580378A (en) * | 2020-04-27 | 2020-08-25 | 广东尚研电子科技有限公司 | Off-line high-precision clock control method and clock device |
| CN112559136A (en) * | 2020-12-24 | 2021-03-26 | 科东(广州)软件科技有限公司 | Method and device for interrupting delivery of computer |
| CN113835851A (en) * | 2021-08-19 | 2021-12-24 | 威胜信息技术股份有限公司 | Method for implementing real-time operating system timer |
| CN116149250A (en) * | 2022-12-20 | 2023-05-23 | 西北核技术研究所 | Multi-PLC (programmable logic controller) high-time-precision instruction synchronization method based on hard timer |
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2008
- 2008-04-07 CN CN200810066416A patent/CN100592260C/en not_active Expired - Fee Related
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102637126A (en) * | 2011-02-15 | 2012-08-15 | 无锡物联网产业研究院 | Method, device and system for timing embedded system |
| CN102637126B (en) * | 2011-02-15 | 2015-05-13 | 无锡物联网产业研究院 | Method, device and system for timing embedded system |
| CN102968376A (en) * | 2012-12-10 | 2013-03-13 | 北京神舟航天软件技术有限公司 | System window phase sliding test method based on overall execution path process |
| CN102968376B (en) * | 2012-12-10 | 2015-01-21 | 北京神舟航天软件技术有限公司 | System window phase sliding test method based on overall execution path process |
| CN105474127A (en) * | 2013-06-13 | 2016-04-06 | 微软技术许可有限责任公司 | Virtual per processor timers for multiprocessor systems |
| US10534421B2 (en) | 2013-06-13 | 2020-01-14 | Microsoft Technology Licensing, Llc | Virtual per-processor timers for multiprocessor systems |
| CN105474127B (en) * | 2013-06-13 | 2018-12-11 | 微软技术许可有限责任公司 | Virtual every processor timer for multicomputer system |
| CN103995766A (en) * | 2014-06-06 | 2014-08-20 | 山东超越数控电子有限公司 | Method for detecting and controlling temperatures of processor |
| CN105550023B (en) * | 2015-12-03 | 2019-05-07 | 青岛海信移动通信技术股份有限公司 | A kind of processing method and processing device of timer event |
| CN105550023A (en) * | 2015-12-03 | 2016-05-04 | 青岛海信移动通信技术股份有限公司 | Timer event processing method and device |
| CN110333843A (en) * | 2019-04-19 | 2019-10-15 | 中科创达(重庆)汽车科技有限公司 | Implementation method, device and the electronic equipment of virtual machine high-resolution timer |
| CN111562809A (en) * | 2020-04-15 | 2020-08-21 | 漳州市德恒电子有限公司 | Movement stability control method applied to four-stage driving |
| CN111562809B (en) * | 2020-04-15 | 2023-03-31 | 漳州市德恒电子有限公司 | Movement stability control method applied to four-stage driving |
| CN111580378A (en) * | 2020-04-27 | 2020-08-25 | 广东尚研电子科技有限公司 | Off-line high-precision clock control method and clock device |
| CN112559136A (en) * | 2020-12-24 | 2021-03-26 | 科东(广州)软件科技有限公司 | Method and device for interrupting delivery of computer |
| CN113835851A (en) * | 2021-08-19 | 2021-12-24 | 威胜信息技术股份有限公司 | Method for implementing real-time operating system timer |
| CN116149250A (en) * | 2022-12-20 | 2023-05-23 | 西北核技术研究所 | Multi-PLC (programmable logic controller) high-time-precision instruction synchronization method based on hard timer |
| CN116149250B (en) * | 2022-12-20 | 2024-06-21 | 西北核技术研究所 | Multi-PLC (programmable logic controller) high-time-precision instruction synchronization method based on hard timer |
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