CN102610585A - Lead frame for silicon chip encapsulation, encapsulation method and formed electronic element - Google Patents
Lead frame for silicon chip encapsulation, encapsulation method and formed electronic element Download PDFInfo
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- CN102610585A CN102610585A CN2011104280258A CN201110428025A CN102610585A CN 102610585 A CN102610585 A CN 102610585A CN 2011104280258 A CN2011104280258 A CN 2011104280258A CN 201110428025 A CN201110428025 A CN 201110428025A CN 102610585 A CN102610585 A CN 102610585A
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- lead frame
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- central layer
- encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The invention provides a lead frame for silicon chip encapsulation. The lead frame comprises a plurality of pins, wherein the pins form base pins of an electronic element formed after the silicon chip encapsulation, at least one pin in the pins is connected with a chip carrying plate used for fixing the silicon chip, and a plurality of concave pits are arranged in the plate surface for fixing the silicon chip of the chip carrying plate. The invention also provides an encapsulation method of silicon chips, and the method comprises the main steps that: the lead frame for silicon chip encapsulation is manufactured; the silicon chips are fixedly arranged on the chip carrying plate of the lead frame; the pins of the silicon chips and the corresponding pins of the lead frame are connected through inner lead wires; plastic sealing materials are bonded on the chip carrying plate of the lead frame, the silicon chips, the inner lead wires and pin end parts of the lead frame connected with the inner lead wires are sealed through the plastic sealing materials; and the sealed products are subjected to heat treatment and separation forming. By using the method as the basis, the invention further provides the electronic element encapsulated with the silicon chips.
Description
Technical field
The present invention relates to silicon encapsulation technology field, particularly lead frame, method for packing and the encapsulation of the silicon encapsulation usefulness formed electronic component that finishes.
Background technology
In the manufacture process of electronic component; The electronic component of TO-252, TO-92 or TO-126 encapsulation for example; Normally produce lead frame earlier; Again silicon is fixed on carrying on the central layer of lead frame, through lead the pin of silicon and the respective pins of lead frame is coupled together then, seal with the pin termination that is connected with lead of plastic packaging material again silicon, lead, lead frame; Cutting and separating goes out single electronic component from the lead frame at last, and this process is the encapsulation process of silicon.
Adopt above-mentioned packaging technology electronic component manufactured mainly to rely on to be bonded in the plastic packaging material that carries on the central layer that silicon is isolated from the outside; To prevent that airborne impurity from causing electric property to descend to the corrosion of chip circuit; And for chip provides mechanical protection; So that the installation of electronic component and transportation, therefore, the bonding fastness of plastic packaging material and year central layer is vital to the influence of electronic component quality.
Yet along with the development of electronical elements surface assemblingization and miniaturization, the high temperature impact that electronic component is born when welding assembly is increasing; To such an extent as to the plastic packaging material of electronic component and carry between the central layer lamination takes place often, the electronic component of TO-252 encapsulation for example, it must adopt the wave-soldering mode to carry out welding assembly in use; And the temperature that wave-soldering uses under so high temperature shock, adds that contact area is big generally up to 260 ℃; The electronic component of TO-252 encapsulation is as easy as rolling off a log to be sealed the plastic packaging material of usefulness and carries the layering between the central layer; Plastic packaging material occurs breaking away from and dislocation with the combination interface that carries central layer, and this layering gently then can cause the entire product sealing unusual, finally causes outside steam invasion; Cause the unusual even inefficacy of properties of product; Heavy then owing to plastic packaging material with carry the effect that draws high that the central layer layering produces, cause the disengaging of electronic component inner lead and chip or pin, cause rosin joint and open circuit.
To above problem, prior art adopts the method for reelecting plastic packaging material usually, through selecting the stronger high-grade plastic packaging material of cementitiousness for use, in the hope of improving plastic packaging material and carrying the adhesion between the central layer.But the method one of selecting high-grade plastic packaging material for use be can not thoroughly stop this bad, the 2nd, increased the cost of product greatly, practical significance is little.
Summary of the invention
One of the object of the invention provides a kind of silicon encapsulation and uses lead frame, with the combine fastness of raising lead frame with plastic packaging material.
Two of the object of the invention provides a kind of method for packing of silicon, with the combine fastness of raising lead frame with plastic packaging material.
Three of the object of the invention provides a kind of electronic component that is packaged with silicon, to improve the fastness that combines of carrying central layer and plastic packaging material of electronic component.
For solving the problems of the technologies described above; Lead frame is used in a kind of silicon encapsulation provided by the invention; Have a plurality of pins, said pin constitutes the pin of the formed electronic component of silicon encapsulation finishing, in described a plurality of pins; Have at least a pin connecting a central layer that carries that is used for fixing silicon, on the plate face of the fixedly silicon of said year central layer, be provided with a plurality of pits.
As further improvement, above-mentioned silicon encapsulation also can have following attached technical scheme with lead frame:
Said pit is the wedge shape blind hole, and its near coal-mine area is greater than the hole floor space.
The near coal-mine shape with the end, hole of said pit all is a rectangle.
The near coal-mine rectangle length of side of said pit is 0.08～0.12 millimeter, and the rectangle length of side is 0.04～0.07 millimeter at the bottom of the hole of said pit, and the degree of depth of said pit is 0.03～0.1 millimeter.
On the plate face of the fixedly silicon of said year central layer, said pit evenly distributes.
The present invention also provides a kind of method for packing of silicon, may further comprise the steps in regular turn:
Step 1: make lead frame;
Step 2: bonding die is fixed on carrying on the central layer of lead frame with silicon;
Step 3: pressure welding couples together the pin of silicon and the respective pins of lead frame through lead;
Step 4: sealing, plastic packaging material is bonded in carrying on the central layer of lead frame, seal by the pin termination that is connected with lead of plastic packaging material silicon, lead, lead frame;
Step 5: the product to after the sealing is heat-treated, and heat treated temperature is 200～250 ℃, and the duration is 2～3 hours;
Step 6: separate moulding, will on lead frame, encapsulate the electronic component cutting and separating that forms and come out, form independently electronic component;
The lead frame that said step 1 is made is aforementioned arbitrary lead frame, and in said step 4, makes plastic packaging material enter into carrying in the pit on the central layer of said lead frame.
As further improvement, the method for packing of above-mentioned silicon also can be taked following attached technical scheme:
After said step 1, before said step 2, said lead frame is carried out The pre-heat treatment, the temperature of The pre-heat treatment is between 250～350 ℃, and 15～30 seconds duration, after the The pre-heat treatment, the temperature that keeps lead frame is to carrying out said step 2.
The material of said lead frame is copper or copper facing metal, and said plastic packaging material is an epoxy resin, after said step 3, before said step 4, said lead frame is heated, with the oxidation of the surperficial contained copper material that promotes said lead frame.
Be the oxidation of the surperficial contained copper material that promotes said lead frame, and the temperature that said lead frame is carried out heat treated is between 100～180 ℃, 8～12 minutes duration.
After said step 6, the electronic component after the separation moulding to be heat-treated, heat treated temperature is 150～200 ℃, 3～12 hours duration.
In said step 1, the pit that carries on the central layer of said lead frame adopts the moulding of mechanical stamping mode.
The present invention also provides a kind of electronic component that is packaged with silicon; Comprise a plurality of pins, wherein at least one pin is connecting one year central layer, and silicon is fixed on and carries on the central layer; On the plate face of the fixedly silicon of said year central layer, be bonded with plastic packaging material; Said silicon is wrapped in the said plastic packaging material, on the plate face of the fixedly silicon of said year central layer, is provided with a plurality of pits, and said plastic packaging material embeds and is bonded in the said pit.
As further improvement, the above-mentioned electronic component that is packaged with silicon also can have following attached technical scheme:
Said pit is the wedge shape blind hole, and its near coal-mine area is greater than the hole floor space.
The near coal-mine shape with the end, hole of said pit all is a rectangle.
The near coal-mine rectangle length of side of said pit is 0.08～0.12 millimeter, and the rectangle length of side is 0.04～0.07 millimeter at the bottom of the hole of said pit, and the degree of depth of said pit is 0.03～0.1 millimeter.
On the plate face of the fixedly silicon of said year central layer, said pit evenly distributes.
Useful technique effect of the present invention is: because plastic packaging material is injected in the pit that carries central layer; Therefore increase plastic packaging material greatly and carried central layer; Just with the adhesion of lead frame; Greatly reduce the plastic packaging material of electronic component and carried the lamination between the central layer, improved the q&r of electronic component.
Below in conjunction with accompanying drawing and embodiment technical scheme of the present invention is elaborated.
Description of drawings
Fig. 1 is the contour structures sketch map of a kind of embodiment of lead frame according to the invention;
Fig. 2 is the A portion enlarged drawing of Fig. 1;
Fig. 3 is the B-B partial sectional view of Fig. 2;
Fig. 4 is the contour structures sketch map of a kind of embodiment of electronic component according to the invention;
Fig. 5 is the C-C profile of Fig. 4.
Embodiment
As shown in Figure 1 according to a kind of lead frame provided by the invention, this lead frame 1 has three pin 2a, 2b, 2c, and these three pins constitute the pin of the formed electronic component of silicon encapsulation finishing.The actual quantity of pin according on lead frame 1 the quantity of the electronic component that will form, and the required number of pin of each electronic component and deciding.In the example of Fig. 1; Only the draw part of lead frame 1, in this part, the position that with dashed lines surrounds can encapsulate out an electronic component; This electronic component has three pins; The position that other of lead frame do not draw is the repetition at position that this dotted line surrounds, and many one of every repetition just can encapsulate an electronic component more on lead frame.
In three pin 2a, 2b, 2c, one of them pin 2a is connecting a year central layer 3 that is used for fixing silicon.Carrying central layer 3 and three pin 2a, 2b, 2c is global formations.Carry on the plate face of fixedly silicon of central layer 3 and be evenly distributed with a plurality of pits 4, the quantity of pit 4 is many more, and it is good more with the adhesion of plastic packaging material to carry central layer 3.Pit 4 adopts the moulding of mechanical stamping mode.In fact, all pin 2a, 2b, 2c, year central layer 3, pit 4 comprise all punching press formation on same metallic plate of intercell connector 5 that each pin is fused.The material of lead frame 1 can be copper, copper alloy or iron, iron nickel etc.
Referring to Fig. 1, Fig. 2 and Fig. 3, pit 4 is the wedge shape blind hole simultaneously, and its near coal-mine area is greater than the hole floor space.The near coal-mine shape with the end, hole of pit all is a rectangle, and near coal-mine rectangle length of side L1 and L2 are 0.08～0.12 millimeter, and the rectangle length of side L3 and the L4 at the end, hole are 0.04～0.07 millimeter, and the depth H of pit is 0.03～0.1 millimeter.The wedge shape blind hole has bigger surface area, helps and fully the contacting of plastic packaging material.
Electronic component such as Fig. 4 and shown in Figure 5 of utilizing lead-frame packages shown in Figure 1 to form.This electronic component comprises three pin 6a, 6b, 6c, and one of them pin 6a is connecting one and carrying central layer 3.In fact, three pin 6a, 6b, 6c of this electronic component are exactly that three pin 2a, 2b, the 2c cutting of the lead frame from Fig. 1 forms, electronic component carry central layer 3 be exactly among Fig. 1 lead frame carry central layer 3.Be fixed with silicon 8 carrying on the central layer 3 of electronic component, silicon 8 is wrapped in the plastic packaging material 9.Plastic packaging material 9 directly bonds with year central layer 3.Plastic packaging material 9 adopts epoxy resin usually.On the plate face of the fixedly silicon that carries central layer 3, be provided with a plurality of pits 4, plastic packaging material 9 embeds and directly is bonded in the pit 4.In fact pit 4 among Fig. 5 is exactly the pit 4 among Fig. 1, repeats no more here.
Detailed description is encapsulated in silicon on the lead frame shown in Figure 11 below, and then forms the method for electronic component shown in Figure 4.
At first make the lead frame 1 of structure shown in Figure 1, the material of lead frame 1 is copper or copper facing metal preferably.
Next can carry out bonding die, exactly silicon 8 is fixed on carrying on the central layer 3 of lead frame 1.But before bonding die, preferably lead frame 1 is carried out The pre-heat treatment, the temperature of The pre-heat treatment is between 250～350 ℃, and 15～30 seconds duration, after the The pre-heat treatment, the temperature that keeps lead frame 1 is to carrying out the bonding die step.The beneficial effect of this step The pre-heat treatment is that on the one hand, the temperature during bonding die is generally at 300～400 ℃; If lead frame is raised to 400 ℃ suddenly from room temperature, a large amount of stress can be put aside in its inside, and these stress are in case discharge; Will tear being bonded in the silicon that carries on the central layer, on the other hand, the thermal coefficient of expansion of lead frame and silicon is different; If the lead frame temperature rise is too fast, also can cause silicon to tear, therefore; Before bonding die, lead frame is carried out The pre-heat treatment, can significantly improve package quality.
The method of bonding die can adopt a scolder, perhaps connects silicon and carries central layer through the gold layer that melts the silicon back side.
Can carry out pressure welding after accomplishing bonding die, through lead the pin of silicon 8 and respective pins 2a, 2b, the 2c of lead frame 1 coupled together exactly, the pin 2a that is connected, 2b, 2c just constitute pin 6a, 6b, the 6c of electronic component.
Next can seal; Lead frame is put into mould; With hydraulic press (adopting 250 t hydraulic press usually) plastic packaging material is pressed into mould, plastic packaging material is bonded to carries on the central layer 3, seal with the termination of these three pin 2a, 2b, 2c with silicon 8, lead, lead frame.When in mould, injecting plastic packaging material, plastic packaging material enters into carrying in the pit 4 on the central layer of lead frame, thereby increases plastic packaging material greatly and carry a central layer 3, just with the adhesion of lead frame 1.
If the material of lead frame 1 is copper or copper facing metal; And plastic packaging material is an epoxy resin; Before above-mentioned sealing step, preferably earlier lead frame 1 is heated so, to promote the oxidation of the contained copper material of lead frame surface; The temperature of heat treated between 100～180 ℃, 8～12 minutes duration.The beneficial effect of this step heat treated is that the copper oxidation is to the facilitation significantly that is combined with of copper and epoxy resin, thus the adhesion that can further improve epoxy resin and carry central layer 3.
After sealing finishes, product is heat-treated, heat treated temperature is 200～250 ℃, and the duration is 2～3 hours.This step is the internal stress of release products well.
Next can be according to actual needs pin 2a, 2b, the 2c of lead frame be electroplated, make each pin evenly plate one deck tin.
Then separate moulding; To on lead frame 1, encapsulate the electronic component cutting and separating that forms comes out; Form independently electronic component, exactly the position that dotted line surrounded among Fig. 1 is cut out, and cut off the intercell connector 5 between three pin 2a, 2b, the 2c; Each pin 2a, 2b, 2c are cut into the size of wanting, thereby obtain electronic component shown in Figure 4.
Because can form internal stress during the cutting pin, therefore when the user carried out high-temperature soldering to electronic component, the plastic packaging material of pin root was easy to generate lamination, and pin is short more, lamination takes place more easily.For overcoming this defective, can after above-mentioned separation forming step, electronic component be heat-treated, heat treated temperature is 150～200 ℃, 3～12 hours duration.Can discharge the internal stress of pin with this.
Above embodiment is only in order to explanation the present invention; It is not limitation of the present invention; Those skilled in the art under the premise without departing from the spirit and scope of the present invention, the modification that the present invention is carried out or be equal in the protection range that replacement all is encompassed in claim of the present invention and limited.
Claims (11)
1. lead frame is used in a silicon encapsulation; Have a plurality of pins; Said pin constitutes the pin of the formed electronic component of silicon encapsulation finishing; In described a plurality of pins, have at least a pin (2a) connecting one be used for fixing silicon carry central layer (3), it is characterized in that: said year central layer (3) the plate face of fixedly silicon on be provided with a plurality of pits (4).
2. lead frame is used in silicon encapsulation as claimed in claim 1, it is characterized in that: said pit (4) is the wedge shape blind hole, and its near coal-mine area is greater than the hole floor space.
3. lead frame is used in silicon encapsulation as claimed in claim 2, it is characterized in that: the near coal-mine shape with the end, hole of said pit (4) all is a rectangle.
4. lead frame is used in silicon encapsulation as claimed in claim 3; It is characterized in that: the near coal-mine length of side of said pit (4) is 0.08～0.12 millimeter; The hole bottom side length of said pit (4) is 0.04～0.07 millimeter, and the degree of depth of said pit (4) is 0.03～0.1 millimeter.
5. lead frame use in each described silicon encapsulation like claim 1 to 4, it is characterized in that: said year central layer (3) the plate face of fixedly silicon on, said pit (4) is distribution evenly.
6. the method for packing of a silicon may further comprise the steps in regular turn:
Step 1: make lead frame (1);
Step 2: bonding die is fixed on carrying on the central layer (3) of lead frame (1) with silicon (8);
Step 3: pressure welding couples together the pin of silicon (8) and the respective pins of lead frame (1) through lead;
Step 4: sealing, plastic packaging material (9) is bonded in carrying on the central layer (3) of lead frame, seal with the pin termination that is connected with lead of plastic packaging material (9) silicon (8), lead, lead frame;
Step 5: the product to after the sealing is heat-treated, and heat treated temperature is 200～250 ℃, and the duration is 2～3 hours;
Step 6: separate moulding, will on lead frame, encapsulate the electronic component cutting and separating that forms and come out, form independently electronic component;
It is characterized in that:
The lead frame (1) that said step 1 is made is that lead frame is used in each described silicon encapsulation of claim 1 to 5;
In said step 4, make plastic packaging material (9) enter into carrying in the pit (4) on the central layer of said lead frame.
7. the method for packing of a kind of silicon as claimed in claim 6; It is characterized in that: after said step 1, before said step 2, said lead frame (1) is carried out The pre-heat treatment; The temperature of The pre-heat treatment is between 250～350 ℃; 15～30 seconds duration, after the The pre-heat treatment, the temperature that keeps lead frame (1) is to carrying out said step 2.
8. the method for packing of a kind of silicon as claimed in claim 6; It is characterized in that: the material of said lead frame (1) is copper or copper facing metal; Said plastic packaging material (9) is an epoxy resin, after said step 3, before said step 4; Said lead frame (1) is heated, with the oxidation of the surperficial contained copper material that promotes said lead frame (1).
9. the method for packing of a kind of silicon as claimed in claim 8, it is characterized in that: said lead frame (1) carries out the temperature of heat treated between 100～180 ℃, and the duration is 8～12 minutes.
10. the method for packing of a kind of silicon as claimed in claim 6 is characterized in that: after said step 6, the electronic component that separates after the moulding is heat-treated, heat treated temperature is 150～200 ℃, and the duration is 3～12 hours.
11. electronic component that is packaged with silicon; Comprise a plurality of pins; Wherein at least one pin is connecting one and is carrying central layer (3), and silicon (8) is fixed on and carries on the central layer (3), said year central layer (3) the plate face of fixedly silicon on be bonded with plastic packaging material (9); Said silicon (8) is wrapped in the said plastic packaging material (9), it is characterized in that: the described silicon encapsulation of said year central layer (3) employing claim each claim of 1-5 is with year central layer (3) of lead frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110428025.8A CN102610585B (en) | 2011-12-19 | 2011-12-19 | Encapsulation method for silicon chip,and formed electronic element |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110428025.8A CN102610585B (en) | 2011-12-19 | 2011-12-19 | Encapsulation method for silicon chip,and formed electronic element |
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| CN102610585A true CN102610585A (en) | 2012-07-25 |
| CN102610585B CN102610585B (en) | 2015-01-14 |
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| CN201110428025.8A Active CN102610585B (en) | 2011-12-19 | 2011-12-19 | Encapsulation method for silicon chip,and formed electronic element |
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| CN102969296A (en) * | 2012-11-20 | 2013-03-13 | 无锡市威海达机械制造有限公司 | Lead frame structure |
| CN109545769A (en) * | 2018-11-15 | 2019-03-29 | 佛山市蓝箭电子股份有限公司 | Silicon chip package lead frame and its packaging method |
| CN109698182A (en) * | 2018-12-28 | 2019-04-30 | 珠海锦泰电子科技有限公司 | A kind of power rectifier diode packaging frame |
| CN112444717A (en) * | 2019-08-29 | 2021-03-05 | 珠海格力电器股份有限公司 | Verification method for matching degree of plastic package material and chip |
| CN113627121A (en) * | 2021-06-28 | 2021-11-09 | 展讯通信（上海）有限公司 | Chip design data processing method, electronic device and computer readable medium |
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| CN102969296A (en) * | 2012-11-20 | 2013-03-13 | 无锡市威海达机械制造有限公司 | Lead frame structure |
| CN109545769A (en) * | 2018-11-15 | 2019-03-29 | 佛山市蓝箭电子股份有限公司 | Silicon chip package lead frame and its packaging method |
| CN109698182A (en) * | 2018-12-28 | 2019-04-30 | 珠海锦泰电子科技有限公司 | A kind of power rectifier diode packaging frame |
| CN112444717A (en) * | 2019-08-29 | 2021-03-05 | 珠海格力电器股份有限公司 | Verification method for matching degree of plastic package material and chip |
| CN113627121A (en) * | 2021-06-28 | 2021-11-09 | 展讯通信（上海）有限公司 | Chip design data processing method, electronic device and computer readable medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102610585B (en) | 2015-01-14 |
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