CN102610509B - The forming method of element isolation layer - Google Patents
The forming method of element isolation layer Download PDFInfo
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- CN102610509B CN102610509B CN201110434910.7A CN201110434910A CN102610509B CN 102610509 B CN102610509 B CN 102610509B CN 201110434910 A CN201110434910 A CN 201110434910A CN 102610509 B CN102610509 B CN 102610509B
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- 238000002955 isolation Methods 0.000 title claims abstract description 41
- 238000000227 grinding Methods 0.000 claims abstract description 116
- TWXTWZIUMCFMSG-UHFFFAOYSA-N nitride(3-) Chemical compound [N-3] TWXTWZIUMCFMSG-UHFFFAOYSA-N 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 239000000463 material Substances 0.000 claims abstract description 35
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 238000011049 filling Methods 0.000 claims abstract description 6
- OFJATJUUUCAKMK-UHFFFAOYSA-N Cerium(IV) oxide Chemical group [O-2]=[Ce+4]=[O-2] OFJATJUUUCAKMK-UHFFFAOYSA-N 0.000 claims description 121
- 239000007788 liquid Substances 0.000 claims description 52
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 50
- 239000000377 silicon dioxide Substances 0.000 claims description 31
- 239000002245 particle Substances 0.000 claims description 20
- 238000002156 mixing Methods 0.000 claims description 19
- 238000005296 abrasive Methods 0.000 claims description 10
- 238000004140 cleaning Methods 0.000 claims description 5
- 230000001276 controlling effect Effects 0.000 abstract description 5
- 239000010408 film Substances 0.000 description 196
- 229910052581 Si3N4 Inorganic materials 0.000 description 42
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 14
- 229910052681 coesite Inorganic materials 0.000 description 12
- 229910052906 cristobalite Inorganic materials 0.000 description 12
- 229910052904 quartz Inorganic materials 0.000 description 12
- 229910052682 stishovite Inorganic materials 0.000 description 12
- 229910052905 tridymite Inorganic materials 0.000 description 12
- 210000003229 CMP Anatomy 0.000 description 11
- 239000007789 gas Substances 0.000 description 10
- 238000000034 method Methods 0.000 description 8
- 235000012239 silicon dioxide Nutrition 0.000 description 8
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000003801 milling Methods 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- MYMOFIZGZYHOMD-UHFFFAOYSA-N oxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N HF Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 210000002381 Plasma Anatomy 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005755 formation reaction Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N Silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 230000000996 additive Effects 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 2
- 239000008187 granular material Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000875 corresponding Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 230000001678 irradiating Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- XZWYZXLIPXDOLR-UHFFFAOYSA-N metformin Chemical compound CN(C)C(=N)NC(N)=N XZWYZXLIPXDOLR-UHFFFAOYSA-N 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005554 pickling Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Abstract
The present invention relates to the forming method of element isolation layer.Provide the method that the controlling in the grinding step of a kind of dielectric film making and being formed on a semiconductor substrate improves, forms the element isolation layer of the interelement separating property with brilliance.Have: sequentially form the operation of pad oxide film and nitride film on the surface of a semiconductor substrate；Form the operation of groove within through pad oxide film and nitride film, arrival Semiconductor substrate；The operation of embedment oxide-film is formed in the way of filling groove and covering nitride film；The operation that embedment oxide-film is ground by the 1st grinding-material is used in the way of residual embedment oxide-film on nitride film；And use the 2nd grinding-material to grind embedment oxide-film, nitride film is made to expose, and making the operation of the exposed surface planarization of nitride film and embedment oxide-film, wherein the 2nd grinding-material possesses the grinding selectivity ratio bigger relative to the grinding selectivity ratio of nitride film than the embedment oxide-film of the 1st grinding-material.
Description
Technical field
The present invention relates to each of the multiple semiconductor elements formed on a semiconductor substrate is carried out the forming method of electrically separated element isolation layer.
Background technology
In the integrated circuit of semiconductor device, it is formed for adjacent semiconductor element being carried out each other electrically separated element isolation layer.As the forming method of this element isolation layer, the most known silicon selective oxidation method (LOCOS:Local Oxidation of Silicon) and shallow trench isolation method (STI:Shallow Trench Isolation).Hereinafter, with reference to Fig. 1, Fig. 2 and Fig. 3, while the concrete example of each method is illustrated.Fig. 1 is the profile of each operation in the forming method representing the element isolation layer using LOCOS method, Fig. 2 and Fig. 3 is the profile of each operation in the forming method representing the element isolation layer using STI method.
In the case of forming element isolation layer by LOCOS method, first Si substrate 101 is implemented heat treated, make Si and O2At high temperature react, Si substrate 101 makes SiO2Film 102 grows (Fig. 1 (a)).It follows that make SiH4And NH3Gas reaction, at SiO2Si is made on film 1023N4Film 103 piles up (Fig. 1 (b)).Then, the Si of the part becoming the active region for forming semiconductor element is remained3N4Film 103, removes the Si in the region forming element isolation layer3N4Film 103(Fig. 1 (c)).Afterwards, make the Si substrate 101 that have passed through above-mentioned operation be exposed in the oxygen atmosphere of high temperature, make eliminating Si3N4The SiO exposed in the region of film 1032Film 102 grows (Fig. 1 (d)).Then, the Si of residual is removed3N4Film and the SiO of the part corresponding with element-forming region2Film 102, terminates the formation (Fig. 1 (e)) of the element isolation layer 104 to Si substrate 101.
On the other hand, in the case of forming element isolation layer by STI method, on Si substrate 201, first form a SiO2Film 202 and Si3N4Film 203(Fig. 2 (a)).It follows that remove Si substrate the 201, the oneth SiO2Film 202 and Si3N4A part for film 203, forms groove 204(Fig. 2 (b)).Afterwards, make Si substrate 201 be exposed in the oxygen atmosphere of high temperature, form the 2nd SiO in the side of groove 204 and bottom surface2Film 205(Fig. 2 (c)).Then, by bias high density type plasma activated chemical vapour deposition (HDP-CVD:High Density
Plasma-Chemical Vapor Deposition) method, in groove 204, imbed the 3rd SiO2Film 206(Fig. 2 (d)).Then, by cmp (CMP:Chemical Mechanical
Polishing) method, by Si3N4Film 203, as stop (stopper) film of CMP, removes Si3N4The 3rd SiO on film 2032Film 206, carries out planarization process (Fig. 3 (a)).And then, by using the etch processes of fluohydric acid gas, remove the 3rd SiO2A part (Fig. 3 (b)) for film 206, then passes through hot phosphoric acid and processes, remove Si3N4Film 203(Fig. 3 (c)).It follows that use fluohydric acid gas to be again carried out etch processes, make Si substrate 201 planarize, terminate the formation (Fig. 3 (d)) of the element isolation layer 207 to Si substrate 201.In STI method as described above, compared with LOCOS method, can obtain smooth surface, therefore forming the element isolation layer that interelement separating property is high, this STI method is used as the interelement partition method of most advanced device.
In the CMP operation of above-mentioned STI method, any one being generally selected Silica abrasive liquid or ceria lapping liquid as lapping liquid (slurry, grinding-material) uses.Silica abrasive liquid is by SiO2The grinding-material of the silicon dioxide granule constituted, although with low cost, but the grinding rate of oxide-film is little relative to the ratio of the grinding rate of nitride film (that is, oxide-film is relative to the grinding selectivity ratio of nitride film).On the other hand, ceria lapping liquid is to be mixed with by CeO2The ceria particles constituted and the grinding-material of disperse medium (additive), with high costs, but oxide-film is big relative to the grinding selectivity ratio of nitride film.Therefore, in the CMP operation of STI method, it is considered to grind performance (oxide-film is relative to the grinding selectivity ratio of nitride film) and cost, Silica abrasive liquid or ceria lapping liquid any one is selected.
As the device used in above-mentioned CMP operation and method, such as, described in patent documentation 1, there are being Ginding process and lapping device.
Patent documentation
Patent documentation 1: Japanese Unexamined Patent Publication 2007-59661 publication.
, in order to improve interelement separating property further, when making groove deeper than prior art, the 3rd SiO of embedment groove2Film is thickening, the 3rd SiO2The amount of grinding of film increases, and produces the problem that the controlling of CMP deteriorates.
Such as, in the case of the grinding using Silica abrasive liquid, owing to oxide-film is little relative to the grinding selectivity ratio of nitride film, so the Si remained on a si substrate3N4The thickness of film is uneven.Specifically, as shown in Figure 4 (a), the Si according to the element area density (%) in 4 μ m 4 μm3N4The residual thickness of film is different, at the low density part of element area, Si3N4Film is more removed, and a part for the Si substrate becoming element area is removed.Si here, Fig. 4 (a) is to represent in the case of utilizing Silica abrasive liquid (representing with solid line) or ceria lapping liquid (being represented by dotted lines) to implement CMP, in the regulation region of 4 μ m 4 μm in Si substrate3N4The chart of the residual thickness (nm) of film.Have again, the lapping liquid that disperse medium is about 0.8 relative to the mixing ratio of ceria particles is used in ceria lapping liquid, in the case of the grinding using this ceria lapping liquid, oxide-film is big relative to the grinding selectivity ratio of nitride film, even if the therefore rate of change of element area density, Si3N4The variation of the residual thickness of film is the least.
On the other hand, in the case of the grinding using ceria lapping liquid, although oxide-film is big relative to the grinding selectivity ratio of nitride film, but as shown in Figure 4 (b), along with the increase of amount of grinding, grinding rate reduces.Due to the reduction of such grinding rate, at Si3N4Residual Si O on film2Film, Si afterwards3N4The removing of film becomes insufficient, and the characteristic causing semiconductor element is defective, produces the reduction of the yield rate of semiconductor device.Here, Fig. 4 (b) is to represent SiO for Silica abrasive liquid (representing with solid line) and ceria lapping liquid (being represented by dotted lines)2The grinding rate of film is relative to the result of the relation of amount of grinding.Further, in the case of for Silica abrasive liquid, even if amount of grinding increases, grinding rate also will not reduce.
Summary of the invention
The present invention completes in view of above such situation just, it is provided that the controlling in the grinding step of a kind of dielectric film that can make to be formed on a semiconductor substrate improves, formed the forming method of the element isolation layer of the element isolation layer of the interelement separating property with brilliance.
In order to solve above-mentioned problem, it is characterised in that have: sequentially form the operation of pad oxide film and nitride film on the surface of a semiconductor substrate；Form the operation of groove within through described pad oxide film and nitride film, the described Semiconductor substrate of arrival；The operation of embedment oxide-film is formed in the way of filling described groove and covering described nitride film；The operation that described embedment oxide-film is ground by the 1st grinding-material is used in the way of remaining described embedment oxide-film on described nitride film；And use the 2nd grinding-material to grind described embedment oxide-film, described nitride film is made to expose, and making the operation that the exposed surface of described nitride film and described embedment oxide-film planarizes, wherein said 2nd grinding-material possesses the grinding selectivity ratio bigger relative to the grinding selectivity ratio of described nitride film than the described embedment oxide-film of described 1st grinding-material.
The forming method of the element isolation layer according to the present invention, is ground the embedment oxide-film formed in filling groove and on nitride film by the grinding step in two stages, implements embedment oxide-film and the planarization of nitride film.And, in the grinding step in these two stages, with the embedment oxide-film of the grinding-material used in the grinding step first carried out relative to compared with the grinding selectivity ratio of nitride film, after the embedment oxide-film of grinding-material that uses in the grinding step that carries out big relative to the grinding selectivity ratio of nitride film.By the grinding step in such two stages, residual embedment oxide-film and the disappearance of nitride film on nitride film after grinding step can be prevented.That is, according to the forming method of the element isolation layer of the present invention, the controlling in the grinding step of the dielectric film formed on a semiconductor substrate can be made to improve, form the element isolation layer of the interelement separating property with brilliance.
Accompanying drawing explanation
Fig. 1 is the profile representing each operation in the forming method of existing element isolation layer.
Fig. 2 is the profile representing each operation in the forming method of existing element isolation layer.
Fig. 3 is the profile representing each operation in the forming method of existing element isolation layer.
Fig. 4 (a) is to represent the element area density in the regulation region in Si substrate and Si3N4The chart of the relation of the residual thickness of film, (b) is to represent SiO2The grinding rate of film is relative to the chart of the relation of amount of grinding.
Fig. 5 is the profile representing each operation in the forming method of the element isolation layer of embodiment 1.
Fig. 6 is the profile representing each operation in the forming method of the element isolation layer of embodiment 1.
Fig. 7 is the profile for illustrating to use other the 2nd grinding step of the ceria lapping liquid of embodiment 3.
Fig. 8 is the chart of the relation representing milling time and grinding rate in the 2nd grinding step and existing grinding step of embodiment 3.
Detailed description of the invention
Hereinafter, referring to the drawings, while being described in detail for embodiments of the invention.
Embodiment 1
While with reference to Fig. 5 and Fig. 6, the forming method for the element isolation layer of embodiment 1 illustrates.Fig. 5 and Fig. 6 is the profile representing each operation in the forming method of the element isolation layer of embodiment 1 respectively.
First, the Si substrate 11 being made up of silicon is formed by silicon dioxide (SiO2) the pad oxide film 12 that constitutes and by silicon nitride (Si3N4) Si that constitutes3N4Film 13(Fig. 5 (a)).Specifically, with acid ablution, the Si substrate 11 prepared is cleaned, afterwards with pure water rinsing Si substrate 11, and then make Si substrate 11 be dried.After this drying process, Si substrate 11 is put into oxidation furnace, be exposed in the high-temperature atmosphere of 900 degree the most Celsius (900 DEG C), make Si and oxygen (O2) reaction, the surface of Si substrate 11 make pad oxide film 12 grow.Then, silane (SiH is made4) gas and ammonia (NH3) gas carries out chemical reaction (that is, utilize chemical gaseous phase deposit (CVD:Chemical Vapor Deposition) method) with gas phase, forms Si on pad oxide film 123N4Film 13.At Si shown in Fig. 5 (a)3N4Profile after film 13 formation.
It follows that form through pad oxide film 12 and Si3N4Film 13, arrive multiple grooves 14(Fig. 5 (b) of inside of Si substrate 11).Specifically, at Si3N4Drip on film 13 photoresist, makes Si substrate 11 high-speed rotary transfer coating (rotation plating (spin coating)) resist thin film.Afterwards, to this resist thin film irradiating laser, this resist thin film is implemented composition.Then, the resist thin film using composition, as mask, is implemented dry etching, is formed through pad oxide film 12 and Si3N4Film 13, arrive the groove 14 of inside of Si substrate 11.And, use oxygen plasma to remove at Si3N4On film 13, the resist thin film of residual, implements pickling to the Si substrate 11 that have passed through above-mentioned operation clean.
Further, the part not forming groove 14 is the element-forming region for forming semiconductor element.Therefore, according to the size of each semiconductor element, adjacent groove 14 distance each other is different.Such as, in Fig. 5 (b), width W1 ＜ width W2.Additionally, in the case of the insulating properties of the semiconductor element needing raising to adjoin or from the viewpoint of the design item of the semiconductor device being made up of this semiconductor element, make the width of groove 14 broaden also may be used relative to the width of other groove 14.Such as, in Fig. 5 (b), width W3 ＞ width W4.
It follows that form, in the respective side of groove 14 and bottom surface, groove internal oxidition film 15(Fig. 5 (c) being made up of silicon dioxide).Specifically, make Si substrate 11 be exposed in the oxygen atmosphere of high temperature, make the Si thermal oxide exposed in the side of groove 14 and bottom surface, form groove internal oxidition film 15.
It follows that to fill groove 14 and to cover Si3N4The mode of film 13, forms embedment oxide-film 16(Fig. 5 (d) being made up of silicon dioxide).Specifically, by employing SiH4Gas and O2Bias high density type plasma activated chemical vapour deposition (the HDP-CVD:High Density of gas
Plasma-Chemical Vapor Deposition) method, in making silicon dioxide be deposited in groove 14 and Si3N4On film 13, form embedment oxide-film 16.Here, be stacked on groove 14 inside and Si due to silicon dioxide simultaneously3N4On film 13, so forming recess 16a and protuberance 16b on the surface of embedment oxide-film 16.Additionally, in embodiment 1, due to the Si formed in the element-forming region with width W13N4Other Si of the width ratio of film 133N4The width of film 13 is narrow, and the groove 14 with width W3 adjoins with the element-forming region with width W1, so being difficult in the element-forming region with width W1 pile up silicon dioxide, having the protuberance 16b in the element-forming region of width W1 compared with the protuberance 16b in other element-forming region, it is the lowest.
It follows that by cmp (CMP:Chemical Mechanical Polishing) method, implement to grind to embedment oxide-film 16, make the protuberance 16b of embedment oxide-film 16 diminish (Fig. 6 (a)).Specifically, use disperse medium (additive) relative to ceria particles (CeO2) the ceria lapping liquid (the 1st grinding-material) that mixing ratio (following, be also recited as the mixing ratio of disperse medium/ceria particles) is 0.3 implement to grind.Here, disperse medium uses acrylic resin (polyoxylate).As amount of grinding, can be at Si3N4Embedment oxide-film 16(on film 13 i.e., protuberance 16b) do not disappear in the range of (that is, do not exposing Si3N4In the range of film 13) suitably it is adjusted.Furthermore it is preferred that Si3N4The thickness of the embedment oxide-film 16 on film 13 is the most thinning, for example, it is preferable to Si3N4The thickness of the embedment oxide-film 16 on film 13 becomes to be of about the mode of below 700nm to be implemented to grind.Further, this operation to be referred to as the 1st grinding step.
In the present embodiment, owing to the mixing ratio of disperse medium/ceria particles is set as less than 0.5, so the grinding rate of embedment oxide-film is relative to the ratio (=[grinding rate of embedment oxide-film]/[grinding rate of nitride film]) of the grinding rate of nitride film, i.e. embedment oxide-film diminishes relative to the grinding selectivity ratio of nitride film, even if SiO2The thickness of film increases, and grinding rate also will not reduce.Hereinafter, also embedment oxide-film is only recited as relative to the grinding selectivity ratio of nitride film the selection ratio of oxide-film/nitride film.And, in this operation, do not exposing Si3N4Implement in the range of film 13 to grind, even if therefore the selection of oxide-film/nitride film is smaller than becoming, also will not produce Si3N4Film 13 is by the problem of partly grinding.
It follows that utilize CMP method, implement to grind to embedment oxide-film 16, carry out imbedding the planarization (Fig. 6 (b)) of oxide-film 16.Specifically, the ceria lapping liquid (the 2nd grinding-material) that mixing ratio is 0.8 of disperse medium/ceria particles is used to implement to grind, by Si3N4Embedment oxide-film 16(on film 13 i.e., protuberance 16b) all remove, and make embedment oxide-film 16 and Si3N4The exposed surface planarization of film 13.Further, this operation to be referred to as the 2nd grinding step.
In the present embodiment, owing to the mixing ratio of disperse medium/ceria particles is set as more than 0.5, so the selection ratio of oxide-film/nitride film becomes bigger.Therefore, Si3N4Film 13 plays a role as the barrier film of CMP, Si3N4Film 13 also will not be ground.In addition, owing to the mixing ratio of disperse medium/ceria particles is set in more than 0.5, so while worry grinding rate reduces, but it is thinning (such as owing to imbedding the thickness of oxide-film 16 in the 1st above-mentioned grinding step, below 700nm), so being difficult to produce the reduction of grinding rate, easily and embedment oxide-film 16 and Si can be made with high precision3N4The exposed surface planarization of film 13.
Further, carry out the 1st above-mentioned grinding step continuously in same device and the 2nd grinding step also may be used.Thus, the operation of the swap time etc. of the take-off time of Si substrate 11, grinding-material can be omitted, the shortening of manufacturing time can be sought.
It follows that by the etch processes using fluohydric acid gas (HF), remove a part (Fig. 6 (c)) for embedment oxide-film 16.In the present embodiment, in the way of the side from groove 14 not exposed pad oxide-film 12, the respective thickness of embedment oxide-film 16 making each groove 14 of filling is thinning.Although further, from the side of groove 14 exposed pad oxide-film 12 also can, but be preferably etched in the range of groove internal oxidition film 15 not exposing from groove 14.
It follows that processed by hot phosphoric acid, by Si3N4Film 13 all removes (Fig. 6 (d)).Then, by using the etch processes again of fluohydric acid gas, remove pad oxide film 12 and a part for embedment oxide-film 16, make the surface of Si substrate 11 become smooth (Fig. 6 (e)).Thus, being formed of element isolation layer 20 being made up of groove internal oxidition film 15 and embedment oxide-film 16 is terminated.
The forming method of the element isolation layer according to the present embodiment, by the grinding step in two stages in filling groove 14 and at Si3N4The embedment oxide-film 16 formed on film 13 is ground, and implements embedment oxide-film 16 and Si3N4The planarization of film 13.And, in the grinding step in these two stages, compared with the selection ratio of the oxide-film/nitride film of the ceria lapping liquid of the 1st grinding step first carried out, after the selection of the oxide-film/nitride film of the ceria lapping liquid of the 2nd grinding step that carries out than big.By the grinding step in such two stages, the Si after grinding step can be prevented3N4The residual of the embedment oxide-film 16 on film 13 and Si3N4The disappearance of film 13.That is, according to the forming method of the element isolation layer of the present invention, it is possible to make the controlling in the grinding step of the embedment oxide-film 16 formed in Semiconductor substrate 11 improve, form the element isolation layer 20 of the interelement separating property with brilliance.
Have again, in the above-described embodiment, the mixing ratio of the disperse medium/ceria particles of the ceria lapping liquid of the 1st grinding step is set to less than 0.5, the mixing ratio of the disperse medium/ceria particles of the ceria lapping liquid of the 2nd grinding step is set to more than 0.5, but it is not limited to this, is suitably adjusted also may be used in the selection of the oxide-film/nitride film of the ceria lapping liquid of the 2nd grinding step is than big scope compared with the selection ratio of the oxide-film/nitride film of the ceria lapping liquid of the 1st grinding step.
[embodiment 2]
In embodiment 1, use the mixing ratio of disperse medium/ceria particles less than 0.5(specifically 0.3) ceria lapping liquid carry out the 1st grinding step, but use other grinding-material to carry out the 1st grinding step and also may be used.Hereinafter, the 1st grinding step of different to use and embodiment 1 grinding-materials illustrates.Further, owing to other operation and embodiment 1 are identical, so the description thereof will be omitted.
In the 1st grinding step of embodiment 2, by using as employing by SiO2The CMP method of the Silica abrasive liquid of the grinding-material of the silicon dioxide granule constituted, makes the protuberance 16b of embedment oxide-film 16 diminish.Amount of grinding and embodiment 1 similarly, can be at Si3N4Embedment oxide-film 16(on film 13 i.e., protuberance 16b) do not disappear in the range of (that is, do not exposing Si3N4In the range of film 13) suitably it is adjusted.Furthermore it is preferred that Si3N4The thickness of the embedment oxide-film 16 on film 13 is the most thinning, for example, it is preferable to Si3N4The thickness of the embedment oxide-film 16 on film 13 becomes the mode of about below 700nm and implements to grind.
In the present embodiment, owing to using Silica abrasive liquid, so the selection of oxide-film/nitride film is smaller than becoming, even if SiO2The thickness of film increases, and grinding rate also will not reduce.And, in this operation, owing to not exposing Si3N4Implement in the range of film 13 to grind, even if so the selection of oxide-film/nitride film is smaller than becoming, also will not produce Si3N4The problem that film 13 is partly ground.
As described above, in the 1st grinding step and the 2nd grinding step, even if in the case of using different types of grinding-material, if the ratio that selects of the oxide-film/nitride film of the grinding-material used in the 2nd grinding step is more than the selection ratio of the oxide-film/nitride film of the grinding-material of use in the 1st grinding step, the effect same with embodiment 1 also can be obtained.
[embodiment 3]
In the 2nd grinding step using ceria lapping liquid in embodiment 1 and embodiment 2, always sustainable supply ceria lapping liquid is ground, but it is not limited to this, replaces ceria lapping liquid and temporarily supply other solution and grind and also may be used.With reference to Fig. 7 and Fig. 8, other the 2nd grinding step is illustrated.Fig. 7 is that Fig. 8 is the chart of the relation representing milling time and grinding rate in the 2nd grinding step and existing grinding step of embodiment 3 for the profile illustrating other the 2nd grinding step using ceria lapping liquid.Further, owing to being identical for the content of other operation and embodiment 1, so giving identical reference, the description thereof will be omitted.
After the 1st grinding step, the ceria lapping liquid that mixing ratio is 0.8 of disperse medium/ceria particles is supplied on abradant surface while implementing the grinding of 60 seconds.After such milled processed, at Si3N4Embedment oxide-film 16(Fig. 7 (a) is remained) on film 13.In such milled processed, owing to using the ceria lapping liquid that mixing ratio is 0.8 of disperse medium/ceria particles, so along with the process of milling time, grinding rate reduces.As shown in Figure 8, behind from grinding and starting 30 seconds, it is about the grinding rate of 450nm/min, but grinding rate is reduced to about 100nm/min behind starting from grinding 60 seconds.This is because as shown in Figure 7 (a), the disperse medium 70 comprised in ceria lapping liquid adsorbs on embedment oxide-film 16 (that is, on abradant surface).
From grinding and starting, after 60 seconds, stop the supply of ceria lapping liquid, replace ceria lapping liquid that pure water is supplied on abradant surface implement the grinding of 10 seconds.Now, owing to not supplying grinding-material, so the grinding of oxide-film 16 will not be carried out imbedding, but the disperse medium 70 that absorption is on embedment oxide-film 16 is rinsed (Fig. 7 (b)).That is, by the milled processed of such supply pure water, thus the surface of embedment oxide-film 16 is cleaned.Grind further, also milled processed to be referred to as water or clean grinding.
After water grinding terminates, the ceria lapping liquid that mixing ratio is 0.8 of disperse medium/ceria particles is supplied on abradant surface, while implementing the grinding of 60 seconds, by Si3N4Embedment oxide-film 16(on film 13 i.e., protuberance 16b) all remove, and make embedment oxide-film 16 and Si3N4Exposed surface planarization (Fig. 7 (c)) of film 13.In such milled processed, owing to using the ceria lapping liquid that mixing ratio is 0.8 of disperse medium/ceria particles, so reducing through grinding rate along with milling time, but temporarily eliminate, owing to being ground by above-mentioned water, the disperse medium 70 adsorbed on embedment oxide-film 16, so grind from water terminate after after 30 seconds (90 seconds in fig. 8) grinding rate be about 300nm/min, grind from water terminate after after 60 seconds (120 seconds in fig. 8) grinding rate be about 150nm/min.I.e., it is known that ground by above-mentioned water, grinding rate recovers.
On the other hand, grind in such existing milled processed not carrying out water, as shown in Figure 8, along with reducing through grinding rate of milling time.This is because disperse medium 70 adsorbs the grinding hindering ceria particles at abradant surface.
As described above, in the grinding step using ceria lapping liquid, by replacing ceria lapping liquid to supply pure water and be ground, absorption disperse medium on abradant surface can be removed, the grinding rate using ceria lapping liquid after recovering.
Have again, in the above-described embodiment, the situation of the 2nd grinding step of the ceria lapping liquid that mixing ratio is 0.8 using disperse medium/ceria particles is illustrated, but in using the 1st grinding step of the ceria lapping liquid that mixing ratio is 0.3 of disperse medium/ceria particles, imports above-mentioned water grinding also may be used.Additionally, the liquid supplied to remove disperse medium is not limited to pure water, other the ablution such as ethanol is used also may be used.And then, in the grinding step using ceria lapping liquid, carry out repeatedly water grinding and also may be used.
The explanation of reference
11 Si substrates；12 pad oxide films；13 Si3N4Film；14 grooves；15 groove internal oxidition films；16 embedment oxide-films；20 element isolation layer.
Claims (7)
1. the forming method of an element isolation layer, it is characterised in that have:
Sequentially form the operation of pad oxide film and nitride film on the surface of a semiconductor substrate；
Form the operation of groove within through described pad oxide film and nitride film, the described Semiconductor substrate of arrival；
The operation of embedment oxide-film is formed in the way of filling described groove and covering described nitride film；
The operation that described embedment oxide-film is ground by the 1st grinding-material is used in the way of remaining described embedment oxide-film on described nitride film；And
Use the 2nd grinding-material to grind described embedment oxide-film, described nitride film is made to expose, and make the operation that the exposed surface of described nitride film and described embedment oxide-film planarizes, wherein said 2nd grinding-material possesses the grinding selectivity ratio bigger relative to the grinding selectivity ratio of described nitride film than the described embedment oxide-film of described 1st grinding-material
In the operation using described 2nd grinding-material that described embedment oxide-film is ground, carry out the operation repeatedly removed by described 2nd grinding-material.
The forming method of element isolation layer the most according to claim 1, it is characterised in that use the grinding rate of the grinding step of described 1st grinding-material to be more than the grinding rate of the grinding step using described 2nd grinding-material.
The forming method of element isolation layer the most according to claim 2, it is characterized in that, described 1st grinding-material be disperse medium relative to the ceria lapping liquid that the mixing ratio of ceria particles is less than 0.5, described 2nd grinding-material be described mixing ratio be the ceria lapping liquid of more than 0.5.
The forming method of element isolation layer the most according to claim 2, it is characterized in that, described 1st grinding-material is Silica abrasive liquid, and described 2nd grinding-material is the disperse medium ceria lapping liquid that mixing ratio is more than 0.5 relative to ceria particles.
5. according to the forming method of the element isolation layer described in claim 3 or 4, it is characterised in that use described ceria lapping liquid to comprise, to the operation grinding described embedment oxide-film, the operation that the abradant surface to described embedment oxide-film is cleaned.
6. according to the forming method of the element isolation layer described in any one of Claims 1-4, it is characterized in that, also have: remove a part for described embedment oxide-film, described pad oxide film and described nitride film, make the operation of the surface planarisation of described Semiconductor substrate.
The forming method of element isolation layer the most according to claim 5, it is characterised in that also have: remove a part for described embedment oxide-film, described pad oxide film and described nitride film, make the operation of the surface planarisation of described Semiconductor substrate.
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| JP2010285660A JP5835890B2 (en) | 2010-12-22 | 2010-12-22 | Method for forming inter-element isolation layer |
| JP2010-285660 | 2010-12-22 |
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| CN100464394C (en) * | 2005-07-11 | 2009-02-25 | 富士通微电子株式会社 | Manufacture of semiconductor device with cmp |
| CN100521108C (en) * | 2006-07-11 | 2009-07-29 | 恩益禧电子股份有限公司 | Method of manufacturing semiconductor device |
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| CN100464394C (en) * | 2005-07-11 | 2009-02-25 | 富士通微电子株式会社 | Manufacture of semiconductor device with cmp |
| CN100521108C (en) * | 2006-07-11 | 2009-07-29 | 恩益禧电子股份有限公司 | Method of manufacturing semiconductor device |
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