CN102591823A - NAND flash controller with instruction queue function - Google Patents

NAND flash controller with instruction queue function Download PDF

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CN102591823A
CN102591823A CN 201110009500 CN201110009500A CN102591823A CN 102591823 A CN102591823 A CN 102591823A CN 201110009500 CN201110009500 CN 201110009500 CN 201110009500 A CN201110009500 A CN 201110009500A CN 102591823 A CN102591823 A CN 102591823A
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nandflash
instruction queue
instruction
controller
system
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CN 201110009500
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迟志刚
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上海华虹集成电路有限责任公司
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Abstract

The invention provides a NAND flash controller with an instruction queue function, which is composed of a micro controller, a system interface controller, a system-side DMA (direct memory access) controller, a system memory access arbitration logic unit, a system memory, a NAND flash instruction queue memory, a NAND flash instruction queue execution control logic unit, a NAND flash DMA controller, a NAND flash data cache and a NAND flash interface controller. The whole implementation process of NAND flash instruction is controlled completely by the NAND flash instruction queue execution control logic unit, and participation of the micro controller is not needed. The controller of the invention can greatly simplify the programming design of a system, and improve the instruction execution speed of the system, thereby improving system performance.

Description

一种具有指令队列功能的Nandflash控制器 Nandflash instruction queue controller having a function

技术领域 FIELD

[0001] 本发明涉及一种Nandflash控制器,尤其涉及一种具有指令队列功能的Nandflash 控制器。 [0001] The present invention relates to a controller Nandflash, particularly to a controller instruction queue Nandflash function.

背景技术 Background technique

[0002] Nandflash在最近几年里得到了突飞猛进的发展,由1位/单元的SLC(单层式存储)技术发展到了2位/单元甚至3位/单元的MLC(多层式存储)技术,同时Nandflash的生产工艺也不断进步。 [0002] Nandflash has been rapid development in recent years, the SLC 1 bits / cell (single-level) technology to the MLC (multi-layer storage) art 2 bit / cell and even 3 bits / cell, Nandflash production process while also continue to progress. 随着技术的发展,Nandflash容量不断增大,单位容量的成本也大幅降低,应用Nandflash的领域也越来越多。 As technology advances, Nandflash capacity is increasing, the cost per capacity is also greatly reduced, Nandflash applications is also increasing. 随着Nandflash技术的发展,Nandf Iash的指令越来越多,Nandflash控制器的硬件设计越来越复杂,同时越来越多的指令增加了系统软件的设计复杂度。 With the development of technology Nandflash, Nandf Iash instruction more and more, Nandflash controller hardware design more complex, while an increasing number of instructions increases the design complexity of the system software.

[0003] 基于上述问题,如何能在Nandflash控制器的设计过程中,找到一种较好的方案,既能解决当今Nandflash控制器控制指令多,执行速度慢的情形,又能简化系统软件设计成为本发明要解决的问题。 [0003] Based on the above question, how can the design process Nandflash controller, to find a better solution, both to solve the case today Nandflash controller instruction multiple, slow implementation, but also designed to simplify the system software the present invention is to solve the problem.

发明内容 SUMMARY

[0004] 本发明目的在于提供一种具有指令队列功能的Nandflash控制器,通过在系统硬件中增加指令队列设计,提高Nandflash控制器的执行速度,从而简化Nandflash控制器的程序设计,提高系统整体性能。 [0004] The object of the present invention to provide a controller having an instruction queue Nandflash function, by adding an instruction queue in the system hardware design, to improve execution speed Nandflash controller, thereby simplifying programming Nandflash controller, improve overall system performance .

[0005] 一种具有指令队列功能的Nandflash控制器,由微控制器、系统接口控制器、系统端DMA控制器、系统存储器访问仲裁逻辑单元、系统存储器、Nandflash指令队列存储器、Nandflash指令队列执行控制逻辑单元、Nandflash DMA控制器、Nandflash数据缓存区和Nandflash接口控制器构成。 Nandflash Controller [0005] having a function instruction queue, by the microcontroller, the system interface controller, a DMA controller system side, a system memory access arbitration logic unit, a system memory, a memory instruction queue Nandflash, execution control instruction queue Nandflash logic unit, Nandflash DMA controller, and data cache Nandflash Nandflash interface controller configuration.

[0006] 微控制器,系统主控制单元,控制系统中各单元; [0006] microcontroller, system main control unit, the control system of each unit;

[0007] 系统接口控制器,用于以特定协议和主控端进行数据传输,特定协议包含IDE、USB、SATA 禾口PCIE 等; [0007] The system interface controller for data transmission to the master device specific protocols and the particular protocol includes IDE, USB, SATA port Wo PCIE and the like;

[0008] 系统端DMA控制器(Direct Memory Access直接存储器访问),用于系统接口控制器和系统存储器之间的数据传输; [0008] The end of the system DMA controller (Direct Memory Access Direct Memory Access), for data transmission between the system and a system memory interface controller;

[0009] 系统存储器访问仲裁逻辑单元,用于仲裁微控制器、系统接口控制器和Nandflash控制器对系统存储器的访问请求; [0009] The system memory access arbitration logic unit for arbitrating a microcontroller, an interface controller and the system controller Nandflash requests access to system memory;

[0010] 系统存储器,用于暂存存储系统端和Nandflash控制器间传输的数据,也用于存放当前数据读写所使用的地址映射表; [0010] System memory for temporary storage of data between end systems and transmission controllers Nandflash also for storing a current read address mapping table data is used;

[0011] Nandflash指令队列存储器,用于存放Nandflash指令执行过程中所需的信息,包含指令类型、行地址、列地址、数据大小、系统存储器地址等; [0011] Nandflash instruction queue memory for storing information required to process Nandflash instruction executed, comprising an instruction type, row address, column address, data size, the system memory address;

[0012] Nandflash指令队列执行控制逻辑单元,用于根据Nandflash指令的信息控制指令的执行;[0013] Nandflash DMA控制器,用于控制系统存储器与Nandflash数据缓存区的数据传输; [0012] Nandflash instruction execution queue control logic unit for performing a control command according to the information of the instruction Nandflash; [0013] Nandflash DMA controller for system memory and the data transfer control Nandflash the data buffer;

[0014] Nandflash数据缓存区,用于缓存从系统存储器读出但来不及写入Nandflash的数据,也用于缓存从Nandflash读出但来不及写入系统存储器的数据; [0014] Nandflash data buffer, for buffering system memory read from time to write data, but the Nandflash, but also for reading out the data buffer written to system memory from time to Nandflash;

[0015] Nandflash接口控制器,控制Nandflash控制器与Nandflash阵列之间的数据传输。 [0015] Nandflash interface controller, controlling the data transfer between the controller and Nandflash Nandflash array.

[0016] 系统接收到访问Nandflash的请求时,将访问请求拆分成对Nandflash的读、写或者擦除的指令,写入Nandflash指令队列并通知Nandflash指令队列执行控制逻辑单元开始执行Nandflash的指令。 When [0016] the system receives a request to access the Nandflash, resolved into a read request to access the Nandflash, write or erase command, write command queue Nandflash Nandflash instruction and notifies the control unit starts execution logic Nandflash execution queue.

[0017] Nandflash指令队列执行控制逻辑单元首先检查要访问的Nandflash的状态,若为空闲则将Nandflash指令发送给Nandflash。 [0017] Nandflash instruction execution queue control logic checks the status of the Nandflash be accessed, then when the idle command to the Nandflash Nandflash. 若不为空闲,则需等待Nandflash变为空闲,然后再将Nandflash指令发送给Nandflash。 If not idle, Nandflash need to wait to become idle, and then sent to the instruction Nandflash Nandflash.

[0018] Nandflash指令队列执行控制逻辑单元将指令发送给Nandflash后,Nandf Iash准备好接收数据或者发送数据后,启动Nandflash DMA控制器向Nandflash写入数据或者从Nandflash读出数据。 [0018] Nandflash instruction queue after execution control logic unit instruction to Nandflash, Nandf Iash ready to receive data or transmit the data, the DMA controller starts Nandflash Nandflash or write data to the read data from Nandflash.

[0019] Nandflash指令的整个执行过程完全由Nandflash指令队列执行控制逻辑单元控制,无需微控制器的参与。 [0019] Nandflash throughout the execution of the instruction queue full logic Nandflash instruction execution control unit controls, without participation of the microcontroller. Nandflash指令队列执行控制逻辑单元的控制可以更高效快速的执行Nandflash指令,不需微控制器参与Nandflash指令执行的控制,能够简化系统的程序设计,提高指令执行速度。 Nandflash execution instruction queue control logic unit may be more efficient and rapid execution instruction Nandflash without participation Nandflash microcontroller instruction execution control can be simplified programming system and improve instruction execution speed.

附图说明 BRIEF DESCRIPTION

[0020] 图1具有指令队列功能的Nandflash控制器电路结构图 [0020] FIG 1 Nandflash circuit configuration diagram of a controller having a function instruction queue

[0021] 图2NandflaSh控制器读/写/擦除指令中Nandflash状态跳转示意图 [0021] FIG 2NandflaSh controller read / write / erase schematic Nandflash state transition instruction

具体实施方案 Specific embodiments

[0022] 以下结合各附图对本发明所提出的内容进行详细的描述。 [0022] The following in connection with the accompanying drawings of the content proposed by the present invention is described in detail.

[0023] Nandflash指令队列深度取决于Nandflash控制器可以同时执行的Nandflash指令的数量,一般等于Nandflash控制器所连接的Nandflash的数量。 [0023] Nandflash instruction queue depth depends Nandflash Nandflash instruction can be executed while the controller number, typically equal to the number of controllers connected Nandflash Nandflash. 以下表中Nandflash指令内容为例: The following table Nandflash instruction contents as an example:

[0024] [0024]

Figure CN102591823AD00051

[0025] [0025]

[0026]表 INandflash 指令内容 [0026] Table instruction contents INandflash

[0027] 如上表中所示,每个Nandflash指令的内容共占用16个字节。 As shown in [0027] the table above, the total contents of each instruction Nandflash occupies 16 bytes.

[0028] 每个Nandflash指令都对应一个状态位寄存器,指示指令队列的状态。 [0028] Each instruction corresponds Nandflash a status register bit, indicates the status of the instruction queue. 当系统将一条Nandflash指令写入Nandflash指令队列时,就对应的状态寄存器置1,当Nandflash指令队列执行控制逻辑执行完一条Nandflash指令之后,将对应的态寄存器置0。 When a system Nandflash Nandflash write instruction when the instruction queue, the corresponding condition register to 1, when the instruction queue Nandflash logic execution control instruction after executing a Nandflash, corresponding to the condition register to 0. 系统在将Nandflash指令写入指令队列前,需要检查有没有为0的Nandflash指令队列状态位寄存器,若有则选择一个对应位置写入,若无则需等待任一个Nandflash指令队列状态位寄存器变为0。 Nandflash system before the write instruction command queue, there is no need to check for the Nandflash 0 instruction queue status register bit, if the write select a corresponding position, without any need to wait a bit Nandflash instruction queue status register becomes 0.

[0029] Nandflash在一个Nandflash指令执行过程中处于不同的状态,Nandflash指令队列执行控制逻辑单元需要根据Nandflash所处的状态来决定对Nandflash采取什么样的操作。 [0029] Nandflash in different states during execution of a command Nandflash, Nandflash execution instruction queue control logic required to decide what actions to take based on the state of Nandflash Nandflash located. 图2给出了Nandflash写指令、读指令、擦指令执行过程中的所处的状态及其先后次序,针对图中各状态的说明如表2中所示: Figure 2 shows Nandflash write command, read command, the process execution instruction in a state in which the wiping their priorities, as described in Table 2 shown in FIG respect of each state:

[0030] [0030]

Figure CN102591823AD00052

[0031] 表2NandflaSh各执行过程中的所处的状态说明 [0031] Table 2NandflaSh state in which the execution of the instructions in each

[0032] 以下表3中给出了各状态跳转的条件: [0032] Table 3 below shows the conditions of each state transition of:

[0033] [0033]

Figure CN102591823AD00061

[0034] [0034]

[0035] 表3状态跳转条件说明 [0035] The state transition condition described in Table 3

[0036] 系统将对Nandflash的读、写或者擦除的指令写入Nandflash指令队列存储器后,将对应的Nandflash指令队列状态寄存器置1。 After [0036] the system will Nandflash read, write or erase command write Nandflash instruction queue memory instruction queue corresponding Nandflash condition register to 1.

[0037] Nandflash指令队列执行控制逻辑单元检测到Nandflash指令队列状态寄存器由0变1后,从Nandflash指令队列中读取出Nandflash指令的信息。 [0037] Nandflash instruction execution queue control logic unit detects Nandflash instruction queue status information is read by the register 0 to 1, from the instruction queue Nandflash Nandflash instruction.

[0038] Nandflash指令队列执行控制逻辑单元根据Nandflash指令的行地址确定要访问的Nandf lash。 [0038] Nandflash instruction execution queue control logic unit determines Nandf lash row address to be accessed according to the instruction Nandflash. 首先检查要访问的Nandflash的状态,若为空闲则将Nandflash指令发送给Nandflash。 First, check the status of Nandflash to be accessed, if it is idle Nandflash instruction will be sent to Nandflash. 若不为空闲,则需要等待Nandflash变为空闲,然后再将Nandflash指令发送给Nandflash0 If idle, then wait Nandflash becomes idle, then Nandflash command to the Nandflash0

[0039] Nandflash指令队列执行控制逻辑单元将指令发送给Nandflash后,需等Nandflash准备好接收数据或者发送数据以后,配置Nandflash DMA控制器向Nandflash存储器写入数据或者从Nandflash存储器中读出数据。 [0039] Nandflash instruction execution queue control logic unit sends an instruction to the Nandflash, Nandflash to wait ready to receive data or transmit data after the DMA controller arranged Nandflash Nandflash write data to memory or read from memory Nandflash.

[0040] 在Nandflash指令执行的过程中,完全由Nandflash指令队列执行控制逻辑单元控制,无须微控制器的参与。 [0040] Nandflash during instruction execution, the execution queue is completely controlled by the control logic unit instruction Nandflash, without participation of the microcontroller. 相对于微控制器,Nandflash指令队列执行控制逻辑单元控制可以更高效快速的执行Nandflash指令。 With respect to the microcontroller, Nandflash execution control instruction queue control logic unit can be more efficiently performed quickly Nandflash instructions. 由于不需要微控制器参与Nandflash指令执行的控制,系统的软件程序设计也得到简化,提高系统的执行速度,进而提高系统性能。 Since no involvement Nandflash microcontroller instruction control execution, the software program is also simplified design of the system, improve the execution speed of the system, thereby improving system performance.

Claims (6)

  1. 1. 一种具有指令队列功能的Nandflash控制器,其特征在于包含Nandflash指令队列存储器和Nandflash指令队列执行控制逻辑单元。 A controller having instructions Nandflash queue function, characterized by comprising a memory and an instruction queue Nandflash Nandflash execution instruction queue control logic unit.
  2. 2.如权利要求1所述的一种具有指令队列功能的Nandflash控制器,其特征在于所述Nandflash指令队列存储器存放Nandflash指令执行过程中所需的信息,包含指令类型、行地址、列地址、数据大小、系统存储器地址。 2. one of the claim 1, having an instruction queue control function Nandflash, wherein said instruction queue memory storing Nandflash Nandflash instruction information needed during execution of instructions contained type, row address, column address, data size, the system memory address.
  3. 3.如权利要求1或2所述的一种具有指令队列存储器的Nandflash控制器,其特征在于所述Nandflash指令队列存储器为系统软件和硬件之间的接口。 One or more of the claim 12 having a memory instruction queue controller Nandflash, wherein said instruction queue memory Nandflash as an interface between the hardware and software systems.
  4. 4.如权利要求1所述的一种具有指令队列功能的Nandflash控制器,其特征在于所述Nandflash指令队列执行控制逻辑单元先检查要访问的Nandflash的状态,若为空闲则将Nandflash 指令发送给Nandflash。 As claimed in one of the claim. 1 Nandflash having instruction queue controller function, wherein said execution instruction queue Nandflash check the status of the control logic unit to access the Nandflash, then if it is an idle command to the Nandflash Nandflash.
  5. 5.如权利要求1所述的一种具有指令队列功能的Nandflash控制器,其特征在于所述Nandflash指令队列执行控制逻辑单元控制Nandflash指令的整个执行过程,无需系统中微控制器参与。 5. one of the claim 1, having an instruction queue control function Nandflash, wherein said execution instruction queue Nandflash throughout the execution of the control logic unit controls Nandflash instruction, without participation of the microcontroller system.
  6. 6.如权利要求1所述的一种具有指令队列功能的Nandflash控制器,其特征在于所述Nandflash控制器与主控端通信接口包含SATA、USB、PCIE、PATA。 6. one of the claim 1, having an instruction queue control function Nandflash, wherein said master controller and a communication interface Nandflash comprise SATA, USB, PCIE, PATA.
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CN101046725A (en) * 2007-03-23 2007-10-03 忆正存储技术(深圳)有限公司 Flash controller
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CN102654855A (en) * 2011-03-04 2012-09-05 上海华虹集成电路有限责任公司 Nandflash controller for programming Nandflash instruction execution
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