CN102591816A

CN102591816A - Multichannel Nandflash storage system

Info

Publication number: CN102591816A
Application number: CN201110009602XA
Authority: CN
Inventors: 迟志刚
Original assignee: Shanghai Huahong Integrated Circuit Co Ltd
Current assignee: Shanghai Huahong Integrated Circuit Co Ltd
Priority date: 2011-01-17
Filing date: 2011-01-17
Publication date: 2012-07-18

Abstract

The invention provides a multichannel Nandflash storage system, which comprises a microcontroller, a system interface controller, a system memory access arbitration logic unit, a system memory, a Nandflash controller and a Nandflash memory array. By means of uniformly storing address mapping tables into all Nandflash memories and using the characteristic that the multichannel Nandflash storage system can parallelly read data from the Nandflash memories, multiplied address mapping tables can be read at the same time, so that address mapping speed is increased, and further read-write performances of the multichannel Nandflash storage system are improved.

Description

A kind of hyperchannel Nandflash storage system

Technical field

The present invention relates to a kind of Nandflash storage system, relate in particular to the hyperchannel Nandflash storage system of a kind of location evenly distributedly mapping table.

Background technology

The Nandflash technology is in the development that obtained in the most several years advancing by leaps and bounds; By SLC (single-layer type storage) technical development of 1/unit to 2/unit; Even the MLC of 3/unit (multiple field storage) technology, the production technology of Nandflash also obtains constantly progressive simultaneously.Along with the development of technology, the capacity that Nandflash uses constantly increases, and the cost of unit capacity also significantly reduces, and the field of application Nandflash also more and more widely.

Present Nandflash memory device requires increasingly highly to bandwidth, and the Nandflash controller adopts usually and increases number of channels and improve bandwidth.Along with the increase of Nandflash capacity of memory device, deposit the address mapping table also thereupon increase of logical address in the memory device to the physical address map relation.If address mapping table is left concentratedly in the Nandflash of a slice or part, these Nandflash storeies will inevitably become the bottleneck of system performance.

How to design a kind of Nandflash memory technology; Can address mapping table be distributed to each sheet Nandflash storer equably; Make reading in the system storage that the continuous address mapping table of polylith can walk abreast; The shortening system reads the time of address mapping table, improves the readwrite performance of hyperchannel Nandflash memory device, becomes the technical matters that the present invention will solve.

Summary of the invention

The object of the invention provides a kind of hyperchannel Nandflash storage system; Employing is distributed to address mapping table the implementation of each sheet Nandflash storer equably; The continuous address mapping table of polylith can be read in the system storage concurrently, thereby improve the readwrite performance of hyperchannel Nandflash storage system.

A kind of hyperchannel Nandflash storage system is made up of microcontroller, system interface controller, system memory accesses arbitration logic unit, system storage, Nandflash controller and Nandflash memory array.

Microcontroller, system's central control unit is realized the control to total system;

System interface controller is used for carrying out data transmission with certain specific protocol (like IDE, USB, SATA and PCIE etc.) and main control end;

The system memory accesses arbitration logic unit is in order to arbitration microcontroller, system interface controller and the Nandflash controller access request to system storage;

System storage is used for keeping in the data of transmitting between storage system end and Nandflash controller, also is used for store data and reads and writes employed address mapping table;

The Nandflash controller, be used to control and the Nandflash array between data transmission;

The Nandflash memory array, a plurality of Nandflash storeies constitute, and are used to deposit user data, address mapping table etc.

When system writes certain logical address for the first time, need to make up address mapping table, the address mapping table of structure is that unit evenly deposits in each sheet Nandflash storer with page or leaf (page).When address mapping table was read from Nandflash by system, parallel address mapping table of from each sheet Nandflash storer, respectively reading one page was deposited in the system storage.

In the time of need the address mapping table of being rewritten in the system storage being write back the Nandflash storer, same Nandflash storer before still writing back to; When address mapping table write back, a plurality of passages can write back the address mapping table of being rewritten simultaneously.

When system receives the request of read/write Nandflash storer, check at first whether required address mapping table leaves in the system storage, if not, then from the Nandflash storer, read address mapping table; If yes, then do not need from the Nandflash storer, to read address mapping table.

Address mapping table is left in each Nandflash storer uniformly; Utilize can the walk abreast characteristic of from Nandflash sense data of hyperchannel Nandflash system; In the same time, can read the address mapping table of several times size; Thereby improve the speed of map addresses, and then improve the readwrite performance of hyperchannel Nandflash storage system.

Description of drawings

Fig. 1 hyperchannel Nandflash provided by the invention memory system architecture block diagram

Embodiment

Below in conjunction with accompanying drawing the hyperchannel Nandflash accumulator system that the present invention proposes is carried out detailed description.

Fig. 1 is the basic structure block diagram of hyperchannel Nandflash accumulator system, has comprised the main control end of carrying out communication with this system simultaneously.Main control end comprises but is not limited to the communication interface pattern of standards such as SATA, USB, PCIE, PATA.

Microcontroller adopts flush bonding processor, operation firmware on it.Firmware mainly contains two parts function: the one, the Data Transport Protocol of main control end is changed into the operation to the Nandflash storer; The 2nd, realize flash memory transport layer (FTL) control of Nandflash storer.Flash memory transport layer FTL comprises map addresses, the recovery of rubbish piece, wear leveling, bad block management etc.

System interface controller is responsible for according to certain agreement (like IDE, USB, SATA and PCIE etc.) reception or is transmitted data, is designed with buffer memory in the system controller usually, is used to handle main control end and the unmatched situation of system end speed.

System storage is used for data cached, also can be used for the storage address mapping table, also can be used as the running space of firmware.The size of system storage is confirmed by the data bandwidth of system, the factors such as re-transmission policy, map addresses strategy of writing.

System memory accesses arbitration logic unit arbitration different units is to the access request of system storage.When microcontroller, system interface controller and Nandflash controller simultaneously during access system memory, arbitrated logic is arbitrated according to pre-configured priority.

The Nandflash controller is responsible for controlling the interface sequence of Nandflash memory array.The Nandflash controller comprises a plurality of passages, and each passage is made up of a plurality of chip selection signals (CE#), a plurality of ready/busy signal (R/B#), one group of control signal, one group of data-signal.A plurality of passages can be simultaneously from the Nandflash storer sense data or write data to the Nandflash storer.

The Nandflash memory array is classified the storage medium of storage system as, deposits user data, address mapping table etc.

Adopted the instance of four-way, every passage two Nandflash memory constructions in embodiment of the present invention.Suppose that native system possesses following characteristic: the logical space that (1) is supported is the 32G byte, and the every corresponding logical address space of Nandflash storer is the 4G byte; (2) the page or leaf size of the Nandflash storer of system's employing is the 4K byte; (3) unit of system address mapping is 1 page, i.e. the 4K byte; (4) each map addresses item takies 4 bytes, every page of total 1K item map addresses item, the continuous logical address space of corresponding 4M byte.

When making up address mapping table, after the data of having write continuous 4M byte (start address of data low 12 is 0), one page address mapping table makes up to be accomplished, and is written in the Nandflash storer of correspondence according to the corresponding relation of following table, as shown in table 1.

The value of logical address [14:12]	The deposit position of address mapping table
		3’b000	Nandflash?0
3’b100	Nandflash?1
		3’b001	Nandflash?2
3’b101	Nandflash?3
		3’b010	Nandflash?4
3’b110	Nandflash?5
		3’b011	Nandflash?6
3’b111	Nandflash?7

Table 1 logical address values and address mapping table deposit position

When system receives the order of visit Nandflash storer, if address mapping table not in system storage, then reads the address mapping table of one page from every Nandflash storer.For example: when logical address 0x1000 reads in system, if logical address 0x1000 to the corresponding 8 page address mapping tables of 0x1000000 not in Installed System Memory, Installed System Memory can be read in this address mapping table of 8 pages simultaneously in system.

When the address mapping table of in system need be with system storage, being rewritten writes back the Nandflash storer, same Nandflash storer before still writing back to.When address mapping table write back, a plurality of passages can write back the address mapping table of being rewritten simultaneously.

Characteristic according to hyperchannel Nandflash accumulator system; System is parallel to be read or writes time that 8 page address mapping tables are spent and be significantly smaller than serial and read or write the time that 8 page address mapping tables are spent, thereby improves the readwrite performance of hyperchannel Nandflash storage system.

Claims

1. hyperchannel Nandflash accumulator system; Constitute by microcontroller, system interface controller, system memory accesses arbitration logic unit, system storage, Nandflash controller and Nandflash memory array, it is characterized in that even storage address mapping table in said each storer of Nandflash memory array.

2. a kind of hyperchannel Nandflash accumulator system as claimed in claim 1 is characterized in that each storer storage addresses mapping table is unit with the page or leaf in the said Nandflash memory array.

3. according to claim 1 or claim 2 a kind of hyperchannel Nandflash accumulator system is characterized in that system is parallel from each sheet Nandflash storer of Nandflash memory array, to read address mapping table, and deposits in the system storage.

4. a kind of hyperchannel Nandflash accumulator system as claimed in claim 1, when it is characterized in that the address mapping table of being rewritten in the system storage writes back the Nandflash storer, same Nandflash storer before still writing back to.

5. like claim 1 or 4 described a kind of hyperchannel Nandflash accumulator systems, during the Nandflash storer, the Nandflash controller is controlled a plurality of passages and is write back simultaneously when it is characterized in that address mapping table writes back.

6. a kind of hyperchannel Nandflash accumulator system as claimed in claim 1 when it is characterized in that the system read-write operation, when not having required address mapping table in the system storage, is then read this address mapping table from the Nandflash storer.

7. a kind of hyperchannel Nandflash accumulator system as claimed in claim 1 is characterized in that the main control end interface with the communication of hyperchannel Nandflash storage system is SATA, USB, PCIE or PATA.