CN102582290B - High-speed digital printing processing system based on embedded processor - Google Patents
High-speed digital printing processing system based on embedded processor Download PDFInfo
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- CN102582290B CN102582290B CN201110456367.0A CN201110456367A CN102582290B CN 102582290 B CN102582290 B CN 102582290B CN 201110456367 A CN201110456367 A CN 201110456367A CN 102582290 B CN102582290 B CN 102582290B
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Abstract
The invention discloses a high-speed digital printing processing system based on an embedded processor. The system comprises a gigabit Ethernet interface, an RS 485 interface, a Rapid input/output (IO) interface, the embedded processor and a field programmable gate array (FPGA), wherein the embedded processor comprises an instruction receiving unit, an instruction processing unit, an instruction output unit, a data receiving unit, a compressed data caching unit, a data decompressing unit, a decompressed data caching unit and a data output unit. According to the system, the high-performance processor and the FPGA serve as the core, high-speed transmission of printing data from a personal computer (PC) to a printing nozzle is finished through the gigabit Ethernet interface and the Rapid input/output interface, the processing and the forwarding of a printing instruction are finished through the gigabit Ethernet interface and the RS 485 interface, and processing operation, such as decompression of printing image data, image rotation and the like, are finished at the same time, so the transmission efficiency and the throughput of data are greatly improved, and the efficient output of a digital printing machine is realized.
Description
Technical field
The invention belongs to stamp printing technique field, be specifically related to a kind of high-speed digital printing processing system based on flush bonding processor.
Background technology
Along with textile printing industry is to stamp precision, in batches the make a plate requirement of flexibility ratio and environmental protection is more and more higher, digital printing technology replaces the dominant technology that traditional printing technique becomes textile printing industry gradually.The fast development of the rapid growth of the digit printing market demand and digital printing industry, logarithmic code stamp speed has had more and more higher requirement, need to have the treatment system of faster data-handling capacity to realize transfer of data and the data processing of digital decorating machine.
First current digital decorating machine completes the processing to print image mostly on PC, then the print data after processing and printing control command is delivered to digital decorating machine shower nozzle by parallel interface.Limited by general processor performance limitations on PC and the transmission speed of parallel interface, current digital decorating machine cannot be processed in real time to the print image of big data quantity, print speed also lags behind the printing machine that adopts traditional printing technique greatly, cannot bring into play digital decorating machine precision high, pollute little advantage, also cannot be widely used in actual production.
For the particular interface requirement of digital decorating machine, need to there is special-purpose system as the data-interface of digital decorating machine; Embedded system has a wide range of applications at industrial control field, embedded system has the system can cutting, can specify specific system according to application demand, in limited resource, complete particular system task, do not waste unnecessary function, can realize minimizing of system, completeization of function, for the particular interface requirement of digital decorating machine, the realization that embedded system can be just right.
Summary of the invention
For the existing above-mentioned technological deficiency of prior art, the invention provides a kind of high-speed digital printing processing system based on flush bonding processor, can realize high speed processing and the transmission of print data.
A high-speed digital printing processing system based on flush bonding processor, comprises gigabit ethernet interface, RS485 interface, RapidIO interface, flush bonding processor and FPGA (field programmable gate array); Wherein:
Described flush bonding processor receives by gigabit ethernet interface print command and the print data that external equipment sends, and described print command is carried out to dissection process, by RS485 interface, to external equipment, send and print control command, described print data is carried out to decompression processing, by the print data after RapidIO interface output decompress(ion) simultaneously;
Described FPGA receives the print data after decompress(ion) by RapidIO interface, and by parallel interface, sends to external equipment after the print data after decompress(ion) is rotated to processing.
Described flush bonding processor, comprising:
Order receiving element, the print command sending for receive external equipment by gigabit ethernet interface, and described print command is resolved to output print operational order and printing control command;
Command process unit, processes for the printing order to described, and output function instruction;
Order output unit, for passing through RS485 interface to the printing control command described in outside device forwards;
Data receiver unit, for receiving by gigabit ethernet interface the print data that external equipment sends according to described operational order;
Packed data buffer unit, the print data receiving for data cached receiving element;
Data decompression unit, for extracting print data from packed data buffer unit, and carries out decompress(ion) to print data;
Decompressed data buffer unit, for the print data after data cached decompress(ion) unit decompress(ion);
Data output unit, for extracting the print data decompress(ion) according to described operational order from decompressed data buffer unit, and by the print data after RapidIO interface output decompress(ion).
Preferably, described gigabit ethernet interface is gigabit Ethernet optical fiber interface; Transmission speed is fast.
Preferably, described packed data buffer unit or decompressed data buffer unit are the DDR3 storage chip that flush bonding processor extends out; Read or write speed is fast.
It is core that system of the present invention be take high-performance embedded processor and FPGA, by gigabit Ethernet and RapidIO interface, complete the high-speed transfer of print data from PC to printing head, by processing and the forwarding of gigabit Ethernet and RS485 Interface realization print command, complete the works for the treatment of such as the decompression of print image data and image rotation simultaneously, greatly improved the operating efficiency of digital printing system.
The present invention is in data transmission procedure, by being set, packed data buffer unit and decompress(ion) data buffer storage unit realize the concurrent working of data receiver unit, data decompression unit and data output unit, thereby reduction data transmission delay, the data throughout of raising system.Meanwhile, the present invention has adopted gigabit ethernet interface to connect PC, has realized the seamless link of digital decorating machine and the network equipment, has improved the extensibility of digital decorating machine.The present invention can realize message transmission rate more than 60MB/s, make the print speed of digital printing technology can reach the level of traditional printing technique, thereby can bring into play when guaranteeing flying print, digit printing precision is high, flexibility strong, pollute little advantage, is widely used in actual production.
Accompanying drawing explanation
Fig. 1 is the principle schematic of high-speed digital printing.
Fig. 2 is the hardware configuration schematic diagram of system of the present invention.
Fig. 3 is the structural principle schematic diagram of system of the present invention.
Fig. 4 is the schematic flow sheet that system command of the present invention is processed.
Fig. 5 is the schematic flow sheet that system data of the present invention is processed.
The specific embodiment
In order more specifically to describe the present invention, below in conjunction with the drawings and the specific embodiments, technical scheme of the present invention and workflow thereof are elaborated.
As shown in Figure 1, the principle of high-speed digital printing is: first, receive print image data and the print command of PC transmission by gigabit Ethernet; Then print command is carried out sending to kinetic control system after dissection process, print data is carried out after decompress(ion) rotation is processed sending to shower nozzle control system; Finally, the shower nozzle of printing machine according to print control command by image printing to be printed to carrier.
As shown in Figures 2 and 3, a kind of high-speed digital printing processing system based on flush bonding processor, comprises gigabit Ethernet optical fiber interface, RS485 interface, RapidIO interface, flush bonding processor and FPGA; Wherein:
Flush bonding processor, comprising:
Order receiving element, it receives by gigabit Ethernet optical fiber interface the print command that PC sends, and print command is resolved, output print operational order and printing control command;
Command process unit, it is processed printing operational order, and output function instruction;
Order output unit, it is forwarded and prints control command to kinetic control system by RS485 interface;
Data receiver unit, it receives by gigabit Ethernet optical fiber interface the print data that PC sends according to operational order;
Packed data buffer unit, the print data that its data cached receiving element receives;
Data decompression unit, it extracts print data from packed data buffer unit, and print data is carried out to decompress(ion);
Decompressed data buffer unit, the print data after its data cached decompress(ion) unit decompress(ion);
Data output unit, it extracts the print data after decompress(ion) from decompressed data buffer unit according to operational order, and by the print data after RapidIO interface output decompress(ion).
FPGA receives the print data after decompress(ion) by RapidIO interface, and by parallel interface, sends to shower nozzle control system after the print data after decompress(ion) is rotated to processing.
In the present embodiment, packed data buffer unit and decompress(ion) data buffer storage unit are the DDR3 storage chip that flush bonding processor extends out; FPGA adopts the chip that the Stratix III of altera corp serial model No. is EP3SL150.
As shown in Figure 4, in present embodiment, the handling process of print command is:
A. order receiving element to pass through gigabit Ethernet optical fiber interface and receive the print command of printing main control end (PC) transmission, and command header is resolved; According to command type, order is distinguished, the operational order that need be processed by native system transfers to command process unit to process, and needs the control command forwarding to transfer to order output unit to forward.
B. command process unit is resolved and is dealt with operational order, working state of system is carried out to corresponding modify (controlling the transmitting-receiving of data receiver unit and data output unit) simultaneously; After command process completes, by gigabit Ethernet optical fiber interface to PC feedback command result.
C. order retransmission unit to obtain from order receiving element the control command that needs forwarding, and forward to kinetic control system by RS485 interface; After order has forwarded, by RS485 interface, receive forward command result, and feed back to master control PC by gigabit Ethernet optical fiber interface.
As shown in Figure 5, in present embodiment, the handling process of print data is:
A. data receiver unit is received and is printed the print data through the compression of RLE compression algorithm that main control end (PC) sends by gigabit Ethernet optical fiber interface, and checks current system duty; If system has enough idle capacities in print job status and packed data buffer unit (DDR3), the data that receive are put into packed data buffer unit; If not, empty packed data buffer, the print data of abandoning this time receiving.
B. data decompression unit extracts pending print data from packed data buffer unit, and adopt RLE decompression algorithm by piece, print data to be decompressed, if decompressed data buffer unit (DDR3) has enough idle capacities, the data after decompressing are placed into decompressed data buffer unit; If not, stop extracting print data from packed data buffer unit, and stop decompress(ion).
C. data output unit extracts the data after decompressing from packed data buffer unit, and check system duty; If system is in print job status, by RapidIO interface, send the data after decompressing to FPGA, after being rotated processing, the data by FPGA after to decompress(ion) output to printing head by parallel interface; If not, stop exporting data, and empty decompressed data buffer unit.
Through implementing checking, the high-speed digital printing processing system of employing prior art completes the processing transmission of view data, in printing precision, is to print under 600*600dpi, and its print speed is 20 squares ms/h; And adopting present embodiment to process transmission under same printing precision, its print speed is 60 squares ms/h, and data throughout is 60MB/s; Data Comparison can show that present embodiment can improve efficiency of transmission and the handling capacity of data greatly, thereby realizes the high-effect output of digital decorating machine.
Claims (3)
1. the high-speed digital printing processing system based on flush bonding processor, is characterized in that: comprise gigabit ethernet interface, RS485 interface, RapidIO interface, flush bonding processor and FPGA; Wherein:
Described flush bonding processor receives by gigabit ethernet interface print command and the print data that external equipment sends, and described print command is carried out to dissection process, by RS485 interface, to external equipment, send and print control command, described print data is carried out to decompression processing, by the print data after RapidIO interface output decompress(ion) simultaneously; Described flush bonding processor, comprising:
Order receiving element, the print command sending for receive external equipment by gigabit ethernet interface, and described print command is resolved to output print operational order and printing control command;
Command process unit, processes for the printing order to described, and output function instruction;
Order output unit, for passing through RS485 interface to the printing control command described in outside device forwards;
Data receiver unit, for receiving by gigabit ethernet interface the print data that external equipment sends according to described operational order;
Packed data buffer unit, the print data receiving for data cached receiving element;
Data decompression unit, for extracting print data from packed data buffer unit, and carries out decompress(ion) to print data;
Decompressed data buffer unit, for the print data after data cached decompress(ion) unit decompress(ion);
Data output unit, for extracting the print data decompress(ion) according to described operational order from decompressed data buffer unit, and by the print data after RapidIO interface output decompress(ion);
Described FPGA receives the print data after decompress(ion) by RapidIO interface, and by parallel interface, sends to external equipment after the print data after decompress(ion) is rotated to processing.
2. the high-speed digital printing processing system based on flush bonding processor according to claim 1, is characterized in that: described gigabit ethernet interface is gigabit Ethernet optical fiber interface.
3. the high-speed digital printing processing system based on flush bonding processor according to claim 1, is characterized in that: described packed data buffer unit or decompressed data buffer unit are the DDR3 storage chip that flush bonding processor extends out.
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| CN101790016B (en) * | 2010-01-07 | 2012-01-25 | 浙江大学 | Image data rotation processing system and method for high-speed decorating machine |
| CN101786384A (en) * | 2010-01-07 | 2010-07-28 | 浙江大学 | Interface conversion system for digital decorating machine and data transmission method |
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