CN102571088B

CN102571088B - Overflow judging circuit for pipelined analog-to-digital converter

Info

Publication number: CN102571088B
Application number: CN201010618466.XA
Authority: CN
Inventors: 庄奕琪; 汤华莲; 黄鹤; 赵辉; 李勇强
Original assignee: Nationz Technologies Inc
Current assignee: Nationz Technologies Inc
Priority date: 2010-12-31
Filing date: 2010-12-31
Publication date: 2014-06-18
Anticipated expiration: 2030-12-31
Also published as: CN102571088A

Abstract

The invention relates to an overflow judging circuit for a pipelined analog-to-digital converter. The overflow judging circuit comprises an overflow judging comparator, an underflow judging comparator and an or gate circuit, wherein the or gate circuit is connected with output ends of the two overflow comparators. The overflow judging circuit is placed at the last stage of the pipelined analog-to-digital converter; an inverting input port of the overflow judging comparator is connected with a maximum rated voltage phase of the analog-to-digital converter; a positive phase input port of the underflow judging comparator is connected with a minimum rated voltage phase of the analog-to-digital converter; and the positive phase input port of the overflow judging comparator, the inverting input port of the underflow judging comparator and the last stage of the pipelined analog-to-digital converter share an output signal of the previous stage of the last stage of the analog-to-digital converter. As the overflow voltage in input signals is gradually amplified through each stage of the pipeline, the requirements on offset voltage of the judging comparator are reduced; the overflow judging precision of ADC (analog-to-digital converter) is improved; and error detection can be performed on the pipelined ADC circuit.

Description

A kind of decision circuitry of overflowing for flow-line modulus converter

Technical field

The present invention relates to analog integrated circuit design field, be specifically related to a kind of decision circuitry of overflowing for flow-line modulus converter.

Background technology

Flow-line modulus converter (ADC) is widely used in signal with its higher advantage such as speed and precision to be processed and the communications field.Pipelined ad C is converted into digital signal by analog signal step by step by pipeline organization, the sub-ADC of the first order is by the seniority top digit word bit that is converted into respective numbers rough analog signal, the residual signals of the sub-ADC of the ensuing second level and rear class after previous stage is amplified is as its input and be quantified as the lower-order digit word bit of respective numbers, and pipelined ad C afterbody adopts Flash ADC structure conventionally.In the time that analog input signal exceeds the specified input voltage range (VR～+ VR) of ADC, ADC Overflow flag is made and is overflowed judgement indication.

In pipelined ad C in the past, conventionally in the sub-ADC of the first order, increase by two comparators and be used for overflowing judgement, as shown in Figure 1.Fig. 3 is circuit diagram in Fig. 1 dashed rectangle, comprises the sub-ADC of 1.5bit and overflows decision circuitry, and it is placed on the first order of pipelined ad C.VIN represents analog input signal ,+VR and-VR represents respectively maximum and the minimum value of the specified input voltage of ADC; Be respectively+the 1/4VR of input reference voltage of

comparator

2 and 3 and-1/4VR, after quantization decoding, export high-order digit signal; The high-order digit signal quantizing is converted into corresponding analog voltage through digital to analog converter (DAC), and this voltage and VIN subtract each other, and obtains residual signals and amplifies and send into next stage through amplifier again, as the input signal of next stage; Overflow judge comparator 1 and 4 be respectively+VR of input reference voltage and-VR, these two comparators respectively by input signal and ± VR compares, if input signal exceeds ADC input voltage range, Overflow flag is made and is overflowed indication.But this overflowing judges that structure will be made and overflows accurately judgement, can propose very high requirement to parameters such as the imbalances of comparator.The present invention can overcome above defect well, can carry out error detector to circuit design simultaneously.

Summary of the invention

Technical problem to be solved by this invention is to provide one can make accurate judgement to overflowing judgement, and does not need the parameters such as imbalance to comparator to propose the very decision circuitry of overflowing for flow-line modulus converter of high request.

The technical scheme that the present invention solves the problems of the technologies described above is as follows: a kind of decision circuitry of overflowing for flow-line modulus converter, comprising: one judges overflow comparator, an OR circuit that judges that underflow comparator and input are connected with described judgement overflow comparator and described judgement underflow comparator output terminal; The described afterbody that overflows decision circuitry and be placed on flow-line modulus converter; Judge that overflow comparator anti-phase input port is connected with the maximum rated voltage of analog to digital converter, judge that the minimum rated voltage of underflow comparator normal phase input end mouth and analog to digital converter is connected, judge the normal phase input end mouth of overflow comparator and judge the anti-phase input port of underflow comparator and the output signal of the upper level analog to digital converter of the shared described afterbody of described flow-line modulus converter afterbody.

The invention has the beneficial effects as follows: of the present invention overflowing judges that comparator is not placed on the first order of pipelined ad C as traditional mode, but it is placed on to the afterbody of pipelined ad C, combine with afterbody Flash ADC.If analog input signal voltage exceedes the specified input voltage range of ADC, every through one-level sub-ADC, overflowing voltage segment and can be amplified by the amplifier in this grade in residual signals; Arrive when afterbody it and overflow voltage and repeatedly amplified, be equivalent to place casacade multi-amplifier overflowing before judge comparator, thereby to overflow the requirement reduction such as offset voltage that judge comparator, improve ADC the accuracy of overflowing judgement simultaneously.Moreover the decision circuitry of overflowing of the present invention can be carried out error detection to pipeline-type adc circuit.For example, known input voltage is in the specified input voltage range of ADC, and now overflowing the correct result that judges should be for not overflowing, but due to some design problem, cause residual signals to exceed the range of nominal tension after what amplifies, now the Overflow flag of ADC just can be used as error detection bits.

On the basis of technique scheme, the present invention can also do following improvement.

Further, described in, overflow decision circuitry and also comprise comparator circuit and the decoding circuit for the output of flow-line modulus converter low order digit is provided; Wherein, the output of comparator is connected with decoding circuit, and the input of comparator is connected with output and the reference voltage of the upper level analog to digital converter of described flow-line modulus converter afterbody respectively.

Further, describedly comprise three comparators for the comparator circuit that flow-line modulus converter low order digit output is provided, an input of each comparator is connected with the output of described flow-line modulus converter afterbody upper level analog to digital converter, another input input reference voltage.

Further, described reference voltage be respectively the minimum rated voltage of analog to digital converter 1/2nd, 0 and the maximum rated voltage of analog to digital converter 1/2nd.

The beneficial effect that adopts above-mentioned further scheme is to make comparator circuit and decoding circuit can provide flow-line modulus converter minimum 2 bit digital outputs.

Accompanying drawing explanation

Fig. 1 is the schematic diagram that tradition is overflowed decision circuitry position in pipelined ad C;

Fig. 2 is the schematic diagram that overflows decision circuitry position in pipelined ad C in the present invention;

Fig. 3 is circuit diagram in Fig. 1 dashed rectangle;

Fig. 4 is circuit diagram in Fig. 2 dashed rectangle.

Embodiment

Below in conjunction with accompanying drawing, principle of the present invention and feature are described, example, only for explaining the present invention, is not intended to limit scope of the present invention.

Fig. 2 is the schematic diagram that overflows decision circuitry position in pipelined ad C in the present invention, as shown in Figure 2, overflows decision circuitry and be placed on the afterbody of pipelined ad C.

As a kind of embodiment of the present invention, Fig. 4, for being circuit diagram in Fig. 2 dashed rectangle, comprising 2bit flash ADC and overflows decision circuitry, and it is placed on the afterbody of pipelined

ad C.Comparator

2,3,4 provide minimum two digits output with decoding circuit; Overflow decision circuitry and comprise that overflow judges comparator 1, underflow judge comparator 5 and or door 6, overflow judge output that comparator 1 and underflow judge comparator 5 with or 6 input be connected, generation is overflowed and is judged OTR signal jointly.The analog signal of upper level output is

comparator

2,3 simultaneously, and 4 judge that with overflowing comparator 1,5 provides input signal.Overflow the connect+V of negative terminal that judges comparator 1 _r, contrary, overflow the positive termination-V that judges comparator 5 _r.The reference voltage of comparator 2 is+1/2V _r, the reference voltage of comparator 3 is 0, the reference voltage of comparator 4 is-1/2V _r.

In the time of circuit working, input signal, through a series of quantification, finally arrives the afterbody of pipelined ad C, enters judgement and overflows comparator, and the operating state of overflowing judgment means is as follows:

When A, input signal upwards overflow, upwards overflow comparator and drawn high, overflow comparator downwards and dragged down, through one-level or door, be output as height.

When B, input signal overflow downwards, upwards overflow comparator and dragged down, overflow comparator output downwards and drawn high, through one-level or door, be output as height.

When C, input signal overflow, upwards overflow comparator and all dragged down with overflowing comparator output downwards, through one-level or door, be output as low.

Set forth for example the advantage part of this invention at this.Suppose that pipelined ad C requires to overflow voltage V ₀=| ^v _iN|-V _rwhile being greater than 1LSB, make and overflow indication, required to overflow to judge that the offset voltage VOS of comparator is less than 1LSB for overflow judgment technology in the past; And employing the technology of the present invention as shown in Figure 4, is repeatedly amplified owing to overflowing voltage, overflow and judge that the offset voltage Vos of comparator only need be less than 2 ^n-2× 1LSB, so just judges to overflowing that the designing requirement of comparator reduces greatly.Wherein N represents the resolution of ADC, 1LSB=V _r/ 2 ^n-1.

Simultaneously overflow judgement comparator for what there is fixing offset voltage, adopt and overflowed judgment technology in the past, overflow voltage Vo and be greater than Vos and just can judge and overflow; And employing the technology of the present invention, Vo is amplified to Vo × 2 after the sub-ADC of some levels ^n-2, only need meet Vo × 2 ^n-2> Vos, i.e. Vo > Vos/2 ^n-2time comparator just can make accurate judgement, overflow judgement and be placed on afterbody ratio and be placed on the first order and judge accuracy raising.

The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims

1. the decision circuitry of overflowing for flow-line modulus converter, it is characterized in that, comprising: one judges overflow comparator, an OR circuit that judges that underflow comparator and input are connected with described judgement overflow comparator and described judgement underflow comparator output terminal; The described afterbody that overflows decision circuitry and be placed on flow-line modulus converter; Judge that overflow comparator anti-phase input port is connected with the maximum rated voltage of analog to digital converter, judge that the minimum rated voltage of underflow comparator normal phase input end mouth and analog to digital converter is connected, judge the normal phase input end mouth of overflow comparator and judge the anti-phase input port of underflow comparator and the output signal of the upper level analog to digital converter of the shared described afterbody of described flow-line modulus converter afterbody.

2. the decision circuitry of overflowing according to claim 1, is characterized in that, described in overflow decision circuitry and also comprise comparator circuit and the decoding circuit for flow-line modulus converter low order digit output is provided; Wherein, the output of comparator is connected with decoding circuit, and the input of comparator is connected with output and the reference voltage of the upper level analog to digital converter of described flow-line modulus converter afterbody respectively.

3. the decision circuitry of overflowing according to claim 2, it is characterized in that, describedly comprise three comparators for the comparator circuit that flow-line modulus converter low order digit output is provided, an input of each comparator is connected with the output of described flow-line modulus converter afterbody upper level analog to digital converter, another input input reference voltage.

4. the decision circuitry of overflowing according to claim 3, is characterized in that, the reference voltage of described three comparators be respectively the minimum rated voltage of analog to digital converter 1/2nd, 0 and the maximum rated voltage of analog to digital converter 1/2nd.