CN102569350A - Insulated gate bipolar transistor (IGBT) device structure with back seal and manufacturing method of IGBT device structure - Google Patents
Insulated gate bipolar transistor (IGBT) device structure with back seal and manufacturing method of IGBT device structure Download PDFInfo
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- CN102569350A CN102569350A CN2012100304313A CN201210030431A CN102569350A CN 102569350 A CN102569350 A CN 102569350A CN 2012100304313 A CN2012100304313 A CN 2012100304313A CN 201210030431 A CN201210030431 A CN 201210030431A CN 102569350 A CN102569350 A CN 102569350A
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Abstract
The invention provides an insulated gate bipolar transistor (IGBT) device structure with a back seal and a manufacturing method of the IGBT device structure. The IGBT device structure comprises a semiconductor substrate, an epitaxial layer, the back seal and an IGBT structure, wherein the epitaxial layer is positioned on the front side of the semiconductor substrate; the back seal is positioned on the back side of the semiconductor substrate and comprises a silicon nitride layer and an oxide layer which is positioned between the silicon nitride layer and the back side of the semiconductor substrate; and the IGBT structure is formed in the epitaxial layer and on the epitaxial layer. By the manufacturing method of the IGBT device structure, the back seal structure is formed on the back side of the semiconductor substrate of the IGBT device structure, so that the phenomenon that the doping type and doping concentration in the epitaxial layer are influenced because a large number of P type dopants in a semiconductor substrate of a previous wafer for forming the IGBT device structure enter the epitaxial layer of a next wafer in the manufacturing process is avoided; and therefore, the mobility of channels in the subsequently formed IGBT structure is ensured, and the stability of turn-on voltage of the IGBT device is improved further.
Description
Technical field
The present invention relates to a kind of integrated circuit structure and manufacturing approach, relate in particular to a kind of IGBT device architecture and manufacturing approach thereof with back of the body envelope.
Background technology
IGBT (Insulated Gate Bipolar Transistor; Insulated gate bipolar transistor); By the compound full-control type voltage driven type power semiconductor that BJT (double pole triode) and MOS (insulating gate type field effect tube) form, have the advantage of low conduction voltage drop two aspects of high input impedance and the GTR of MOSFET concurrently.The GTR saturation pressure reduces, and current carrying density is big, but drive current is bigger; The MOSFET driving power is very little, and switching speed is fast, but conduction voltage drop is big, and current carrying density is little.IGBT combines the advantage of above two kinds of devices, and the little and saturation pressure of driving power reduces.Be fit to very much to be applied to direct voltage and be fields such as 600V and above converter system such as alternating current machine, frequency converter, Switching Power Supply, lighting circuit, traction transmission.
Going up the IGBT manufacturing process with tradition at suspension substrate (Float-zone Substrate) compares; The IGBT device that combines the method manufacturing formation of N type epitaxial loayer at the P type semiconductor substrate; Can optimize the unit for electrical property parameters of IGBT device better, for example conducting resistance (RDSON) etc.But, in actual manufacture process, in process equipment, can introduce a plurality of wafers simultaneously; On wafer, form the P type semiconductor substrate; Distance between the wafer is less, and the P type dopant ion that P type semiconductor substrate back on the last wafer very easily occurs gets in the epitaxial loayer of P type semiconductor substrate face on another wafer, and the doping that influences the N type light doping section of follow-up formation is injected; Influence the mobility of IGBT device, and then influence stability and other performances of the good cut-in voltage of IGBT device.Therefore, form back of the body seal structure at the Semiconductor substrate back side very important effect is arranged in the manufacturing process of IGBT device architecture.
Summary of the invention
The purpose of this invention is to provide a kind of IGBT device architecture and manufacturing approach thereof,, further improve the stability of the cut-in voltage of IGBT device with the mobility of raceway groove in the IGBT device architecture of protection formation with back of the body envelope.
The present invention provides a kind of IGBT device architecture with back of the body envelope, comprising: Semiconductor substrate; Epitaxial loayer is positioned at the front of said Semiconductor substrate; Back of the body envelope is positioned at the said Semiconductor substrate back side, and said back of the body package is drawn together silicon nitride layer and the oxide layer between the said silicon nitride layer and the Semiconductor substrate back side; And the IGBT structure, be formed in said epitaxial loayer with epitaxial loayer on.
Further, said IGBT structure comprises: the high-voltage field ring is formed in the said epitaxial loayer; Light doping section is formed in the epitaxial loayer that said high-voltage field ring centers on; Grid is formed on the said light doping section; Well region is formed in the epitaxial loayer between said high-voltage field ring and the light doping section; And heavily doped region, be formed in the said well region.
Further, said IGBT structure also comprises: interlayer dielectric layer is covered on the said epitaxial loayer; And draw through hole, said interlayer dielectric layer of break-through and said heavily doped region.
Further, said thickness of oxide layer is 500～2000 dusts.
Further, the thickness of silicon nitride layer is 500～2000 dusts.
Further, said Semiconductor substrate is mixed for the P type, and said epitaxial loayer mixes for the N type.
The present invention also provides a kind of manufacturing approach with IGBT device architecture of back of the body envelope, comprising:
Semiconductor substrate is provided, on the front of said Semiconductor substrate, forms epitaxial loayer;
On the back side of said Semiconductor substrate and epitaxial loayer, form silicon oxide layer and silicon nitride layer successively;
Removal is positioned at the silicon nitride layer on the said epitaxial loayer, and the silicon oxide layer and the silicon nitride layer that are positioned at the said Semiconductor substrate back side seal as the back of the body;
In said epitaxial loayer with on the epitaxial loayer, form the IGBT structure.
Further, the step of formation IGBT structure comprises: in said epitaxial loayer, form the high-voltage field ring; Form light doping section in the epitaxial loayer in said high-voltage field ring, and on said light doping section, form grid; Form well region in the epitaxial loayer between said high-voltage field ring and light doping section.
Further, after forming well region, also comprise: in said well region, form heavily doped region; And between said epitaxial loayer upper caldding layer dielectric layer, and said interlayer dielectric layer of etching and heavily doped region form and draw through hole.
Further, said thickness of oxide layer is 500～2000 dusts.
Further, the thickness of silicon nitride layer is 500～2000 dusts.
Further, said Semiconductor substrate is mixed for the P type, and said epitaxial loayer mixes for the N type.
In sum; The present invention forms back of the body seal structure through the Semiconductor substrate back side at the IGBT device architecture; Avoiding in technology manufacturing process, being used to form in the Semiconductor substrate of last wafer of IGBT device architecture a large amount of P types mixes and influences doping type and the doping content in the epitaxial loayer in the epitaxial loayer that gets into back one wafer; Thereby protect the mobility of raceway groove in the IGBT device architecture of follow-up formation, further improve the stability of the cut-in voltage of IGBT device.
Description of drawings
Fig. 1 is for having the IGBT device architecture sketch map of back of the body envelope in one embodiment of the invention.
Fig. 2 is for having the manufacturing approach flow chart of carrying on the back the IGBT device architecture that seals in one embodiment of the invention.
Fig. 3～Fig. 6 is for having the structural representation in the manufacture process of carrying on the back the IGBT device architecture that seals in one embodiment of the invention.
Embodiment
For making content of the present invention clear more understandable,, content of the present invention is described further below in conjunction with Figure of description.Certainly the present invention is not limited to this specific embodiment, and the general replacement that those skilled in the art knew also is encompassed in protection scope of the present invention.
Secondly, the present invention utilizes sketch map to carry out detailed statement, and when instance of the present invention was detailed, for the ease of explanation, sketch map did not amplify according to general ratio is local, should be with this as to qualification of the present invention.
In the present embodiment, form a plurality of IGBT devices on the wafer, said wafer promptly is used to form the Semiconductor substrate of IGBT, and the front of said Semiconductor substrate is the one side that will form the IGBT device architecture, and the another side opposite with it is the back side of Semiconductor substrate.
Core concept of the present invention is: form back of the body seal structure through the Semiconductor substrate back side at the IGBT device architecture; Avoiding in technology manufacturing process, being used to form in the Semiconductor substrate of last wafer of IGBT device architecture a large amount of P types mixes and influences doping type and the doping content in the epitaxial loayer in the epitaxial loayer that gets into back one wafer; Thereby protect the mobility of raceway groove in the IGBT structure of follow-up formation, further improve the stability of the cut-in voltage of IGBT device.
Fig. 1 is for having the IGBT device architecture sketch map of back of the body envelope in one embodiment of the invention, said IGBT device architecture with back of the body envelope comprises: Semiconductor substrate 104, epitaxial loayer 106, back of the body envelope and IGBT structure.
Said Semiconductor substrate 104 can be semi-conducting materials such as silicon, germanium or silicon Germanium compound, and in the present embodiment, said Semiconductor substrate 104 is that the P type mixes, and dopant ion can be for boron etc., and the preferable scope of doping content is 1E18～1E19cm
-2
Said epitaxial loayer 106 is positioned at the front of said Semiconductor substrate 104, and in the present embodiment, epitaxial loayer 106 is that the N type mixes, and dopant ion can be for phosphorus etc., and the scope of doping content is 5E13～8E13cm
-2
Said back of the body envelope is positioned at said Semiconductor substrate 104 back sides, and said back of the body package is drawn together silicon nitride layer 100 and the oxide layer 102 between the said silicon nitride layer 100 and Semiconductor substrate 104 back sides; Wherein, said oxide layer 102 preferable thickness are 500～2000 dusts, and silicon nitride layer 100 preferable thickness are 500～2000 dusts; In the semiconductor fabrication process process; Silicon nitride layer 100 can cover Semiconductor substrate 104 effectively, avoid P type dopant ion in the last wafer semiconductor-on-insulator substrate 104 to get on one wafer of back in the epitaxial loayer 106, and silicon nitride layer 100 avoids etching to remove in follow-up wet etching process; Thereby effectively protect doping type and doping content in the epitaxial loayer 106; Keep the doping of the light doping section of follow-up formation to inject, keep follow-up and form the mobility of a raceway groove, thereby keep the good cut-in voltage of IGBT device at epitaxial loayer 106; Said oxide layer 102 can avoid silicon nitride layer 100 to produce on stress and the Semiconductor substrate 104, protection Semiconductor substrate 104.
Said IGBT structure be formed in said epitaxial loayer 106 with epitaxial loayer 106 on, wherein said IGBT structure comprises:
High-voltage field ring 110 is formed in the said epitaxial loayer 106, and the doping type of said high-voltage field ring 110 is the P type, and dopant ion can be boron etc., and the degree of depth of high-voltage field ring 110 is 6um～8um, concentration 5E14～1E15cm
-2, high-voltage field ring 110 can improve and the puncture voltage of stable IGBT;
Heavily doped region 112 is formed in the said well region 118, and the doping type of said heavily doped region 112 is the N type, and dopant ion can be arsenic etc., and the degree of depth of said heavily doped region 112 is that 0.4um～1um, concentration are 3E15～8E15cm
-2, as the active area of IGBT device architecture, heavily doped region 112 is used to improve the resistance that is connected with the subsequent interconnect lead-out wire to heavily doped region 112 after subsequent technique is accomplished.
In addition, said IGBT structure also can comprise: interlayer dielectric layer 122, be covered on the said epitaxial loayer 106, and the material of said interlayer dielectric layer 122 can be boron-phosphorosilicate glass (BPSG); And draw through hole 124, said interlayer dielectric layer 122 of break-through and said heavily doped region 120 in subsequent manufacturing processes, are drawn and are formed with interconnection lead-out wire (indicating among the figure) in the through hole 124, are used for the IGBT device architecture is electrically drawn.
The present invention also provides a kind of manufacturing approach with IGBT device architecture of back of the body envelope, may further comprise the steps:
Step S01: Semiconductor substrate is provided, on the front of said Semiconductor substrate, forms epitaxial loayer;
Step S02: on the back side of said Semiconductor substrate and epitaxial loayer, form silicon oxide layer and silicon nitride layer successively;
Step S03: removal is positioned at the silicon nitride layer on the said epitaxial loayer, and the silicon oxide layer and the silicon nitride layer that are positioned at the said Semiconductor substrate back side seal as the back of the body;
Step S04: in said epitaxial loayer with on the epitaxial loayer, form the IGBT structure.
Fig. 2 is for having the manufacturing approach flow chart of carrying on the back the IGBT device architecture that seals in one embodiment of the invention.Fig. 3～Fig. 6 is for having the structural representation in the manufacture process of carrying on the back the IGBT device architecture that seals in one embodiment of the invention.Specify the manufacturing approach with IGBT device architecture of back of the body envelope according to the invention below in conjunction with Fig. 1～Fig. 6.
As shown in Figure 3, in step S01, Semiconductor substrate 104 is provided, on the front of said Semiconductor substrate 104, form epitaxial loayer 106; Said Semiconductor substrate 104 can be semi-conducting materials such as silicon, germanium or silicon Germanium compound, and said Semiconductor substrate 104 is that the P type mixes, and dopant ion can be for boron etc., and the doping content scope is 1E18cm
-2～1E19cm
-2 Epitaxial loayer 106 is positioned at the front of Semiconductor substrate 104, and epitaxial loayer 106 is that the N type mixes, and dopant ion can be for phosphorus etc., and the scope of doping content is 5E13cm
-2～8E13cm
-2
Continuation is with reference to figure 3, in step S02, on the back side of said Semiconductor substrate 104 and epitaxial loayer 106, forms silicon oxide layer 102 and silicon nitride layer 100 successively; Wherein, the thickness of said oxide layer 102 is 500～2000 dusts, and the thickness of silicon nitride layer 100 is 500～2000 dusts.In the semiconductor fabrication process process; Silicon nitride layer 100 can cover Semiconductor substrate 104 effectively; Avoid P type dopant ion in the last wafer semiconductor-on-insulator substrate 104 to get on one wafer of back in the epitaxial loayer 106; Doping type and doping content in the protection epitaxial loayer 106 keep follow-up and form the mobility of a N type raceway groove at epitaxial loayer 106, thereby keep the good cut-in voltage of IGBT device; Said oxide layer 102 can avoid silicon nitride layer 100 to produce on stress and the Semiconductor substrate 104, protection Semiconductor substrate 104.
In step S03; Removal is positioned at the silicon nitride layer on the said epitaxial loayer 106; The silicon oxide layer 102 that is positioned at said Semiconductor substrate 104 back sides seals as the back of the body with silicon nitride layer 100; Oxide layer on epitaxial loayer 106 continues to thicken in subsequent technique to form protects oxide layer 108, and protection oxide layer 108 plays good insulating effect under high voltage electric field.
Like Fig. 4～shown in Figure 6, in step S04, in said epitaxial loayer 106 with on the epitaxial loayer, form the IGBT structure, comprise in the step of the formation IGBT of step S04 structure:
As shown in Figure 4, at first, on epitaxial loayer 106, continue oxidation and form protection oxide layer 108, said protection oxide layer 108 is used for playing good insulating effect in the high voltage electric field effect.Then on protection oxide layer 108, form opening; And carry out in opening that ion injects and advance; Thereby in said epitaxial loayer 106, form high-voltage field ring 110, in the progradation that forms high-voltage field ring 110 (Guard Ring), on high-voltage field ring 110, form surface oxide layer 112.
As shown in Figure 5, then, the protection oxide layer 108 on the protection oxide layer 108 that selective etch attenuate high-voltage field ring 110 centers on; Proceed ion injection and propelling; Thereby form light doping section 114 in the epitaxial loayer 106 in said high-voltage field ring 110, then, the deposit spathic silicon layer; And utilize photoetching and the said polysilicon layer of etching technics etching, thereby on said light doping section 114, form grid 116.
As shown in Figure 6, afterwards, form well region 118 in the epitaxial loayer 106 between said high-voltage field ring 110 and light doping section 116, and in said well region 118, form heavily doped region 120.
Then, dielectric layer 122 between said epitaxial loayer 106 upper caldding layers, and said interlayer dielectric layer 122 of etching and heavily doped region 120 form and draw through hole 124, finally form structure as shown in Figure 1; The material of said interlayer dielectric layer can be BPSG, in subsequent manufacturing processes, draws and is formed with interconnection lead-out wire (among the figure indicate) in the through hole 124, is used for the IGBT device architecture is electrically drawn.
In sum; The present invention forms back of the body seal structure through the Semiconductor substrate back side at the IGBT device architecture; Avoiding in technology manufacturing process, being used to form in the Semiconductor substrate of last wafer of IGBT device architecture a large amount of P types mixes and influences doping type and the doping content in the epitaxial loayer in the epitaxial loayer that gets into back one wafer; Thereby protect the mobility of raceway groove in the IGBT structure of follow-up formation, further improve the stability of the cut-in voltage of IGBT device.
Though the present invention discloses as above with preferred embodiment; Right its is not in order to limit the present invention; Has common knowledge the knowledgeable in the technical field under any; Do not breaking away from the spirit and scope of the present invention, when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (12)
1. the IGBT device architecture with back of the body envelope is characterized in that, comprising:
Semiconductor substrate;
Epitaxial loayer is positioned at the front of said Semiconductor substrate;
Back of the body envelope is positioned at the said Semiconductor substrate back side, and said back of the body package is drawn together silicon nitride layer and the oxide layer between the said silicon nitride layer and the Semiconductor substrate back side; And
The IGBT structure, be formed in said epitaxial loayer with epitaxial loayer on.
2. the IGBT device architecture with back of the body envelope as claimed in claim 1 is characterized in that said IGBT structure comprises:
The high-voltage field ring is formed in the said epitaxial loayer;
Light doping section is formed in the epitaxial loayer that said high-voltage field ring centers on;
Grid is formed on the said light doping section;
Well region is formed in the epitaxial loayer between said high-voltage field ring and the light doping section; And
Heavily doped region is formed in the said well region.
3. the IGBT device architecture with back of the body envelope as claimed in claim 2 is characterized in that said IGBT structure also comprises:
Interlayer dielectric layer is covered on the said epitaxial loayer; And
Draw through hole, said interlayer dielectric layer of break-through and said heavily doped region.
4. like any described IGBT device architecture in the claim 1 to 3, it is characterized in that said thickness of oxide layer is 500～2000 dusts with back of the body envelope.
5. like any described IGBT device architecture in the claim 1 to 3, it is characterized in that the thickness of said silicon nitride layer is 500～2000 dusts with back of the body envelope.
6. like any described IGBT device architecture with back of the body envelope in the claim 1 to 3, it is characterized in that said Semiconductor substrate is mixed for the P type, said epitaxial loayer mixes for the N type.
7. one kind has the manufacturing approach of carrying on the back the IGBT device architecture that seals, and comprising:
Semiconductor substrate is provided, on the front of said Semiconductor substrate, forms epitaxial loayer;
On the back side of said Semiconductor substrate and epitaxial loayer, form silicon oxide layer and silicon nitride layer successively;
Removal is positioned at the silicon nitride layer on the said epitaxial loayer, and the silicon oxide layer and the silicon nitride layer that are positioned at the said Semiconductor substrate back side seal as the back of the body;
In said epitaxial loayer with on the epitaxial loayer, form the IGBT structure.
8. the manufacturing approach with IGBT device architecture of back of the body envelope as claimed in claim 7 is characterized in that the step that forms the IGBT structure comprises:
In said epitaxial loayer, form the high-voltage field ring;
Form light doping section in the epitaxial loayer in said high-voltage field ring, and on said light doping section, form grid;
Form well region in the epitaxial loayer between said high-voltage field ring and light doping section.
9. the manufacturing approach with IGBT device architecture of back of the body envelope as claimed in claim 8 is characterized in that, after forming well region, also comprises:
In said well region, form heavily doped region; And
Dielectric layer between said epitaxial loayer upper caldding layer, and said interlayer dielectric layer of etching and heavily doped region form and draw through hole.
10. like any described manufacturing approach in the claim 7 to 9, it is characterized in that said thickness of oxide layer is 500～2000 dusts with IGBT device architecture of back of the body envelope.
11., it is characterized in that the thickness of said silicon nitride layer is 500～2000 dusts like any described manufacturing approach in the claim 7 to 9 with IGBT device architecture of back of the body envelope.
12. like any described manufacturing approach with IGBT device architecture of back of the body envelope in the claim 7 to 9, it is characterized in that said Semiconductor substrate is mixed for the P type, said epitaxial loayer mixes for the N type.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100304313A CN102569350A (en) | 2012-02-10 | 2012-02-10 | Insulated gate bipolar transistor (IGBT) device structure with back seal and manufacturing method of IGBT device structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100304313A CN102569350A (en) | 2012-02-10 | 2012-02-10 | Insulated gate bipolar transistor (IGBT) device structure with back seal and manufacturing method of IGBT device structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103077967A (en) * | 2013-01-25 | 2013-05-01 | 淄博美林电子有限公司 | High-efficient plane-type insulated gate bipolar transistor (IGBT) |
| CN106129108A (en) * | 2016-08-29 | 2016-11-16 | 洛阳鸿泰半导体有限公司 | A kind of semiconductor crystal wafer with three dimensional structure |
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| CN1286806A (en) * | 1997-06-23 | 2001-03-07 | 小詹姆斯·艾伯特·库珀 | Power semiconductor device in wide-band-gap semiconductor |
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| CN1286806A (en) * | 1997-06-23 | 2001-03-07 | 小詹姆斯·艾伯特·库珀 | Power semiconductor device in wide-band-gap semiconductor |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103077967A (en) * | 2013-01-25 | 2013-05-01 | 淄博美林电子有限公司 | High-efficient plane-type insulated gate bipolar transistor (IGBT) |
| CN103077967B (en) * | 2013-01-25 | 2016-01-06 | 淄博美林电子有限公司 | A kind of high efficiency plane formula insulated gate bipolar transistor IGBT |
| CN106129108A (en) * | 2016-08-29 | 2016-11-16 | 洛阳鸿泰半导体有限公司 | A kind of semiconductor crystal wafer with three dimensional structure |
| CN106129108B (en) * | 2016-08-29 | 2023-08-22 | 洛阳鸿泰半导体有限公司 | Semiconductor wafer with three-dimensional structure |
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Application publication date: 20120711 |