CN102564658B - Semiconductor pressure sensor and method of manufacturing the same - Google Patents

Abstract

The invention aims to provide a technique for suppressing the variation in the performance of a semiconductor pressure sensor when the semiconductor pressure sensor is downsized. In a method of manufacturing a semiconductor pressure sensor, a multilayer structure including a polysilicon diaphragm, a polysilicon gauge resistor formed on a side of a space which is to serve as a vacuum chamber below the polysilicon diaphragm, and a group of insulating films containing the polysilicon diaphragm and the polysilicon gauge resistor and having an etching solution introduction hole in contact with a sacrificial layer is formed on a sacrificial layer. In addition, an etching solution is supplied through the etching solution introduction hole and the sacrificial layer is etched with the etching solution, to thereby obtain a diaphragm body formed of the multilayer structure, which functions on the vacuum chamber, and a surface of a silicon substrate below a first opening of a first insulating film is etched to thereby form the space which is to serve as the vacuum chamber and a diaphragm stopper disposed in the space, protruding toward near the center of the diaphragm body.

Description

Semiconductor pressure sensor and manufacture method thereof

Technical field

The present invention relates to semiconductor pressure sensor and manufacture method thereof, particularly possess semiconductor pressure sensor and the manufacture method thereof of polysilicon strainometer resistance (gauge resistor).

Background technology

As a form of pressure transducer, there is the semiconductor pressure sensor that has utilized semiconductor substrate.In this semiconductor pressure sensor, on the surface of silicon substrate, form a plurality of diffusion resistances, described diffusion resistance becomes the corresponding institute's applied pressure of resistance and the strainometer resistance that changes, and this diffusion resistance is by the low diffusion wiring bridge joint of resistance value.Strainometer resistance configuration is in the part separately on 4 limits of for example rectangular-shaped barrier film (film).On the other hand, in silicon substrate, on the surface of the opposition side in the region of configuration strain meter resistance, be formed for forming the recess of barrier film.Patent documentation 1 has been announced this semiconductor pressure sensor.

Patent documentation 1: Japanese kokai publication hei 3-6824 communique

In existing semiconductor pressure sensor, silicon substrate is ground to after set thickness, then by etching being implemented in the back side of silicon substrate across set etching mask, forming above-mentioned recess is barrier film (diaphragm).

In such manufacture method, the thickness of the silicon substrate under recess was controlled by the etched time, thereby existed the thickness of barrier film easily to produce this problem of deviation.In addition, even if want to make the thickness attenuation of barrier film, if consider amount of grinding and the departure of etch quantity in silicon substrate face of silicon substrate, to take about 10 μ m be limit to its thickness.In addition, due to the etched deviation of silicon substrate, the position relative strain meter resistance skew of recess, thus be difficult to miniaturization accurately.

Summary of the invention

Therefore, the present invention completes in view of problem points as above, and its object is to provide the technology that can suppress the aberrations in property that the miniaturization of semiconductor pressure sensor follows.

The manufacture method of the semiconductor pressure sensor the present invention relates to, possess: (a) on semiconductor substrate, form the operation of the 1st dielectric film with a plurality of the 1st openings, and the operation that (b) is formed on the sacrifice layer joining with described semiconductor substrate in described a plurality of the 1st openings of the 1st dielectric film on described the 1st dielectric film.And possess: (c) on described sacrifice layer, form the operation of lit-par-lit structure, described lit-par-lit structure comprise polysilicon barrier film, should become this polysilicon barrier film below the polysilicon strainometer resistance that forms of the space side of vacuum chamber and interior bag they and there is the dielectric film group of the etching solution entrance hole joining with described sacrifice layer.And possess: (d) make etching solution by sacrifice layer described in the etching of described etching solution entrance hole, thereby form described lit-par-lit structure as the diaphragm body working on described vacuum chamber, and by the surface under described the 1st opening of described the 1st dielectric film in semiconductor substrate described in etching, formation should become the described space of described vacuum chamber and be configured in this space and near the operation of barrier film detent (stopper) outstanding the central authorities of described diaphragm body.

According to the present invention, by the lit-par-lit structure that can control accurately thickness, shape and contraposition, form diaphragm body.Thereby, can suppress the deviation of the performance that the miniaturization of semiconductor pressure sensor follows.In addition, barrier film detent is outstanding near the mode central authorities of easy strain in support diaphragm body, thereby the destruction that can prevent diaphragm body can be expected filming, the miniaturization of diaphragm body.In addition, the vacuum chamber side of polysilicon strainometer resistance configuration below polysilicon barrier film, thus be difficult to be subject to the impact of external environment condition.Therefore, can obtain the semiconductor pressure sensor that reliability is high.In addition, by etching, the space in diaphragm body and sacrifice layer in abutting connection with and form.Thereby, flowing of etching solution etc. can be improved, thereby the spent time of the operations such as etching can be shortened, can shorten the manufacturing time of semiconductor pressure sensor.

Accompanying drawing explanation

Fig. 1 is the vertical view that the semiconductor pressure sensor that embodiment 1 relates to is shown.

Fig. 2 is the sectional view that the A-A line of the semiconductor pressure sensor that embodiment 1 relates to is shown.

Fig. 3 is the figure that the circuit structure of the semiconductor pressure sensor that embodiment 1 relates to is shown.

Fig. 4 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 1 relates to is shown.

Fig. 5 is for the figure of thickness of the polysilicon film of the semiconductor pressure sensor that embodiment 1 relates to is described.

Fig. 6 is the vertical view that the semiconductor pressure sensor that embodiment 2 relates to is shown.

Fig. 7 is the sectional view that the A-A line of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Fig. 8 is the sectional view that the B-B line of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Fig. 9 is the sectional view that the C-C line of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 10 is the sectional view that the D-D line of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 11 is the sectional view that the E-E line of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 12 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 13 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 14 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 15 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 16 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 2 relates to is shown.

Figure 17 is the vertical view that the semiconductor pressure sensor that embodiment 3 relates to is shown.

Figure 18 is the sectional view that the A-A line of the semiconductor pressure sensor that embodiment 3 relates to is shown.

Figure 19 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 3 relates to is shown.

Figure 20 is the vertical view that the semiconductor pressure sensor that embodiment 4 relates to is shown.

Figure 21 is the vertical view that the semiconductor pressure sensor that embodiment 4 relates to is shown.

Figure 22 is the vertical view that the semiconductor pressure sensor that embodiment 5 relates to is shown.

Figure 23 is the sectional view that the A-A line of the semiconductor pressure sensor that embodiment 5 relates to is shown.

Figure 24 is the sectional view that the B-B line of the semiconductor pressure sensor that embodiment 5 relates to is shown.

Figure 25 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 5 relates to is shown.

Figure 26 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 5 relates to is shown.

Figure 27 is the vertical view that the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 28 is the vertical view that the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 29 is the sectional view that the A-A line of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 30 is the sectional view that the B-B line of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 31 is the sectional view that the C-C line of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 32 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 33 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 34 is the sectional view that the manufacturing process of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 35 is the figure that the action of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 36 is the figure that the action of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Figure 37 is the figure that the action of the semiconductor pressure sensor that embodiment 6 relates to is shown.

Description of reference numerals

1 silicon substrate; 1a recess; 2 the 1st dielectric films; 2a the 1st opening; 2c the 2nd opening; 2d outshot; Stream compensating pattern in 2e; 2f the 3rd opening; The large stream compensating pattern of 2g; 3 the 2nd dielectric films; 4a polysilicon wire; 4b polysilicon strainometer resistance; 5 the 3rd dielectric films; 5a polysilicon wire contact portion; 6 polysilicon barrier films; 6a outer frame; 7 the 4th dielectric films; 11 diaphragm bodies; 12 barrier film detents; 13 spaces; 15 etching solution entrance holes; 16 sacrifice layers; 21 the 1st metal levels; 22 the 2nd metal levels; 22b electronic pads; 23 glass coatings; 31 little streams; Stream in 32; 41 the 1st local pressure sensors; 42 the 2nd local pressure sensors.

Embodiment

< embodiment 1>

Fig. 1 is the vertical view that the semiconductor pressure sensor that embodiments of the present invention 1 relate to is shown, and Fig. 2 is the sectional view of the A-A line shown in Fig. 1.

The semiconductor pressure sensor that present embodiment relates to possesses: the semiconductor substrate that surface is formed with a plurality of (being 4 here) recess 1a is silicon substrate 1, is formed on silicon substrate 1 and has the 1st dielectric film 2 of a plurality of the 1st opening 2a, the diaphragm body 11 consisting of lit-par-lit structure, the 1st metal level 21 (being fine dotted line), the 2nd metal level 22 (being thick dashed line) and glass coating 23 (in Fig. 1, being thin single-point line) in Fig. 1 in Fig. 1.

Diaphragm body 11 comprises: polysilicon wire 4a and polysilicon strainometer resistance 4b; The polysilicon barrier film 6 forming at their upside; And their the dielectric film group who is formed by the 2nd dielectric film the 3, the 3rd dielectric film 5 and the 4th dielectric film 7 of interior bag.The space 13 of diaphragm body 11 on recess 1a is formed at the upside of silicon substrate 1, and the periphery of diaphragm body 11 is supported by the 1st dielectric film 2.This diaphragm body 11 along from the face side of silicon substrate 1 when the direction (13 the direction towards space) of rear side is subject to air pressure equal pressure, with the mode strain to should the downward lateral bend of pressure, can export and represent that its strain conditions is the big or small electric signal of pressure.

Space 13 is vacuum chamber, is positioned at the sealing 22a sealing in the outside of a plurality of recess 1a.In the following description, sometimes also claim space 13 for " vacuum chamber 13 ".In the present embodiment, the surface of a plurality of the 1st opening 2a of a plurality of recess 1a of silicon substrate 1, the 1st dielectric film 2 and the recess 1a side of diaphragm body 11 forms this vacuum chamber 13 (space 13).And, the dielectric film group when etching solution entrance hole 15 being communicated with vacuum chamber 13 is located at and is overlooked in the position in the outside of (Fig. 1) diaphragm body 11, and sealed by sealing 22a.

The Component units of the semiconductor pressure sensor next, present embodiment being related to is elaborated.

While overlooking each comfortable silicon substrate 1 surface of (Fig. 1) 4 recess 1a have rectangular-shaped, longitudinally and laterally each two mutually leave arrangement.In section (Fig. 2), this recess 1a has at downside the convex form that front end is more and more thinner.The height on 2 recess 1a silicon substrate 1 surface is each other identical with the height on silicon substrate 1 surface that is formed with the 1st dielectric film 2, and silicon substrate 1 has towards the more and more thinner protuberance 1b of the front end of diaphragm body 11.The front end of protuberance 1b is provided with dielectric film is carried out to composition and the front end dielectric film 2b that simultaneously forms with the 1st dielectric film 2.

Silicon substrate 1 in vacuum chamber 13 disposes near barrier film the detent 12 outstanding central authorities of diaphragm body 11.In the present embodiment, this barrier film detent 12 consists of protuberance 1b and front end dielectric film 2b, have and prevent that diaphragm body 11 is subject to from outside compared with large pressure and destroyed function, and there is the 2nd dielectric film 3 function affixed with silicon substrate 1 of diaphragm body 11 while preventing from manufacturing.

When in the present embodiment, the leading section of barrier film detent 12 (being front end dielectric film 2b here) is overlooked, (Fig. 1) has the cross-like shape in the gap that is present in 4 recess 1a.And the width of the leading section of barrier film detent 12 (being front end dielectric film 2b here) is below 5 μ m.

The 1st dielectric film 2 is formed on silicon substrate 1, and has a plurality of 1st opening 2as corresponding with a plurality of recess 1a difference.While overlooking (Fig. 1) a plurality of the 1st opening 2a each similarly have rectangular-shapedly with recess 1a, longitudinally and laterally respectively arranging two.Chemical Vapor Deposition) etc. the 1st dielectric film 2 is by CVD (chemical vapor deposition: carry out composition after oxide films such as HTO or TEOS of formation and form.

As shown in Figure 2, the 2nd dielectric film 3 is roughly formed on the 1st dielectric film 2 in the outside of sealing 22a toward each other, in the inner side of sealing 22a roughly above space 14 is formed at the 1st dielectric film 2.But overlook the anchor shown in (Fig. 1) (anchor) 17, even if the mode of also joining each other with the 2nd dielectric film 3 and the 1st dielectric film 2 in the inner side of sealing 22a forms.The 2nd dielectric film 3 is supported by the 1st dielectric film 2 at the periphery (anchor 17) of diaphragm body 11.The 2nd dielectric film 3 carries out composition and forms after forming oxide films such as HTO or TEOS by CVD.

In section (Fig. 2), polysilicon wire 4a and polysilicon strainometer resistance 4b are formed on the 2nd dielectric film 3.While overlooking (Fig. 1) polysilicon wire 4a by the leading section of above-mentioned barrier film detent 12 divide into 4 with the roughly the same shape of cruciform, polysilicon wire 4a longitudinal and horizontal adjacency connects via polysilicon strainometer resistance 4b separately from each other.The global shape of 4 polysilicon wire 4a becomes at each of 4 corners and has the approximate rectangular shape of the bellying 4aa bloating slightly laterally.

While overlooking (Fig. 1), 4 polysilicon strainometer resistance 4b form separately at left and right directions and extend, and they form mutually the same size.In the present embodiment, 2 polysilicon strainometer resistance 4ba that connect the polysilicon wire 4a of horizontal adjacency are formed near the central authorities of diaphragm body 11, and 2 polysilicon strainometer resistance 4bb that connect the polysilicon wire 4a of longitudinal adjacency are formed at respectively near two edges toward each other of diaphragm body 11.And 4 polysilicon strainometer resistance 4b are by polysilicon wire 4a bridge joint, to form Wheatstone bridge circuit described later.After polysilicon being carried out to the Impurity injections such as B (boron) or P (phosphorus), thereby anneal, form these polysilicon strainometer resistance 4b, make piezoresistance effect and resistance value become optimum value.In addition, in the present embodiment, polysilicon strainometer resistance 4b is made as the p-type strainometer resistance that is injected with B.

In section (Fig. 2), the 3rd dielectric film 5 is formed at polysilicon wire 4a and polysilicon strainometer resistance 4b is upper and their side.The 3rd dielectric film 5 has the polysilicon wire contact portion 5a that the opening of polysilicon wire 4a is exposed in a plurality of conducts on the bellying 4aa of polysilicon wire 4a as shown in Figure 1.On polysilicon wire 4a in this polysilicon wire contact portion 5a, be formed with the 1st metal level 21 (fine dotted line).In addition, the 3rd dielectric film 5 carries out composition and forms after forming the oxide film such as HTO or TEOS etc. by CVD.

In section (Fig. 2), polysilicon barrier film 6 is formed on the 3rd dielectric film 5.This polysilicon barrier film is formed by for example doped polycrystalline silicon.

In section (Fig. 2), the 4th dielectric film 7 is formed on polysilicon barrier film 6 and side.The 4th dielectric film 7 carries out composition and forms after forming the oxide film such as HTO or TEOS etc. by CVD.

As shown in Figure 2, at the 2nd dielectric film the 3, the 3rd dielectric film 5 and the 4th dielectric film 7 (dielectric film group), be provided with the etching solution entrance hole 15 being communicated with via 14Er Yu space, space 13.A part for the 2nd metal level 22 is used as sealing 22a and is filled in this etching solution entrance hole 15.

The 2nd metal level 22 spreads all over that polysilicon wire contact portion 5a is upper, (Fig. 1) longitudinally (Fig. 1) laterally on the etching solution entrance hole 15 of adjacency and form on the etching solution entrance hole 15 of adjacency and while overlooking with this polysilicon wire contact portion 5a while overlooking with this polysilicon wire contact portion 5a.The 2nd metal level 22 is by joining and bridge joint polysilicon strainometer resistance 4b with the 1st metal level 21 being formed in polysilicon wire contact portion 5a.In addition, by being filled to etching solution entrance hole 15 as described above, the 2nd metal level 22 comes vacuum seal space 13.The material of the 2nd metal level 22 is used for example Al (aluminium).

On the 2nd metal level 22, form the glass coating 23 of protection the 2nd metal level 22.In addition, glass coating 23 has the opening that the shape with polysilicon barrier film 6 is equal to, and about polysilicon wire contact portion 5a and etching solution entrance hole 15, at the opposition side of polysilicon barrier film 6, has the opening 23a that exposes the 2nd metal level 22.The 2nd metal level 22 in this opening 23a is used as electronic pads 22b.

The action of the semiconductor pressure sensor that the present embodiment then, the structure by above being formed relates to describes.In this semiconductor pressure sensor, while exerting pressure to diaphragm body 11,11 pairs of diaphragm bodies should pressure and strain, corresponding this strain of resistance value of the polysilicon strainometer resistance 4b that diaphragm body 11 comprises and changing.

Fig. 3 illustrates 4 above-mentioned polysilicon strainometer resistance 4b via the figure of the state of polysilicon wire 4a bridge joint.Here, two polysilicon strainometer resistance 4ba that set diaphragm body 11 center side shown in Fig. 1 have resistance R 1, R3, and two polysilicon strainometer resistance 4bb of diaphragm body 11 edge sides have resistance R 2, R4.

In Fig. 3, polysilicon strainometer resistance 4ba, the 4bb of resistance R 1～R4 form Wheatstone bridge circuit, between the contact of polysilicon strainometer resistance 4ba, 4bb of resistance R 1 and resistance R 2 and the contact of polysilicon strainometer resistance 4ba, the 4bb of resistance R 3 and resistance R 4, apply input voltage vin (=5V).

In the case, if the output voltage of establishing between the contact of polysilicon strainometer resistance 4ba, 4bb of resistance R 1 and resistance R 4 and the contact of polysilicon strainometer resistance 4ba, the 4bb of resistance R 2 and resistance R 3 is Vout, become Vout=(R2/ (R2+R3)-R1/ (R1+R4)) * Vin.For example, in the situation that the original state of diaphragm body 11 not being exerted pressure (R1=R2=R3=R4=100 Ω) becomes Vout=0V.

And polysilicon strainometer resistance 4b is in the situation that be subject to stress along the direction vertical with the direction of its current flowing, its resistance value changes hardly, but in the situation that is subject to stress, its resistance change along the direction of its current flowing.

Here, when diaphragm body 11 is exerted pressure, the middle body of diaphragm body 11 is with side-prominent mode strain downwards.In the case, the p-type polysilicon strainometer resistance 4ba that is located at its downside in polysilicon barrier film 6 central authorities is subject to drawing stress along the direction identical with direction of current, thereby its resistance value changes to "+" side, on the other hand, the p-type polysilicon strainometer resistance 4bb that is located at its downside at polysilicon barrier film 6 edges is compressed stress along the direction identical with direction of current, so its resistance value changes to "-" side.

If for example set in the situation that the resistance change rate that applies the pressure of 1atm (0.098MPa) to diaphragm body 11 is Δ R1/R1=Δ R3/R3=+1%, Δ R2/R2=Δ R4/R4=-1%, output voltage becomes Vout=(99/ (99+101)-101/ (101+99)) * Vin=50mV.The size correspondence of this output voltage V out put on diaphragm body 11 pressure size and change, so diaphragm body 11 produces the output voltage of the pressure that represents to put on diaphragm body 11.

Generally, the performance of semiconductor pressure sensor is determined by area and the thickness of diaphragm body 11.Thereby, in order to make semiconductor pressure sensor miniaturization, importantly make them there is no deviation.

Here, in the present embodiment, the area of diaphragm body 11 is in fact by determining with the area that anchor 17 supports polysilicon barrier film 6, and in addition, in fact the thickness of diaphragm body 11 determined by the CVD deposition thickness of polysilicon barrier film 6.And this polysilicon barrier film 6 is formed by the lit-par-lit structure that can suppress the dislocation of the deviation of area and thickness and the layer of lit-par-lit structure.Thereby, in the present embodiment, even by semiconductor pressure sensor miniaturization, also can suppress the deviation of its performance.

Therefore in addition, in the semiconductor pressure sensor relating in present embodiment, be formed with barrier film detent 12, even if work in-process etc. applies in the situation of excessive pressure, also can prevent the destruction of diaphragm body 11.Thereby, can easily carry out the filming of polysilicon barrier film 6.

Fig. 4 is the figure corresponding to Fig. 2, is the sectional view of a part that the manufacturing process of the semiconductor pressure sensor that present embodiment relates to is shown.Then, use the manufacture method of the semiconductor pressure sensor that this Fig. 4 relates to present embodiment to describe.

First, the crystal orientation (crystal orientation) of preparing first type surface is the silicon substrate 1 of (100), so that can adopt crystalline anisotropy's etching of etching solution in subsequent handling.

Then, on this first type surface of silicon substrate 1, form the 1st dielectric film 2 with a plurality of the 1st opening 2a.In the present embodiment, on this first type surface of silicon substrate 1, by heat oxide film film forming, be 0.1～1.0 about μ m or by CVD by behind the oxide film depositions such as TEOS, HTO 0.1～1.0 μ m left and right, carry out forming at this film the composition of a plurality of the 1st opening 2a, form the 1st dielectric film 2.Now, the 1st opening 2a interval is each other below 5 μ m.

Then, on the 1st dielectric film 2, be formed on the sacrifice layer 16 (double dot dash line in Fig. 1) joining with silicon substrate 1 in a plurality of the 1st opening 2a of the 1st dielectric film 2.In the present embodiment, on the 1st dielectric film 2, by CVD, doped polycrystalline silicon fiml is deposited behind 0.1～0.4 μ m left and right, this film is carried out to composition, form sacrifice layer 16.As later, by detaileds description, by utilizing the etching solution of the crystal orientation correlativity of TMAH etc. to remove this sacrifice layer 16, also utilize at this moment same etching solution also to remove the part of the 1st opening 2a downside of silicon substrate 1, form above-mentioned 13Ji space, space 14.In addition, in the present embodiment, when sacrifice layer 16 is overlooked, (Fig. 1) has the approximate rectangular shape representing with double dot dash line, has slightly in the inner part a plurality of opening 16a (rectangular-shaped double dot dash line) that form anchor 17 comparing its periphery.

Thereafter, on sacrifice layer 16, form lit-par-lit structure, described lit-par-lit structure comprises: polysilicon barrier film 6, is formed at polysilicon wire 4a and the polysilicon strainometer resistance 4b of space 13 sides of the vacuum chamber of the below that should become this polysilicon barrier film 6 and their dielectric film group of interior bag.Below, the formation of this lit-par-lit structure is described.

In the present embodiment, on sacrifice layer 16 and do not form on the 1st dielectric film 2 of this sacrifice layer 16, by CVD, by behind the oxide film deposition of TEOS, HTO etc. 0.1～0.3 μ m left and right, this film is carried out to composition, form the 2nd dielectric film 3.In addition,, in the opening 16a of sacrifice layer 16, by being joined, the 1st dielectric film 2 and the 2nd dielectric film 3 form anchor 17.

Then, on the 2nd dielectric film 3, by becoming behind polysilicon film deposition 0.1～0.3 μ m left and right of polysilicon wire 4a and polysilicon strainometer resistance 4b, this film is carried out to composition.In addition, consider to make to connect up resistance value step-down and the impact on the stress of polysilicon barrier film 6 as far as possible, on the almost whole surface of polysilicon barrier film 6, be formed for symmetrically forming the pattern of polysilicon wire 4a.In addition, the thickness of the polysilicon film forming here is preferably made as 0.15 μ m left and right, after will describe as to this.

Then, on polysilicon film and side by CVD by the oxide film deposition of TEOS, HTO etc. 0.1 about μ m, form the 3rd dielectric film 5.Then, by inject the p-type impurity such as B to polysilicon film, on the 2nd dielectric film 3 and at the 3rd dielectric film, form polysilicon wire 4a and polysilicon strainometer resistance 4b 5 times.Anneal thereafter.

Fig. 5 is the figure illustrating with respect to the resistance change rate of the surface boron concentration of polysilicon strainometer resistance 4b.In the figure, illustrating becoming the thickness of the polysilicon of polysilicon strainometer resistance 4b is the result that the situation of 0.05,0.15,0.45 μ m is studied.As shown in the figure, in the situation that its thickness is 0.15 μ m, between resistance change rate and surface boron concentration, the relation of logarithmic approximation is set up, and deviation diminishes.Thereby the thickness of the polysilicon strainometer resistance 4b (above-mentioned polysilicon film) of resistance R 1～R4 is preferably made as 0.15 μ m left and right, particularly 0.1～0.3 μ m.Thus, can obtain the polysilicon strainometer resistance 4b that piezoresistance effect is high, deviation is little.

, 3rd dielectric film 5 carried out to composition, on the bellying 4aa of polysilicon wire 4a, form a plurality of polysilicon wire contact portion 5a (opening) thereafter.Then, in each polysilicon wire contact portion 5a, be formed for connecting the 1st metal level 21 of polysilicon wire 4a and the 2nd metal level 22.In addition,, while using etching solution etch sacrificial layer 16 in subsequent handling, the 1st metal level 21 also has concurrently and prevents the etched defencive function of polysilicon wire 4a.

Then, on the 3rd dielectric film 5, by CVD, by becoming the thickness of doped polycrystalline silicon fiml deposition 0.3～2.0 μ m left and right of polysilicon barrier film 6, this film is carried out to composition, form polysilicon barrier film 6.Thereafter, in order to be injected into the activate of the impurity such as B of polysilicon wire 4a and polysilicon strainometer resistance 4b, and in order to carry out the Stress Control of polysilicon barrier film 6, with 1000 ℃ of thermal treatments of carrying out above high temperature.

Then, on polysilicon barrier film 6 and side by CVD by become the 4th dielectric film 7 TEOS, HTO etc. oxide film deposition 0.1～0.3 about μ m and carry out composition.Like this, on sacrifice layer 16, form lit-par-lit structure, described lit-par-lit structure comprises: polysilicon wire 4a and polysilicon strainometer resistance 4b, polysilicon barrier film 6 and their dielectric film group of interior bag (the 2nd dielectric film the 3, the 3rd dielectric film 5 and the 4th dielectric film 7).

, this dielectric film group carried out to composition, form the etching solution entrance hole 15 joining with sacrifice layer 16 thereafter.In addition, although form etching solution entrance hole 15 in stacked the 2nd～4th dielectric film 3,5,7 rear ability this dielectric film group here, be not limited thereto, also can when each composition of each dielectric film, form opening, thereby form etching solution entrance hole 15.

Then, make the special etching such as TMAH of not corroding the metals such as Al by etching solution entrance hole 15, isotropically etch sacrificial layer 16, thereby above-mentioned lit-par-lit structure is formed to the diaphragm body 11 working on vacuum chamber 13.In the present embodiment, after the etching of this sacrifice layer 16 starts, soon, the etching solution by etching solution entrance hole 15 also contacts with silicon substrate 1 by the 1st opening 2a of the 1st dielectric film 2.Its result, surface under the 1st opening 2a of the 1st dielectric film 2 in silicon substrate 1, by the anisotropically etching of same etching solution, should become the space 13 of vacuum chamber and be disposed in this space 13 and near barrier film the detent 12 outstanding central authorities of diaphragm body 11 thereby form.

Here, in the present embodiment, the surperficial crystal orientation of the 1st dielectric film 2 of the formation in silicon substrate 1 is (100).Thereby in fact the anisotropic etching of silicon substrate 1 is stopping with overlapping moment of (111) face, even if therefore etching period is elongated because of certain reason, also can suppresses etching and exceed needs and carry out.

In addition, in the present embodiment, the material that covers the 1st～4th dielectric film 2,3,5,7 of polysilicon wire 4a, polysilicon strainometer resistance 4b and polysilicon barrier film 6 etc. is hardly by the etched HTO of TMAH or TEOS, thereby even if its thickness is 0.1 μ m left and right, also fully has tolerance.Therefore, can protect polysilicon wire 4a etc. to avoid the erosion of etching solution.In addition, in the anchor 17 shown in Fig. 1, even after etching, the state that the 1st dielectric film 2 and the 2nd dielectric film 3 are in contact with one another is also maintained, and the configuration of this anchor 17 determines diaphragm size.The superimposed precision of this diaphragm size and anchor 17 and polysilicon strainometer resistance 4b determines by the alignment precision of face side, and because this alignment precision is high precision, so this superimposed precision forms high precision.

After the etching of sacrifice layer 16 grades, the structure that the operation by so far is obtained is washed, is dried.Now, barrier film detent 12 prevents that diaphragm body 11 and silicon substrate 1 are affixed.

, form 2nd metal level 22, join with the 1st metal level 21 thereafter, thereby and be filled to vacuum seal space 13 in etching solution entrance hole 15, and play a part electronic pads 22b.In the present embodiment, in this operation, should make the space 13 of polysilicon barrier film 6 downsides is vacuum, under vacuum, by sputter or evaporation, the 2nd metal level 22 consisting of Al is deposited to 0.5～10 μ m left and right, is filled to etching solution entrance hole 15.Now, the 2nd metal level 22 is contacted in polysilicon wire contact portion 5a with the 1st metal level 21.Then, the 2nd metal level 22 is carried out to composition.

Finally, with plasma CVD, by the glass coating of protection the 2nd metal level 22 23 deposition 0.5～1.0 μ m, to there is the mode of the opening 23a that exposes electronic pads 22a, carry out composition.In addition,, in the situation that making chip thickness attenuation, in the rear enforcement of formation the 4th dielectric film 7, make the processing of thinned chips.

Semiconductor pressure sensor and manufacture method thereof that foundation present embodiment as above relates to, form diaphragm body 11 by the lit-par-lit structure that can control accurately thickness, shape and contraposition.Thereby, can suppress the deviation of the performance that the miniaturization of semiconductor pressure sensor follows.In addition, barrier film detent 12 is outstanding near the mode supporting in diaphragm body 11 the easy central authorities of strain, thus the destruction that can prevent diaphragm body 11, and can expect filming, the miniaturization of diaphragm body 11.In addition, polysilicon strainometer resistance 4b is configured in vacuum chamber (space 13) side of the below of polysilicon barrier film 6, thereby is not subject to the impact of external environment condition.Therefore, can obtain the semiconductor pressure sensor that reliability is high.In addition, only carry out using for 1 time the etching of etching solution, just can form and should become the space of vacuum chamber 13.Here, space 13 forms in abutting connection with sacrifice layer 16, thereby can increase the area of section of the stream that etching solution, rinse water and air etc. flow through.Thereby, flowing of etching solution, rinse water and air etc. can be improved, thereby etching, washing, the spent time of operation such as dry can be shortened, can shorten the manufacturing time of semiconductor pressure sensor.

In addition, not be used in polysilicon barrier film 6 and form the etch-hole that for example sacrifice layer 16 etchings are used, the formation of the 2nd metal level 22 and glass coating 23 rests on anchor 17 midway.And diaphragm body 11 is formed by lit-par-lit structure even and that thickness is thinner.Thereby, the diaphragm body 11 having good uniformity can be formed, and the membrane stress that metal level 22 etc. gives diaphragm body 11 can be reduced.

In addition, the semiconductor pressure sensor relating to according to present embodiment and manufacture method thereof, the 2nd metal level 22 joins and forms with the 1st metal level 21 in polysilicon wire contact portion 5a, vacuum seal space 13 and working as electronic pads 22b.Thereby, the wiring of the 1st metal level 21 and the sealing in space 13 etc. can be carried out simultaneously, thereby manufacturing procedure number can be reduced.Therefore, can simplify the manufacture of semiconductor pressure sensor.

In addition, the semiconductor pressure sensor relating to according to present embodiment and manufacture method thereof, the leading section of barrier film detent 12 has criss-cross shape while overlooking.Thereby, the destruction that can prevent reliably diaphragm body 11.

In addition, the semiconductor pressure sensor relating to according to present embodiment and manufacture method thereof, the width of the leading section of barrier film detent 12 is below 5 μ m.Thereby, can be reduced in the etching of sacrifice layer 16 after diaphragm body 11 affixed with barrier film detent 12.

< embodiment 2>

Fig. 6 is the vertical view of the semiconductor pressure sensor that relates to of embodiments of the present invention 2, and Fig. 7～Figure 11 is respectively the sectional view of the A-A line～E-E line shown in Fig. 6.In addition, Figure 12～16th, corresponds respectively to the figure of Fig. 7～Figure 11, is the sectional view being illustrated in the manufacturing process of the semiconductor pressure sensor that present embodiment relates to the state before etching solution etching.Below, in the semiconductor pressure sensor relating in embodiments of the present invention 2, the identical Component units of the semiconductor pressure sensor relating to embodiment 1, with identical sign flag, and is described centered by the part different from embodiment 1.

As shown in Fig. 6, Fig. 9 and Figure 11, in the semiconductor pressure sensor relating in present embodiment, while overlooking (Fig. 6), the 1st dielectric film 2 also has and is formed at than a plurality of the 1st opening 2a more in the outer part and a plurality of the 2nd opening 2c that are communicated with etching solution entrance hole 15.And, as the part in space 13, be formed at silicon substrate 1 with the rill road 31 (the 1st stream) of the V-shape of the 2nd opening 2c adjacency.In the present embodiment, etching solution etc. are by this rill road 31, thereby can make the mobile embodiment 1 that is better than of etching solution etc.

The manufacture method of the semiconductor pressure sensor below, such present embodiment being related to describes.First, identical with embodiment 1, the crystal orientation of preparing first type surface is the silicon substrate 1 of (100).

Then, identical with embodiment 1, on this first type surface of silicon substrate 1, form the 1st dielectric film 2.But in the present embodiment, the 1st dielectric film 2 not only has a plurality of the 1st opening 2a, while overlooking, (Fig. 6) also has and is formed at a plurality of the 2nd opening 2c more in the outer part than the 1st opening 2a.Particularly, a plurality of the 2nd opening 2c are formed at respectively a plurality of anchors 17 each other.

Then, identical with embodiment 1, on the 1st dielectric film 2, form sacrifice layer 16.But in the present embodiment, sacrifice layer 16 not only joins with silicon substrate 1 in a plurality of the 1st opening 2a, and also joins with silicon substrate 1 in a plurality of the 2nd opening 2c.

Then, identical with embodiment 1, on sacrifice layer 16, form above-mentioned lit-par-lit structure.But in the present embodiment, dielectric film group's (the 2nd dielectric film the 3, the 3rd dielectric film 5 and the 4th dielectric film 7) etching solution entrance hole 15 is communicated with a plurality of the 2nd opening 2c of the 1st dielectric film 2.

Under this state, identically with embodiment 1 make etching solution pass through etching solution entrance hole 15 and isotropically during etch sacrificial layer 16, by lit-par-lit structure, form diaphragm body 11, and formation space 13, space 14 and barrier film detent 12.In the present embodiment, now, the etching solution by etching solution entrance hole 15 also passes through the 2nd opening 2c of the 1st dielectric film 2, contacts with silicon substrate 1.Its result, the surface under the 2nd opening 2c in silicon substrate 1 is by anisotropically etching, and rill road 31 is formed at silicon substrate 1 as the part in space 13.Thereafter, identical with embodiment 1, utilize behind the 2nd metal level 22 vacuum seal spaces 13, form glass coating 23.

Semiconductor pressure sensor and manufacture method thereof that foundation present embodiment as above relates to form rill road 31 when the etching of sacrifice layer 16.Thus, can increase among the stream that etching solution etc. passes through the area of section in the little part of embodiment 1 middle section area (part between the space 13 shown in Fig. 9 and etching solution entrance hole 15).Thereby, flowing of etching solution etc. can be improved, thereby the manufacturing time of semiconductor pressure sensor can be further shortened.In addition, can obtain in addition the effect identical with embodiment 1.

In addition,, as shown in Fig. 6 and Fig. 9, in the present embodiment, at silicon substrate 1, thering is crystal orientation (111) face with the surface of vacuum chamber 13 (being rill road 31) adjacency here.In the case, if when the end of this face is overlooked and etching solution entrance hole 15 overlapping, can increase the area of section of the stream that etching solution etc. passes through.Therefore, can further shorten the manufacturing time of semiconductor pressure sensor.In addition, can also improve the sealing of being brought by the 2nd metal level 22 (sealing 22a).

< embodiment 3>

Figure 17 is the vertical view of the semiconductor pressure sensor that relates to of embodiments of the present invention 3, and Figure 18 is the sectional view of the A-A line shown in Figure 17.In addition, Figure 19 is the figure corresponding with Figure 18, is the sectional view being illustrated in the manufacturing process of the semiconductor pressure sensor that present embodiment relates to the state before etching solution etching.Below, in the semiconductor pressure sensor relating in embodiments of the present invention 3, the identical Component units of the semiconductor pressure sensor relating to embodiment 2, with identical sign flag, and is described centered by the part different from embodiment 2.

As shown in Figure 17 and Figure 19, in the semiconductor pressure sensor relating in present embodiment, the 1st opening 2a of the 1st dielectric film 2 has the outshot 2d that gives prominence to and be communicated with etching solution entrance hole 15 laterally while overlooking.And, as the part in space 13, be formed at silicon substrate 1 with the middle stream 32 (the 2nd stream) of outshot 2d adjacency.In the present embodiment, etching solution etc. are by middle stream 32, thereby can make the mobile embodiment 2 that is better than of etching solution etc.

The manufacture method of the semiconductor pressure sensor below, such present embodiment being related to describes.First, identical with embodiment 2, the crystal orientation of preparing first type surface is the silicon substrate 1 of (100).

Then, identical with embodiment 2, on this first type surface of silicon substrate 1, form the 1st dielectric film 2.But in the present embodiment, when the 1st opening 2a of the 1st dielectric film 2 overlooks, (Figure 17) has laterally outstanding outshot 2d.Particularly, outshot 2d is formed at a plurality of anchors 17 each other.

Then, identical with embodiment 2, on the 1st dielectric film 2, form sacrifice layer 16.

Then, identical with embodiment 2, on sacrifice layer 16, form above-mentioned lit-par-lit structure.But in the present embodiment, dielectric film group's (the 2nd dielectric film the 3, the 3rd dielectric film 5 and the 4th dielectric film 7) etching solution entrance hole 15 is communicated with the outshot 2d of the 1st opening 2a.

Under this state, identical with embodiment 2, make etching solution pass through etching solution entrance hole 15 isotropically during etch sacrificial layer 16, by lit-par-lit structure, form diaphragm body 11, and form space 13, space 14, barrier film detent 12 and rill road 31.In the present embodiment, now, the etching solution by etching solution entrance hole 15 also contacts with silicon substrate 1 by the outshot 2d of the 1st opening 2a.Its result, the surface under the outshot 2d in silicon substrate 1 is by anisotropically etching, and middle stream 32 is formed at silicon substrate 1 as the part in space 13.Thereafter, identical with embodiment 2, with after the 2nd metal level 22 vacuum seals, form glass coating 23.

Semiconductor pressure sensor and manufacture method thereof that foundation present embodiment as above relates to form middle stream 32 when the etching of sacrifice layer 16.Thus, can increase among the stream that etching solution etc. passes through the area of section in the little part of embodiment 2 middle section areas (part between the space 13 shown in Figure 18 and etching solution entrance hole 15).Thereby, flowing of etching solution etc. can be improved, thereby the manufacturing time of semiconductor pressure sensor can be further shortened.In addition, can obtain in addition the effect identical with embodiment 1.

In addition, identical with embodiment 2, in the present embodiment, silicon substrate 1 is also having crystal orientation (111) face with the surface of vacuum chamber 13 (being middle stream 32) adjacency here.In the case, if when only the end of this face is overlooked and etching solution entrance hole 15 overlapping, can increase the area of section of the stream that etching solution etc. passes through.Therefore, can shorten the manufacturing time of semiconductor pressure sensor, and also can improve the sealing of being brought by the 2nd metal level 22 (sealing 22a).

In addition, in forming as in the present embodiment, during stream 32, the mobile of etching solution becomes too good, and side etching rate accelerates, and its result may be difficult to form according to the pattern of design at silicon substrate 1.Therefore, in the present embodiment, in the 1st opening 2a of the 1st dielectric film 2, be provided with as the middle stream compensating pattern 2e that prevents side etching use compensating pattern that suppresses the side etching of silicon substrate 1 when the etching of sacrifice layer 16 grades.Thereby, can suppress the side etching in silicon substrate 1, can form according to the pattern (pattern of expectation) of design.In addition, in the present embodiment, dielectric film is carried out to composition and stream compensating pattern 2e in simultaneously forming with the 1st dielectric film 2.

In addition, as in the present embodiment, in crystalline anisotropy's etching, etched pattern is beyond rectangle in the situation that, and it is complicated that the shape obtaining in this etching becomes.Thereby, be difficult to predict that the situation of final shape is inferior, only formation rill road 31 that also can be as Embodiment 2.

< embodiment 4>

Figure 20 and Figure 21 are the vertical views of the semiconductor pressure sensor that relates to of embodiments of the present invention 4.Below, in the semiconductor pressure sensor relating in present embodiment, the identical Component units of the semiconductor pressure sensor relating to embodiment 3, with identical sign flag, and is described centered by the part different from embodiment 3.

As shown in Figure 20 and Figure 21, in the present embodiment, on the above-mentioned surface of silicon substrate 1, replace a plurality of recess 1a and form the recess 1a that a plurality of recess 1a part is combined into.And the 1st dielectric film 2 has the 3rd opening 2f that replaces a plurality of the 1st opening 2a and a plurality of the 1st opening 2a parts are combined into.Particularly, the 1st dielectric film 2 shown in Figure 20 has the 3rd opening 2f that replaces 2 the 1st opening 2a of longitudinal adjacency and the 1st opening 2a part is combined into, and the 1st dielectric film 2 shown in Figure 21 has the 3rd opening 2f that replaces 4 the 1st opening 2a of vertical or horizontal adjacency and the 1st opening 2a part is combined into.

In semiconductor pressure sensor and manufacture method thereof that present embodiment as above relates to, when the etching of above-mentioned sacrifice layer 16, can increase the stream that, etching solution that form along sacrifice layer 16 etc. passes through.That is, large stream 33 can be formed, thereby flowing of etching solution etc. can be improved.Therefore, can further shorten the manufacturing time of semiconductor pressure sensor.In addition, can obtain in addition the effect identical with embodiment 1.

In addition, while forming as in the present embodiment large the 3rd opening 2f of area, the mobile of etching solution becomes too good, and side etching rate accelerates, and its result may be difficult to form according to the pattern of design at silicon substrate 1.Therefore, in the present embodiment, in the 3rd opening 2f, be provided with as the large stream compensating pattern 2g that prevents side etching use compensating pattern that suppresses the side etching of silicon substrate 1 when the etching of sacrifice layer 16 grades.Thereby, can suppress the side etching in silicon substrate 1, can form according to the pattern (pattern of expectation) of design.In addition, in the present embodiment, dielectric film is carried out composition and forms large stream compensating pattern 2g with the 1st dielectric film 2 simultaneously.

In addition, as in the present embodiment, in crystalline anisotropy's etching, etched pattern is beyond rectangle in the situation that, thereby complicate by the shape that this etching obtains, to be difficult to situation about predicting inferior for net shape, also can only form as Embodiment 2 rill road 31.

< embodiment 5>

Figure 22 is the vertical view of the semiconductor pressure sensor that relates to of embodiments of the present invention 5, and Figure 23 and Figure 24 are respectively the sectional views of the A-A line shown in Figure 22 and B-B line.In addition, Figure 25 and Figure 26 are corresponding with Figure 23 and Figure 24 respectively figure, are the sectional views being illustrated in the manufacturing process of the semiconductor pressure sensor that present embodiment relates to the state before etching solution etching.Below, in the semiconductor pressure sensor relating in embodiments of the present invention 5, the identical Component units of the semiconductor pressure sensor relating to embodiment 2, with identical sign flag, and is described centered by the part different from embodiment 2.

As shown in Figure 22～Figure 26, diaphragm body 11 (lit-par-lit structure) also comprises outer frame 6a, described outer frame 6a is wrapped in above-mentioned dielectric film group, and while overlooking, (Figure 22) leaves and be formed at its outside with polysilicon wire 4a, polysilicon strainometer resistance 4b, polysilicon barrier film 6 and anchor 17.In addition, outer frame 6a is covered by the 4th dielectric film 7 on the 3rd dielectric film 5, in the present embodiment, doped polycrystalline silicon fiml is carried out composition and is formed with polysilicon barrier film 6 simultaneously.

Then, when etching solution entrance hole 15 and the 2nd metal level 22 are overlooked, (Figure 22) is formed at outer frame 6a outside, and when glass coating 23 is also overlooked, (Figure 22) is formed at outer frame 6a outside.

Semiconductor pressure sensor and manufacture method thereof that foundation present embodiment as above relates to, do not cover the 2nd metal level 22 and the glass coating 23 that how many diaphragm bodies 11 are given to stress on the polysilicon barrier film 6 in diaphragm body 11 and anchor 17.Thereby, these membrane stresses can be reduced, thereby high-precision semiconductor pressure sensor can be obtained.Can obtain in addition the effect identical with embodiment 2.

< embodiment 6>

Figure 27 and Figure 28 are the vertical views of the semiconductor pressure sensor that relates to of embodiments of the present invention 6, and Figure 29～Figure 31 is respectively the sectional view of the A-A line～C-C line shown in Figure 27 and Figure 28.In addition, the right-hand member shown in Figure 27 is connected at X-X line place with the left end shown in Figure 28.In addition, Figure 32～Figure 34 is respectively the figure corresponding with Figure 29～Figure 31, is the sectional view illustrating in the manufacturing process of the semiconductor pressure sensor that present embodiment relates to the state before etching solution etching.Below, in the semiconductor pressure sensor relating in embodiments of the present invention 6, the identical Component units of the semiconductor pressure sensor relating to embodiment 2, with identical sign flag, is described centered by the part different from embodiment 2.

As shown in Figure 27 and Figure 28, the semiconductor pressure sensor that present embodiment relates to possesses the semiconductor pressure sensor of explanation in embodiment 2 as the 1st and the 2nd local pressure sensor 41,42.The the 1st and the 2nd local pressure sensor 41,42 respectively with 1 semiconductor pressure sensor of explanation so far roughly the same form, there is 1 polysilicon barrier film 6.

In the present embodiment, replace 4 above-mentioned p-type polysilicon wire 4a, the 1st local pressure sensor 41 has 2 p-type polysilicon wire 4ap1 of horizontal adjacency and 2 N-shaped polysilicon wire 4an1 of horizontal adjacency.And, replacing 4 above-mentioned p-type polysilicon strainometer resistance 4b, the 1st local pressure sensor 41 has 2 polysilicon strainometer resistance 4bp1,4bn1, has mutually different conductivity type (p-type and N-shaped).These 2 polysilicon strainometer resistance 4bp1,4bn1 near the central authorities of the polysilicon barrier film 6 of the 1st local pressure sensor 41 with self length direction (direction of current flowing) mode balanced configuration parallel to each other.And p-type polysilicon strainometer resistance 4bp1 connects 2 p-type polysilicon wire 4ap1 each other, N-shaped polysilicon strainometer resistance 4bn1 connects 2 N-shaped polysilicon wire 4an1 each other.

Equally, replace 4 above-mentioned p-type polysilicon wire 4a, the 2nd local pressure sensor 42 has 2 p-type polysilicon wire 4ap2 of horizontal adjacency and 2 N-shaped polysilicon wire 4an2 of horizontal adjacency.And, replacing 4 above-mentioned p-type polysilicon strainometer resistance 4b, the 2nd local pressure sensor 42 has 2 polysilicon strainometer resistance 4bp2,4bn2, has mutually different conductivity type (p-type and N-shaped).These 2 polysilicon strainometer resistance 4bp2,4bn2 near the central authorities of the polysilicon barrier film 6 of the 2nd local pressure sensor 42 with self length direction (direction of current flowing) mode balanced configuration parallel to each other.And p-type polysilicon strainometer resistance 4bp2 connects 2 p-type polysilicon wire 4ap2 each other, N-shaped polysilicon strainometer resistance 4bn2 connects 2 N-shaped polysilicon wire 4an2 each other.

In addition, the Wheatstone bridge circuit shown in polysilicon strainometer resistance 4bp1, the 4bn1 of the 1st local pressure sensor 41 and the polysilicon strainometer resistance 4bp2 of the 2nd local pressure sensor 42,4bn2 pie graph 3.In this Wheatstone bridge circuit, the two ends of the p-type polysilicon strainometer resistance 4bp1 of the 1st local pressure sensor 41 are connected with one end of N-shaped polysilicon strainometer resistance 4bn1,4bn2 respectively, and the two ends of the p-type polysilicon strainometer resistance 4bp2 of the 2nd local pressure sensor 42 are connected with the other end of N-shaped polysilicon strainometer resistance 4bn1,4bn2 respectively.In other words, in above-mentioned Wheatstone bridge circuit, the two ends of the N-shaped polysilicon strainometer resistance 4bn1 of the 1st local pressure sensor 41 are connected with one end of p-type polysilicon strainometer resistance 4bp1,4bp2 respectively, and the two ends of the N-shaped polysilicon strainometer resistance 4bn2 of the 2nd local pressure sensor 42 are connected with the other end of p-type polysilicon strainometer resistance 4bp1,4bp2 respectively.

In addition, in the present embodiment, local pressure sensor 41 forms with mutually the same pattern with local pressure sensor 42.Thereby, can make the design producing of semiconductor pressure sensor easy.In addition, in the present embodiment, the pattern of polysilicon wire 4ap1,4an1,4ap2,4an2 forms symmetrically, thereby can easily make semiconductor pressure sensor high precision int.

Then, the manufacture method of the semiconductor pressure sensor that present embodiment is as above related to describes centered by the operation different from embodiment 2.First, identical with embodiment 2, the crystal orientation of preparing first type surface is the silicon substrate 1 of (100).Then, identical with embodiment 2, on this first type surface of silicon substrate 1, form the 1st dielectric film 2, thereafter, on the 1st dielectric film 2, form sacrifice layer 16.

Then, form above-mentioned lit-par-lit structure.Here, in the present embodiment, by the polysilicon film to being formed between the 2nd dielectric film 3 and the 3rd dielectric film 5, optionally inject the p-type impurity such as B, form p-type polysilicon wire 4ap1,4ap2 and polysilicon strainometer resistance 4bp1,4bp2, by optionally injecting the N-shaped impurity such as P to same polysilicon film, form N-shaped polysilicon wire 4an1,4an2 and polysilicon strainometer resistance 4bn1,4bn2.The concentration of impurity is now so that piezoresistance effect and resistance value become the mode of optimum value adjusts.Thereafter, identical with embodiment 2, anneal etc., form lit-par-lit structure.

Then, identical with embodiment 2, make etching solution pass through etching solution entrance hole 15, etch sacrificial layers 16 etc., after utilizing the 2nd metal level 22 vacuum seals, form glass coating 23.

The effect of the semiconductor pressure sensor that the present embodiment then, the structure by above being formed relates to describes.

Figure 35 be length direction (direction of current flowing) shown in N-shaped polysilicon strainometer resistance 4bn1,4bn2 and drawing stress apply angle between direction and with the figure of the relation of the rate of change of its resistance value, Figure 36 is the figure that the identical relation in p-type polysilicon strainometer resistance 4bp1,4bp2 is shown.In the transverse axis shown in these figure, 0 ° of expression applies drawing stress along the direction identical with length direction (direction of current flowing), and 90 ° of expressions apply drawing stress along the direction vertical with length direction (direction of current flowing).

From these Figure 35,36, in the situation that the direction identical with length direction applies drawing stress, the resistance value of N-shaped polysilicon strainometer resistance 4bn1,4bn2 changes to "-" side, and the resistance value of p-type polysilicon strainometer resistance 4bp1,4bp2 changes to "+" side.Thereby, different from the above-mentioned semiconductor pressure sensor that applies respectively drawing stress and compression stress, in the semiconductor pressure sensor relating in present embodiment, as long as only apply drawing stress to polysilicon strainometer resistance 4bp1,4bp2,4bn1,4bn2, just can carry out the action identical with above-mentioned semiconductor pressure sensor.Its result, in the present embodiment, as described below, the sensitivity that can improve semiconductor pressure sensor.

Figure 37 is illustrated in the situation that diaphragm body 11 (polysilicon barrier film 6) is under pressure, at the buy property big or small figure of raw stress of everybody of diaphragm body 11 (polysilicon barrier film 6).In the transverse axis shown in this figure, 0 μ m is illustrated near the position, edge of diaphragm body 11, and 100 μ m are illustrated near the position of central authorities of diaphragm body 11.In addition, in the longitudinal axis, on the occasion of in the situation that represent to produce and to have compression stress, for negative value in the situation that, represent that generation has drawing stress.

As shown in the drawing, even in the situation that applying uniform pressure to diaphragm body 11, the absolute value that is applied near drawing stress central authorities is also large than the absolute value that is applied near compression stress edge.In addition, near the variation of the value of drawing stress when position is offset a little to some extent central authorities, the variation of the value of the compression stress while being offset a little to some extent than near position edge is little.

Here, in the semiconductor pressure sensor and manufacture method thereof relating in present embodiment, as mentioned above, polysilicon strainometer resistance 4bp1,4bp2,4bn1,4bn2, as long as being only applied in drawing stress just can move, are configured near central authorities.Thereby, the sensitivity that can improve semiconductor pressure sensor.In addition, even if how many off-design of allocation position of polysilicon strainometer resistance 4bp1,4bp2,4bn1,4bn2 follow this variation of stress also less, thereby can suppress the deviation of the performance of semiconductor pressure sensor.Can obtain in addition the effect identical with embodiment 2.

In addition, in the present embodiment, there are 2 local pressure sensors 41,42, so chip size is how many becomes large, Yi Bian but diaphragm size is to be for example the foursquare area degree of 30～200 μ m and enough little, thus can think that its impact is very little.

In addition, as shown in Figure 35 and Figure 36, because each impurity concentration in N-shaped and p-type polysilicon strainometer resistance is different, therefore the absolute value of the resistance change rate when applying identical stress is sometimes also different, if but this becomes problem, can revisal any absolute value so that the absolute value of now equates with another absolute value.

Claims (20)

1. a manufacture method for semiconductor pressure sensor, possesses:

(a) on semiconductor substrate, form the operation of the 1st dielectric film with a plurality of the 1st openings;

(b), on described the 1st dielectric film, in described a plurality of the 1st openings of the 1st dielectric film, form the operation of the sacrifice layer joining with described semiconductor substrate;

(c) on described sacrifice layer, form the operation of lit-par-lit structure, described lit-par-lit structure comprises: polysilicon barrier film, should become this polysilicon barrier film below the polysilicon strainometer resistance that forms of the space side of vacuum chamber, interior bag they and there is the dielectric film group of the etching solution entrance hole joining with described sacrifice layer; And

(d) make etching solution by sacrifice layer described in described etching solution entrance hole etching, thereby described lit-par-lit structure is formed to the diaphragm body working on described vacuum chamber, and by the surface under described the 1st opening of described the 1st dielectric film in semiconductor substrate described in etching, formation should become the described space of described vacuum chamber and be disposed in this space and near the operation of barrier film the detent outstanding central authorities of described diaphragm body.

2. the manufacture method of semiconductor pressure sensor according to claim 1, wherein,

The described lit-par-lit structure forming in described operation (c) comprises:

The 2nd dielectric film that belongs to described dielectric film group, it forms on described sacrifice layer;

Polysilicon wire forms on described the 2nd dielectric film;

The 3rd dielectric film that belongs to described dielectric film group, it has the opening that exposes this polysilicon wire in described polysilicon wire, also possesses:

(e) in the described polysilicon wire in the described opening of described the 3rd dielectric film, form the operation of the 1st metal level; And

(f) form the operation of the 2nd metal level, the 2nd metal level and described the 1st metal level join, and are filled into space described in the interior vacuum seal of described etching solution entrance hole, and work as electronic pads.

3. according to the manufacture method of claim 1 or semiconductor pressure sensor claimed in claim 2, wherein,

The leading section of the described barrier film detent forming in described operation (d) has criss-cross shape while overlooking.

4. the manufacture method of semiconductor pressure sensor according to claim 3, wherein,

The width of the described leading section of described barrier film detent is below 5 μ m.

5. according to the manufacture method of claim 1 or semiconductor pressure sensor claimed in claim 2, wherein,

Described the 1st dielectric film forming in described operation (a) also has and is formed at than described a plurality of the 1st openings a plurality of the 2nd openings more in the outer part while overlooking,

In the described a plurality of the 1st and the 2nd opening of the described sacrifice layer forming in described operation (b) at described the 1st dielectric film, join with described semiconductor substrate,

The described etching solution entrance hole and described the 2nd open communication that in described operation (c), form,

In described operation (d), the part using the 1st stream with described the 2nd opening adjacency as described space is formed at described semiconductor substrate.

6. according to the manufacture method of claim 1 or semiconductor pressure sensor claimed in claim 2, wherein,

Described the 1st opening of described the 1st dielectric film forming in described operation (a) has outstanding laterally outshot while overlooking,

The described etching solution entrance hole forming in described operation (c) is communicated with the described outshot of described the 1st opening,

In described operation (d), the part using the 2nd stream with described outshot adjacency as described space is formed at described semiconductor substrate.

7. according to the manufacture method of claim 1 or semiconductor pressure sensor claimed in claim 2, wherein,

Described the 1st dielectric film has the 3rd opening that the local combination of described a plurality of the 1st openings is formed, to replace described a plurality of the 1st opening.

8. the manufacture method of semiconductor pressure sensor according to claim 6, wherein,

In described the 1st opening of described the 1st dielectric film, be provided with when the etching of described operation (d), suppress described semiconductor substrate side etching prevent side etching compensating pattern.

9. the manufacture method of semiconductor pressure sensor according to claim 5, wherein,

By the etching of described operation (d) described semiconductor substrate appear and with the end of crystal orientation (111) face of described space adjacency, while overlooking and described etching solution entrance hole overlapping.

10. a semiconductor pressure sensor, possesses:

Semiconductor substrate, is formed with a plurality of recesses on surface;

The 1st dielectric film forms on described semiconductor substrate, has a plurality of 1st openings corresponding with described a plurality of recesses difference; And

Diaphragm body, comprises: polysilicon strainometer resistance and their dielectric film group of interior bag that polysilicon barrier film, the vacuum chamber side below this polysilicon barrier film form,

The surface of described a plurality of the 1st openings of described a plurality of recesses of described semiconductor substrate, described the 1st dielectric film and the described recess side of described diaphragm body forms described vacuum chamber,

Be located at described dielectric film group with the etching solution entrance hole of described vacuum chamber,

Described semiconductor substrate in described vacuum chamber disposes near barrier film the detent outstanding central authorities of described diaphragm body.

11. semiconductor pressure sensors according to claim 10, wherein,

Described diaphragm body comprises:

The 2nd dielectric film that belongs to described dielectric film group, is supported by described the 1st dielectric film at the periphery of this diaphragm body;

Polysilicon wire forms on described the 2nd dielectric film; And

The 3rd dielectric film that belongs to described dielectric film group has the opening that exposes this polysilicon wire in described polysilicon wire, also possesses:

The 1st metal level, forms in the described polysilicon wire in the described opening of described the 3rd dielectric film; And

The 2nd metal level, joins with described the 1st metal level, and is filled in described etching solution entrance hole vacuum chamber described in vacuum seal, and works as electronic pads.

12. according to the semiconductor pressure sensor described in claim 10 or claim 11, wherein,

The leading section of described barrier film detent has criss-cross shape while overlooking.

13. semiconductor pressure sensors according to claim 12, wherein,

The width of the described leading section of described barrier film detent is below 5 μ m.

14. according to the semiconductor pressure sensor described in claim 10 or claim 11, wherein,

Described the 1st dielectric film also has while overlooking and is formed at than described a plurality of the 1st openings more in the outer part and a plurality of the 2nd openings that are communicated with described etching solution entrance hole,

As the part of described vacuum chamber, be formed at described semiconductor substrate with the 1st stream of described the 2nd opening adjacency.

15. according to the semiconductor pressure sensor described in claim 10 or claim 11, wherein,

Described the 1st opening of described the 1st dielectric film has the outshot of giving prominence to and being communicated with described etching solution entrance hole laterally while overlooking,

As the part of described vacuum chamber, be formed at described semiconductor substrate with the 2nd stream of described outshot adjacency.

16. according to the semiconductor pressure sensor described in claim 10 or claim 11, wherein,

On the described surface of described semiconductor substrate, form the recess that the local combination of described a plurality of recesses is formed, replace described a plurality of recess,

Described the 1st dielectric film has the 3rd opening that the local combination of described a plurality of the 1st openings is formed, and replaces described a plurality of the 1st opening.

17. semiconductor pressure sensors according to claim 14, wherein,

Described semiconductor substrate has crystal orientation (111) face on the surface with described vacuum chamber adjacency, when the end of this face is overlooked and described etching solution entrance hole overlapping.

18. according to the semiconductor pressure sensor described in claim 10 or claim 11, wherein,

The thickness of the polysilicon film of described polysilicon strainometer resistance is 0.1～0.3 μ m.

19. semiconductor pressure sensors according to claim 11, wherein,

Described diaphragm body also comprises outer frame, and described outer frame is wrapped in described dielectric film group, while overlooking and described polysilicon barrier film leave be formed at its outside,

Described etching solution entrance hole and described the 2nd metal level are formed at from described outer frame to outside while overlooking, and also possess

Overlook outer frame described in Shi Cong to the glass coating forming on described the 2nd metal level in outside.

20. 1 kinds of pressure transducers, wherein, possess according to the semiconductor pressure sensor described in claim 10 or claim 11 as the 1st and the 2nd local pressure sensor,

The the described the 1st and the 2nd local pressure sensor has mutually different conductivity type separately, and near the central authorities of the described polysilicon barrier film of correspondence, has 2 described polysilicon strainometer resistance of configuration parallel to each other,

In the Wheatstone bridge circuit forming at the described polysilicon strainometer resistance by the described the 1st and the 2nd local pressure sensor, the two ends of the described polysilicon strainometer resistance with a kind of conductivity type in a local pressure sensor are connected with one end of 2 with another kind of conductivity type described polysilicon strainometer resistance respectively, and the two ends of the described polysilicon strainometer resistance with this kind of conductivity type in another local pressure sensor are connected with the other end of 2 with another kind of conductivity type described polysilicon strainometer resistance respectively.