CN102540246B - High-resolution petroleum seismic prospecting system - Google Patents
High-resolution petroleum seismic prospecting system Download PDFInfo
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Abstract
The invention belongs to a petroleum seismic prospecting instrument, and particularly relates to a high-resolution petroleum seismic prospecting system, which comprises a cover switch circuit, a PCI (peripheral component interconnect) interface board, a PC104+embedded industrial personal computer, a signal generating circuit, six data acquisition boards, a computer bus and a power circuit. The data acquisition boards are electrically connected with the PC104+embedded industrial personal computer via the PCI interface board, the PC104+embedded industrial personal computer realizes distribution of data, control signals and address signals via a communication loop between the PCI interface and the PC104+embedded industrial personal computer, signal input ports of the data acquisition boards are electrically connected with an output end of the cover switch circuit, one data acquisition board is electrically connected with a signal end of the signal generating circuit so that the work state and the precision of the data acquisition board are detected and corrected, the cover switch circuit and a front-end amplifying circuit are respectively controlled by a processor via the computer bus, and an address end of the cover switch circuit selects addresses according to commands of the PC104+embedded industrial personal computer. The high-resolution petroleum seismic prospecting instrument has multiple channels, is high in resolution, low in power consumption and high in reliability and is provided with a built-in electronic cover switch.
Description
Technical field
The invention belongs to oil seismic exploration instrument, particularly a kind of high-resolution petroleum seismic prospecting system.
Background technology
Seismic prospecting instrument be in seismic prospecting with secondary reflection or with other vibroseis earthquake-wave-excitings, and record the instrument of the vibration displacement that it causes on ground.By analyzing the propagation law of seismic event in rock, determine depth of burial and the shape of seismic interface, the basic task of seismic prospecting instrument is collection and the record of field geological data.Gas prospecting field seismic prospecting at oil is technical way.At present there is problem in various degree at aspects such as precision, resolution, dynamic range, power consumption, sensitive height, anti-interference, extendibility, light portables in seismic prospecting instrument.Provide oil seismic exploration instrument below both at home and abroad with quasi-instrument index contrast table, therefrom can find out some problems.From table, can recognize that existing oil seismic exploration instrument is from 8 A/D to 24 A/D transition, to obtain higher resolution, and its switching frequency is also to higher development, make it can detect more hyperchannel, to obtain more auspicious real experimental data for software analysis simultaneously.
As everyone knows, resolution, port number are determining whether oil seismic exploration equipment can realize higher performance, and its use software whether powerful really outside design own, with above-mentioned hardware whether can provide can be how information-related.
Contrast with quasi-instrument index both at home and abroad
Summary of the invention
The object of this invention is to provide the high-resolution petroleum seismic prospecting system of a kind of hyperchannel, high resolving power, low-power consumption, high reliability, built-in electronics overlay switch.
The object of the present invention is achieved like this, a kind of high-resolution petroleum seismic prospecting system, it is characterized in that: it comprises: overlay switch circuit, pci interface plate, PC104+ built-in industrial control machine, signal generating circuit, data acquisition board, computer bus and power circuit, data acquisition board has 6, data acquisition board is electrically connected with PC104+ built-in industrial control machine by pci interface plate, by pci interface and PC104+ built-in industrial control machine communication loop, carry out data by PC104+ built-in industrial control machine, control signal, the distribution of address signal, the signal input port of data acquisition board is electrically connected with the output terminal of overlay switch circuit, wherein be electrically connected with the signal end of signal generating circuit a data acquisition board, for detection of, the duty of correction data acquisition plate, precision, overlay switch circuit and pre-amplification circuit are controlled by processor by computer bus respectively, the address end of overlay switch circuit is chosen address by processor according to the order of PC104+ built-in industrial control machine, and the seismoreceiver of selection is connected to corresponding pre-amplification circuit, wave detector converts vibration signal to analog electrical signal, be connected to overlay switch circuit by large line, overlay switch circuit passes through the effective passage of processor gating according to host computer (PC104+ built-in industrial control machine) capture setting, the corresponding position conducting of overlay switch circuit, make the signal connection of wave detector be delivered to data acquisition board, by data acquisition board amplification, analog to digital conversion, data-storing, carry out data demonstration by PC104+ built-in industrial control machine.
Described data acquisition board comprises: pre-amplification circuit, analog to digital converter, storer, processor and average address assignment are given the overlay switch circuit of each blocks of data collection plate, the overlay switch circuit of distributing to each blocks of data collection plate is made up of 8 ADG734, one blocks of data collection plate can difference access 32 wave detectors, two passage conductings of ADG734 make a wave detector difference be linked into a pre-amplification circuit, one blocks of data collection plate has 16 pre-amplification circuits, the output of pre-amplification circuit is electrically connected with the input of analog to digital converter, one blocks of data collection plate has 2 analog to digital converters, every analog to digital converter can connect 8 tunnel simulating signal inputs simultaneously, accessible 16 tunnel simulating signal inputs altogether, analog to digital converter is 24 analog to digital converters.All control signal ends of analog to digital converter are electrically connected with the I/O interface of processor by computer bus, by the gain of processor control analog to digital converter and passage.The converting digital output of analog to digital converter is connected by serial port power with processor, by processor, data is processed, and finally by processor, byte data after treatment is stored in storer.Processor and storer are electrically connected by computer bus.
Each road analog signals line in described data acquisition board is clamped in PCB levels ground wire in circuit board, and circuit board adopts Multilayer Structure.
Described overlay switch circuit adopts the ADG734 of ANALOG DEVICE company of the U.S. to form switch arrays, overlay switch electricity can be selected 48-96 wave detector, after the wave detector that overlay switch circuit is selected is connected, wave detector output signal positive and negative terminal will be connected to INA+ and the INA-end of corresponding pre-amplification circuit, GAIN0, GAIN1, GAIN2 select for preamplification gain, can select to arrange 0,6,12,18,24,30, the preamplification gain of 36dB; PWND, LPWP are that mode of operation is selected, and can be arranged to park mode, low-speed mode, during non-collection, reduce system power dissipation; GAIN0, GAIN1, GAIN2, PWND, LPWP are electrically connected with the I/O port of processor by computer bus, and according to PC104+ built-in industrial control machine (host computer), instruction is controlled; The output terminal OUTF+ of pre-amplification circuit, the input end that OUTF-difference enters analog to digital converter, carry out analog to digital conversion by analog to digital converter, the output of analog to digital converter is electrically connected by interface circuit with processor, and processor converts serial bit to byte and deposits in storer.
Described signal generating circuit produces reference signal, the output of reference signal analog detector, and the output of signal generating circuit 3 is connected with the INB+ of pre-amplification circuit and INB-end differential electrical.
The output OUTR+ of described pre-amplification circuit, the input end that OUTR-difference enters analog to digital converter, carry out analog to digital conversion by analog to digital converter, and the output of analog to digital converter is electrically connected by interface circuit with processor, and processor converts serial bit to byte; The INA+ of pre-amplification circuit and INA-end and INB+ and INB-are controlled and are selected by MUX0, MUX1 end, and MUX0, MUX1 are electrically connected with the I/O port of processor by computer bus, are controlled by processor; The output signal of above-mentioned pre-amplification circuit, through level adjusting circuit, is adjusted to by signal center's level the centered level that AD needs, and is connected to corresponding A D converter input end; The input and output analog signals line of above-mentioned pre-amplification circuit in circuit board by clamping in PCB levels ground wire.
Described analog to digital converter is 24 analog to digital converters, the Input1 to Input8 of 24 analog to digital converters is connected to the output terminal of pre-amplification circuit, its data output DOUT is connected to the SPI serial port of processor, the mode that processor interrupts with SPI receives the data after AD conversion, and data are deposited in circuit based on dual port FIFO storer.
Described memory circuit adopts 3 large capacity IDT72V2111 as data buffer storage, IDT72V2111 is temporary as the data of A/D conversion, received the translation data of AD converter by SPI interface by slave computer MCU, write successively in FIFO, after collection completes, gather completion status by MCU to host computer report, read data in FIFO by host computer by FIFO another port.
The High Performance SCM C8051F130 that described Cygnal company of the processor adopting U.S. releases is that the low port (P0, P1, P2, P3) of C8051F is electrically connected control signal; High port (P4, P5, P6, P7) is electrically connected with data, the address bus of the module such as display module, storer.
Described power circuit has adopted three grades of voltage stabilizings, battery 11 is carried out to first order voltage stabilizing through power panel voltage-stabilizing device, export respectively analog power and digital power, analog power and digital power export data acquisition board to, carry out second level voltage stabilizing by the power supply stabipack of data acquisition board again, second level voltage stabilizing produces required multilevel voltage, wherein one group is that analog to digital converter is exported a railway digital voltage, and digital voltage is the reference voltage mu balanced circuit to analog to digital converter composition through third level voltage stabilizing again.
Advantage of the present invention can clearly demonstrate by table 2:
Brief description of the drawings
Below in conjunction with embodiment accompanying drawing, the invention will be further described:
Fig. 1 is embodiment of the present invention circuit block diagram;
Fig. 2 is data acquisition board 16 embodiment circuit block diagrams in Fig. 1;
Fig. 3 is the pin definitions figure of overlay switch circuit 2ADG734 of the present invention;
Fig. 4 is pre-amplification circuit schematic diagram of the present invention;
Fig. 5 is analog-digital converter circuit pin distribution plan;
Fig. 6 is storage circuit pin distribution plan of the present invention;
Fig. 7 is embodiment of the present invention power circuit embodiment circuit block diagram.
In figure, 1, wave detector; 2, overlay switch circuit; 3, signal generating circuit; 4, pci interface plate; 5, PC104+ built-in industrial control machine; 6, pre-amplification circuit; 7, analog to digital converter; 8, storer; 9, processor; 10, computer bus; 11, battery; 12, power circuit; 13, signal wire; 14, PCB levels ground wire; 15, signal input port; 16, data acquisition board.
Embodiment
As shown in Figure 1, a kind of high-resolution petroleum seismic prospecting system, it comprises: which comprises at least: overlay switch circuit 2, pci interface plate 4, PC104+ built-in industrial control machine 5, signal generating circuit 3, data acquisition board 16, computer bus 10 and power circuit, data acquisition board 16 has 6, data acquisition board 16 is electrically connected with PC104+ built-in industrial control machine 5 by pci interface plate, by pci interface and PC104+ built-in industrial control machine 5 communication loops, carry out data by PC104+ built-in industrial control machine, control signal, the distribution of address signal, the signal input port 15 of data acquisition board 16 is electrically connected with the output terminal of overlay switch circuit, wherein be electrically connected with the signal end of signal generating circuit 3 a data acquisition board 16, for detection of, the duty of correction data acquisition plate 16, precision, overlay switch circuit 2 and pre-amplification circuit 6 are controlled by processor 9 by computer bus 10 respectively, the address end of overlay switch circuit 2 is chosen address by processor 9 according to the order of PC104+ built-in industrial control machine 5, and the seismoreceiver of selection is connected to corresponding pre-amplification circuit, wave detector 1 converts vibration signal to analog electrical signal, be connected to overlay switch circuit 2 by large line, overlay switch circuit 2 passes through the effective passage of processor 9 gating according to host computer (PC104+ built-in industrial control machine 5) capture setting, the corresponding position conducting of overlay switch circuit 2, make the signal connection of wave detector 1 be delivered to data acquisition board 16, by data acquisition board 16 amplifications, analog to digital conversion, data-storing, carry out data demonstration by PC104+ built-in industrial control machine 5.
As shown in Figure 2, provide the block diagram of data acquisition board 16, data acquisition board 16 comprises: pre-amplification circuit 6, analog to digital converter 7, storer 8, processor 9 and average address assignment are given the overlay switch circuit of each blocks of data collection plate 16, the overlay switch circuit of distributing to each blocks of data collection plate 16 is made up of 8 ADG734, one blocks of data collection plate 16 can difference access 32 wave detectors 1, two passage conductings of ADG734 make wave detector 1 difference be linked into a pre-amplification circuit 6, one blocks of data collection plate 16 has 16 pre-amplification circuits 6, the output of pre-amplification circuit is electrically connected with the input of analog to digital converter 7, one blocks of data collection plate 16 has 2 analog to digital converters 7, every analog to digital converter 7 can connect 8 tunnel simulating signal inputs simultaneously, accessible 16 tunnel simulating signal inputs altogether, analog to digital converter 7 is 24 analog to digital converters.All control signal ends of analog to digital converter 7 are electrically connected with the I/O interface of processor 9 by computer bus 10, control analog to digital converter 7 gain and passage by processor 9.The converting digital output of analog to digital converter 7 is connected by serial port power with processor 9, by processor 9, data is processed, and finally by processor 9, byte data after treatment is stored in storer 8; Processor 9 and storer 8 are electrically connected by computer bus 10.
Each road analog signals line 13 in data acquisition board 16 is clamped in PCB levels ground wire 14 in circuit board, and circuit board adopts Multilayer Structure.
Power acquisition powered battery in data acquisition board 16, battery is received pre-amplification circuit 6, analog to digital converter 7 power ends in data acquisition board 16 through three stage power source voltage stabilizing and management.
As shown in Figure 3, overlay switch circuit 2 adopts the ADG734 of ANALOG DEVICE company of the U.S. to form switch arrays, ADG734 is a low voltage CMOS device, built-in four optional single-pole double-throw (SPDT)s of independence (SPDT) switch, A1 in ADG734, A2, B1, B2, C1, C2, D1, D2 is signal input part, A, B, C, D is signal output part, A1 and A2 corresponding A, the corresponding B of B1 and B2, , the corresponding C of C1 and C2, the corresponding D of D1 and D2, ADG734 is enabled by CE, when CE is 1 level, A1, B1, C1 and D1 conducting, when CE is 0 level, A2, B2, C2 and D2 conducting.
Overlay switch circuit 2 can be with reference to Fig. 2 and Fig. 3, in the present invention, overlay switch circuit 2 completes the access to selected wave detector 1, overlay switch circuit 2 can be selected 48-96 wave detector 1, as number 1 the large line plug of wave detector 1 and be connected to the 1st electronic switch A1, B1 end, the large line plug of wave detector of numbering 2 is connected to the 1st electronic switch C1, D1 end, in the time that the control end (CE) of the 1st electronic switch is 1, the large line plug of wave detector of the large line plug of wave detector of numbering 1 and numbering 2 is two pre-amplification circuits to rear end by the 1st electronic switch directly.As number 3 the large line plug of wave detector and be connected to the 1st electronic switch A2, B2 end, the large line plug of wave detector of numbering 4 is connected to the 1st electronic switch C2, D2 end, in the time that the control end of the 1st electronic switch is 0, the large line plug of wave detector of the large line plug of wave detector of numbering 3 and numbering 4 is two pre-amplification circuits to rear end by the 1st electronic switch directly, the wave detector of these two pre-amplification circuits and numbering 1 and numbering 2 shares two pre-amplification circuits, its differentiation is the signal of by processor 9, the coding of control end CE being determined the wave detector that is what numbering 4.Accessible 4 wave detectors of ADG734, No. 48 wave detectors need 12 ADG734 composition arrays, and its address is DA0 to DA11, and 12 I/O mouths that provided by processor 9 are controlled.In the time that address DA0 to DA11 is 0, there are 24 wave detectors to be switched on simultaneously, in the time that address DA0 to DA11 is 1, rear 24 wave detectors are switched on.
ADG734 employing+1.8V is applicable to battery powered portable apparatus application very much to+5.5V single supply work.All passages all adopt break-before-make formula switch, and instantaneous short-circuit occurs while preventing switch passage.Electronic switch has ultralow conducting resistance, is less than 0.4 Ω in whole temperature range, makes it be applicable to very much requiring the application of minimum switch distortion.
As shown in Figure 4, provide pre-amplification circuit 6 circuit theory diagrams, the CS3301 prime amplifier that pre-amplification circuit 6 adopts Cirrus Logic company of the U.S. to produce,
After the wave detector 1 that overlay switch circuit 2 is selected is connected, wave detector 1 output signal positive and negative terminal will be connected to INA+ and the INA-end of corresponding pre-amplification circuit 6, GAIN0, GAIN1, GAIN2 select for preamplification gain, can select to arrange 0,6,12,18,24,30, the preamplification gain of 36dB.PWND, LPWP are that mode of operation is selected, and can be arranged to park mode, low-speed mode, during non-collection, reduce system power dissipation.GAIN0, GAIN1, GAIN2, PWND, LPWP are electrically connected with the I/O port of processor 9 by computer bus 10, and according to PC104+ built-in industrial control machine 5 (host computer), instruction is controlled; The output terminal OUTF+ of pre-amplification circuit 6, the input end that OUTF-difference enters analog to digital converter 7, carry out analog to digital conversion by analog to digital converter 7, the output of analog to digital converter 7 is electrically connected by interface circuit with processor 9, and processor 9 converts serial bit to byte and deposits in storer 8.
In the present invention, signal generating circuit 3 produces required reference signal, reference signal can analog detector 1 output, the output of signal generating circuit 3 is connected with INB+ and the INB-end differential electrical of pre-amplification circuit 6, output OUTR+, the OUTR-of pre-amplification circuit 6 also difference enters the input end of analog to digital converter 7, carry out analog to digital conversion by analog to digital converter 7, the output of analog to digital converter 7 is electrically connected by interface circuit with processor 9, and processor 9 converts serial bit to byte.
The INA+ of pre-amplification circuit 6 and INA-end and INB+ and INB-are controlled and are selected by MUX0, MUX1 end, and MUX0, MUX1 are electrically connected with the I/O port of processor 9 by computer bus 10, are controlled by processor 9.
Because signal generating circuit 3 produces the output that required reference signal number can analog detector 1, signal is consistent with wave detector 1 dynamic range from low to high, all passes through identical circuit, and the problem like this system being existed can conveniently be understood.
The output signal of pre-amplification circuit 6, through level adjusting circuit, is adjusted to by signal center's level the centered level that AD needs, and is connected to corresponding A D converter input end.The input and output analog signals line 13 of pre-amplification circuit 6 is by clamping in PCB levels ground wire 14 in circuit board, and circuit board adopts Multilayer Structure, makes signal reach shielding, not disturbed by outer signals.
As shown in Figure 5, analog to digital converter 7 is 24 analog to digital converters, and analog to digital converter 7 can be realized 8 Channel Synchronous samplings.Analog to digital converter 7 has good AC and DC characteristic, and sampling rate is the highest can reach 128Ks/s, and signal to noise ratio (S/N ratio) when 62kHz bandwidth (SNR) can reach 111dB, and offset drift is 0.8 μ V/ DEG C.
The Input1 to Input8 of analog to digital converter 7 is connected to the output terminal of pre-amplification circuit, its data output DOUT is connected to the SPI serial port of processor, the mode that processor interrupts with SPI receives the data after AD conversion, and data are deposited in circuit based on dual port FIFO storer.ADS1278 can select mode of operation by corresponding I/O pin is set, and is held sample frequency is set by CLK, and processor sends enabling signal and within first CLK clock period, enter acquisition state to SYNC port.
The data output interface of analog to digital converter 7 is based on SPI and two kinds of agreements of Frame mono-Sync, by controlling FORMAT[2:0] pin carrys out configuration data output mode.This system is by SPI port and the A/D converter data transmission of MCU.By by FORMAT[2:0] 3 pins set low, and data-interface is configured to the TDM pattern of SPI agreement.Analog to digital converter 7 transfers data to MCU by SPI serial ports and carries out data processing.
Shown in the Fig. 6 of institute, fifo memory circuit is an important step in data acquisition, and the present invention adopts 3 large capacity IDT72V2111 as data buffer storage, because Dui48 road wave detector gathers, the data that gather are stored, and therefore need logarithm now quick storage and transmission factually.
IDT72V2111 chip is the storage buffer chip of a dual-port, it is simple in structure, convenient operation, and there is control end, flag terminal, expansion end and internal RAM array, inner reading and writing pointer can carry out automatically writing and reading of data on the basis of first in first out.The data that read by SPI serial port when processor are processed into after byte data, at the data-in port that deposits IDT72V2111 chip by FPDP (D0～D8) in, while depositing in, control writing of data by the control end W of IDT72V2111.In order to prevent that writing of data from overflowing, available flag end full FF, half-full HF indicate the situation that writes of data.Write the fashionable position that arranges it to write by inner write pointer.Due to the particular design of internal RAM array, the data that first deposit in will first be read.If need data to read, can be controlled by control end R the situation of reading of data outward.W, R provide pulse by outside industrial computer or MCU.Data-out port Q0～Q8 is tri-state, is high-impedance state when without read signal." empty EF " mark is used for preventing that the sky of data from reading; If internal data again need be read and can be realized with control end RT.Input data bit D0～D8 and outputs data bits Q0～Q8 provide 9 bit input and output positions, can be wherein one as control or User Defined.Expansion end XI, XO, FT are used for carrying out the expansion of the dark and word length of word, so that being used in combination of multiple chips.RS is reset terminal.It should be noted that: owing to being asynchronous input and output, therefore W, R can not be effectively simultaneously.
IDT72V2111 is to require data to transmit when very fast the most applicable, therefore, in the design, choose IDT72V2111 temporary as the data of A/D conversion, received the translation data of AD converter by SPI interface by slave computer MCU, write successively in FIFO, after collection completes, gather completion status by MCU to host computer report, read data in FIFO by host computer by FIFO another port.
The High Performance SCM C8051F130 that processor 9 adopts Cygnal company of the U.S. to release is, single-chip microcomputer is in the situation that keeping CISC structure and order set constant, can carry out line production to instruction operation, average each clock period can be carried out 1 one-cycle instruction, thereby greatly improve instruction operation speed, chip internal the is integrated FLASH program storage of 64KB, comparator module, SPI and I2C interface etc.In sheet JTAG debug circuit allow to use the product MCU being arranged in final application system carry out non-intrusion type, at full speed, in system debug.The successive approximation register type ADC of inner 12-Bit resolution, integrated track and hold circuit in ADC, speed is high, and slewing rate can reach 100ksps, meets measuring accuracy and speed needs completely.
First C8051F has realized simulation in sheet to power (voltage range 2.7-3.6V) with the 3V of digital circuit, greatly reduces system power dissipation; Perfect clock system can ensure that system, meeting under response speed requirement, makes the average clock frequency of system minimum; Numerous reset source makes system under power-down mode, can arbitrarily wake up, thereby can realize neatly zero-power system.Therefore, C8051F has splendid minimum power consumption system design environment.
The low port of C8051F in the present invention (P0, P1, P2, P3) both can be by bit addressing, also can byte addressing, so the required control signal of system all designs in low port part; And high port (P4, P5, P6, P7) can only byte addressing, C8051F all design in high port part with the data module such as display module, storer, address bus; The port resource that C8051F130 is abundant and the dirigibility of distribution thereof are by being used priority crossbar decoder to realize; And all pins all adopt 3.3V voltage. and can be configured to open-drain or recommend the way of output and weak pull-up.
As shown in Figure 7,24 high-speed A/D converters of TI company, stability, the accuracy of the reference voltage (reference voltage) of AD are extremely important to hyperchannel AD acquisition system.Power circuit 12 has adopted three grades of voltage stabilizing measures, the 12V voltage that battery 11 (storage battery) is provided, first carry out first order voltage stabilizing through power panel voltage-stabilizing device, voltage-stabilizing device adopts U.S. VICOR power module, export respectively analog power (for mimic channel) and digital power (for digital circuit), analog power (for mimic channel) and digital power export data acquisition board 16 to, carry out second level voltage stabilizing by the power supply stabipack of data acquisition board 16 again, voltage-stabilizing device produces respectively required voltage, wherein one group is that analog to digital converter 7 is exported a railway digital voltage, the reference voltage mu balanced circuit that digital voltage forms to analog to digital converter 7 through third level voltage stabilizing again.Third level voltage-stabilizing device adopts the REF5025 of TI company and the reference voltage mu balanced circuit of OPA350 composition.AD reference voltage and analog power, other digital power isolation, reduce voltage disturbance.
Claims (7)
1. a high-resolution petroleum seismic prospecting system, it is characterized in that: it comprises: pci interface plate (4), host computer, signal generating circuit (3), data acquisition board (16), computer bus (10) and power circuit, data acquisition board (16) has 6, data acquisition board (16) is electrically connected with host computer by pci interface plate, by pci interface and host computer communication loop, carry out data by host computer, control signal, the distribution of address signal, the signal input port (15) of data acquisition board (16) is electrically connected with the output terminal of overlay switch circuit, wherein be electrically connected with the signal end of signal generating circuit (3) in a data acquisition board (16), for detection of, the duty of correction data acquisition plate (16), precision, described data acquisition board (16) comprising: pre-amplification circuit (6), analog to digital converter (7), storer (8), processor (9) and average address assignment are given the overlay switch circuit of each blocks of data collection plate (16), the overlay switch circuit of distributing to each blocks of data collection plate (16) is made up of 8 ADG734, one blocks of data collection plate (16) can difference access 32 wave detectors (1), two passage conductings of ADG734 make a wave detector (1) difference be linked into a pre-amplification circuit (6), one blocks of data collection plate (16) has 16 pre-amplification circuits (6), the output of pre-amplification circuit is electrically connected with the input of analog to digital converter (7), one blocks of data collection plate (16) has 2 analog to digital converters (7), every analog to digital converter (7) can connect 8 tunnel simulating signal inputs simultaneously, can access altogether 16 tunnel simulating signal inputs, analog to digital converter (7) is 24 analog to digital converters, all control signal ends of analog to digital converter (7) are electrically connected with the I/O interface of processor (9) by computer bus (10), control analog to digital converter (7) gain and passage by processor (9), the converting digital output of analog to digital converter (7) is connected by serial port power with processor (9), by processor (9), data is processed, and finally by processor (9), byte data after treatment is stored in storer (8), processor (9) and storer (8) are by computer bus (10) electrical connection, overlay switch circuit (2) and pre-amplification circuit (6) are controlled by processor (9) by computer bus (10) respectively, the address end of overlay switch circuit (2) is chosen address by processor (9) according to the order of host computer, and the wave detector of selection is connected to corresponding pre-amplification circuit, wave detector (1) converts vibration signal to analog electrical signal, be connected to overlay switch circuit (2) by large line, overlay switch circuit (2) passes through the effective passage of processor (9) gating according to host computer capture setting, the corresponding position conducting of overlay switch circuit (2), make the signal connection of wave detector (1) be delivered to data acquisition board (16), by data acquisition board (6) amplification, analog to digital conversion, data-storing, carry out data demonstration by host computer, the CS3301 prime amplifier that described pre-amplification circuit (6) adopts Cirrus Logic company of the U.S. to produce, described overlay switch circuit (2) is that ADG734 forms switch arrays, overlay switch circuit (2) can be selected 48-96 wave detector (1), after the wave detector (1) that overlay switch circuit (2) is selected is connected, wave detector (1) output signal positive and negative terminal will be connected to INA+ and the INA-end of corresponding pre-amplification circuit (6), GAIN0, GAIN1, GAIN2 select for preamplification gain, can select to arrange 0,6,12,18,24,30, the preamplification gain of 36dB, PWND, LPWP are that mode of operation is selected, and can be arranged to park mode, low-speed mode, during non-collection, reduce system power dissipation, GAIN0, GAIN1, GAIN2, PWND, LPWP are electrically connected with the I/O port of processor (9) by computer bus (10), and according to host computer, instruction is controlled, the output terminal OUTF+ of pre-amplification circuit (6), the input end that OUTF-difference enters analog to digital converter (7), carry out analog to digital conversion by analog to digital converter (7), the output of analog to digital converter (7) is electrically connected by interface circuit with processor (9), and processor (9) converts serial bit to byte and deposits in storer (8).
2. a kind of high-resolution petroleum seismic prospecting system according to claim 1, it is characterized in that: each the road analog signals line (13) in described data acquisition board (16) is clamped in PCB levels ground wire (14) in circuit board, circuit board adopts Multilayer Structure.
3. a kind of high-resolution petroleum seismic prospecting system according to claim 1, it is characterized in that: described signal generating circuit (3) produces reference signal, the output of reference signal analog detector (1), the output of signal generating circuit (3) is connected with INB+ and the INB-end differential electrical of pre-amplification circuit (6).
4. a kind of high-resolution petroleum seismic prospecting system according to claim 1, it is characterized in that: the output OUTR+ of described pre-amplification circuit (6), the input end that OUTR-difference enters analog to digital converter (7), carry out analog to digital conversion by analog to digital converter (7), the output of analog to digital converter (7) is electrically connected by interface circuit with processor (9), and processor (9) converts serial bit to byte; The INA+ of pre-amplification circuit (6) and INA-end and INB+ and INB-are controlled and are selected by MUX0, MUX1 end, and MUX0, MUX1 are electrically connected with the I/O port of processor (9) by computer bus (10), are controlled by processor (9); The output signal of pre-amplification circuit (6), through level adjusting circuit, is adjusted to by signal center's level the centered level that analog to digital converter needs, and is connected to corresponding analog to digital converter input end; The input and output analog signals line (13) of pre-amplification circuit (6) clamps by PCB levels ground wire (14) is middle in circuit board.
5. a kind of high-resolution petroleum seismic prospecting system according to claim 4, it is characterized in that: what described analog to digital converter (7) adopted is 24 high-speed A/D converters of TI company, it is 24 analog to digital converters of 8 passage, the Input1 to Input8 of 24 analog to digital converters of 8 passages is connected to the output terminal of pre-amplification circuit, its data output DOUT is connected to the SPI serial port of processor, the mode that processor interrupts with SPI receives the data after AD conversion, and data are deposited in storer; 8 24, passage analog to digital converters are held sample frequency are set by CLK, and processor sends enabling signal and within first CLK clock period, enter acquisition state to SYNC port.
6. a kind of high-resolution petroleum seismic prospecting system according to claim 1, it is characterized in that: described storer (8) is circuit based on dual port FIFO storer, adopt 3 large capacity IDT72V2111 as data buffer storage, IDT72V2111 is temporary as the data of A/D conversion, received the translation data of AD converter by SPI interface by slave computer MCU, write successively in FIFO, after collection completes, gather completion status by MCU to host computer report, read data in FIFO by host computer by FIFO another port.
7. a kind of high-resolution petroleum seismic prospecting system according to claim 1, it is characterized in that: the High Performance SCM C8051F130 that described Cygnal company of the processor adopting U.S. releases, low port P0, P1, P2, the P3 of C8051F130 are electrically connected control signal; High port P4, P5, P6, P7 are electrically connected with data, the address bus of display module, storer.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2482101Y (en) * | 2001-06-29 | 2002-03-13 | 西安石油勘探仪器总厂 | Central control unit of 24-position remote sensing seismograph |
| CN1801021A (en) * | 2005-11-07 | 2006-07-12 | 广西柳工机械股份有限公司 | Electric device centralized control system with data bus for engineering machinery |
| CN201965240U (en) * | 2010-12-20 | 2011-09-07 | 西安华朗物探科技有限公司 | High-resolution petroleum seismic exploration device |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2482101Y (en) * | 2001-06-29 | 2002-03-13 | 西安石油勘探仪器总厂 | Central control unit of 24-position remote sensing seismograph |
| CN1801021A (en) * | 2005-11-07 | 2006-07-12 | 广西柳工机械股份有限公司 | Electric device centralized control system with data bus for engineering machinery |
| CN201965240U (en) * | 2010-12-20 | 2011-09-07 | 西安华朗物探科技有限公司 | High-resolution petroleum seismic exploration device |
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