CN102520020A - Correction method for interference generated from parasitic effects on conductivity method represented Ge substrate interface state - Google Patents
Correction method for interference generated from parasitic effects on conductivity method represented Ge substrate interface state Download PDFInfo
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- CN102520020A CN102520020A CN2011104112233A CN201110411223A CN102520020A CN 102520020 A CN102520020 A CN 102520020A CN 2011104112233 A CN2011104112233 A CN 2011104112233A CN 201110411223 A CN201110411223 A CN 201110411223A CN 102520020 A CN102520020 A CN 102520020A
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Abstract
Belonging to the field of microelectronic technologies, the invention specifically relates to a correction method for interference generated from parasitic effects on a conductivity method represented Ge substrate interface state. While fixing bias voltage and scanning frequency, the method of the invention extracts the corresponding parasitic resistance and capacitance under different frequencies and corrects the test results. The specific steps comprise: offsetting an MOSCAP (metal-oxide-semiconductor-capacitor) in a strong accumulation area for frequency scanning testing so as to obtain parasitic resistance and capacitance parameters under a series of frequencies; then offseting the MOSCAP in a depletion area, and conducting testing with frequency scanning settings consistent with those of the last step; using the parasitic parameters obtained under different frequencies by the former to correct the test data obtained under corresponding frequencies by the latter; and finally calculating a conductivity method represented result on the interface state. The method of the invention carries out actual verification on the TiN/HfO2/GeON/p-Ge capacitance structure.
Description
Technical field
The invention belongs to microelectronics technology, the modification method of the interference that is produced when being specifically related to a kind of dead resistance and electric capacity to conductance method sign Ge substrate interface attitude.
Background technology
Conductance method is the higher means of a kind of sensitivity that characterize MOSCAP (Metal-oxide-semicondutor-electric capacity) structured substrate interface state information.Its ultimate principle is: by one fixedly grid voltage be biased in the MOSCAP of depletion region, its equivalent electrical circuit is as shown in Figure 1, under the effect of AC signal, the charge carrier in the substrate can with AC signal to Fermi level (
E f ) near interface state discharge and recharge caused thus energy loss
G p Size with
E f The interface state density at place is relevant, thus can by
G p Characterize the information of interface state density; Interface state level of energy of living in being with can be confirmed by the Berglund method.To MOSCAP structure, can correctly characterize its substrate interface attitude information with conductance method under the room temperature based on silicon (Si) substrate; To the MOSCAP structure based on the Ge substrate, because the influence of substrate minority carrier, conductance method can be bigger than normal than actual value to the characterization result of interface state density under the room temperature.
On the Agilent4294A instrument, can adopt the electric capacity shunt conductance (
C p -G) model measurement MOSCAP, equivalent electrical circuit is as shown in Figure 2.During actual measurement, because the ghost effect between sample and the probe station, like the series connection dead resistance on the line
R s , sample substrate contact with probe station parasitic stray capacitance
C T And resistance
R T , as shown in Figure 3, these ghost effects cause recording
C m With
G m The information C that can not correctly reflect sample itself
cAnd G
c, and then the characterization result of interference conductance method.
When fixed frequency, scanning voltage test, the present invention considers ghost effect
R s ,
C T With
R T Influence, to what measure
C m With
G m The method of revising is following.According to equivalent relation, Fig. 3 can equivalence be Fig. 4.When MOSCAP was biased in strong accumulation area, test circuit was as shown in Figure 5, and the inversion capacitance of substrate is very big, can think to the AC signal short circuit, and the equivalent electrical circuit of this moment is as shown in Figure 6.Because of frequency when low ghost effect less to the interference that test result causes, gate medium electric capacity
C Ox Can confirm in the value of strong accumulation area according to low frequency capacitance voltage (C-V) curve, and then can obtain the parasitic parameter under this fixed frequency
R ' s ,
C E , further can calculate C
cAnd G
c
Summary of the invention
The objective of the invention is to propose the modification method of a kind of convenient, ghost effect efficiently to the interference that conductance method characterized Ge substrate interface attitude and produced.
The ghost effect that the present invention proposes characterizes the modification method of the interference that Ge substrate interface attitude produced to conductance method; Be that the method for revising test result with dead resistance of extracting and electric capacity during fixed frequency, scan bias voltage is applied in the conductance method, promptly propose a kind of method that when fixed voltage, sweep frequency, obtains the parasitic parameter under each frequency and measurement data is revised.The concrete steps of this method are following:
(1) is biased in strong accumulation area to MOSCAP and carries out the frequency sweeping test, obtain dead resistance and capacitance parameter under a series of frequencies;
(2) be biased in depletion region to MOSCAP, test with frequency sweeping setting consistent in the same step (1);
(3) with the test data under the respective frequencies in the parasitic parameter correction step (2) under each frequency that obtains in the step (1);
(4) with revised data computation conductance method in the step (3) to the characterization result of interface state.
Among the present invention, the substrate of MOSCAP structure is the Ge substrate, but is not limited to the doping content and the doping type of Ge substrate.
Among the present invention, the grid of MOSCAP structure is a metal material, like Al, TiN, but is not limited to this two kinds of metal materials.
Among the present invention, the electric leakage of the grid current density of MOSCAP structure is at V
FbShould be lower than 1 * 10 during ± 1V
-7A/cm
2
Among the present invention, the ghost effect of correction is: the parasitic series resistance of line between MOSCAP sample and the surveying instrument, the dead resistance and the electric capacity that produce when the MOSCAP sample contacts with probe station base or needle point.
Among the present invention, be biased in strong accumulation area to MOSCAP respectively and depletion region carries out frequency sweeping, the wherein parameter setting of frequency sweeping comprises sweep limit, number of scan points, coordinate mode, and is all consistent.
Advantage of the present invention is following:
The present invention is applied in the conductance method with the method that dead resistance of extracting and electric capacity are revised test result during fixed frequency, scan bias voltage, can disposablely obtain the parasitic parameter value under a series of frequencies and the measurement data under the depletion region respective frequencies revised.
Description of drawings
The equivalent electrical circuit of sample itself, wherein C when Fig. 1 is biased in depletion region for MOSCAP
OxBe gate oxide electric capacity, C
pAnd G
pThe shunt capacitance and the electricity that are respectively on the substrate are led.
Fig. 2 is for adopting
C p -GEquivalent electrical circuit during model measurement MOSCAP, wherein C
mAnd G
mBeing respectively the shunt capacitance and the electricity that can directly record leads.
Fig. 3 is for adopting
C p -GModel measurement MOSCAP also considers the equivalent electrical circuit when series connection dead resistance, sample on the line contacts stray capacitance and the resistance of generation with probe station, wherein R simultaneously
sBe the parasitic series resistance on the line, C
TAnd R
TBe respectively the parasitic shunt capacitance and the resistance that produce when sample contacts with probe station, C
cAnd G
cFor shunt capacitance and the electricity of considering reflection sample self-information after the ghost effect are led.
Fig. 4 is the equivalent electrical circuit of Fig. 3, C
c, G
cImplication and Fig. 3 in identical, C
EWith
R ' s Parasitic series capacitance and resistance for equivalence.
Fig. 5 is for adopting
C p -GThe equivalent electrical circuit of model when strong accumulation area is measured MOSCAP, wherein C
MaAnd G
MaBeing respectively the shunt capacitance and the electricity that can directly record leads.
Fig. 6 is the equivalent electrical circuit of MOSCAP at strong accumulation area and when considering ghost effect, wherein C
OxBe gate oxide electric capacity,
C E With
R ' s Implication and Fig. 4 in identical.
Fig. 7 be with 0.27V be fixedly grid voltage, with the logarithm mode during from 100 points of 500Hz to 1MHz scanning,
is at the comparison diagram of considering before and after the ghost effect correction.
Fig. 8 be with 0.53V be fixedly grid voltage, with the logarithm mode during from 100 points of 500Hz to 1MHz scanning,
is at the comparison diagram of considering before and after the ghost effect correction.
Embodiment
Through the concrete steps of sample making, test and data processing the present invention is described below, with through 350
oC/10min N
2The TiN/HfO of atmosphere annealing
2/ GeON/p-Ge structure MOSCAP is that example is explained.
1, be that p type Ge (100) sheet of 0.05 ~ 0.1 Ω cm is a substrate with resistivity, using concentration successively is 0.5% hydrofluorite (HF) solution and deionized water rinsing.In atomic layer deposition (ALD) chamber with ammonia (NH
3) surface of plasma treatment Ge sheet, NH
3Pressure be 5 * 10
-3Mbar, temperature is 250
oC, radio-frequency power are 200W, and the processing time is 30s.Then 250
oUnder the condition of C, with Tetrakis (ethylmethylamido) hafnium (IV) and O
2Plasma is the source, in-situ depositing HfO
2Gate dielectric layer.Pass through mask plate at HfO with physical vapor deposition (PVD) method
2On make the circular gate electrode of TiN, the grid diameter is about 340 μ m.Ti (20nm)/Pt (40nm) double-level-metal made from PVD is a back electrode.At last at N
2Under the atmosphere, sample is carried out 350
oThe annealing in process of C/10min.
2, the grid leakage current of specimen on the AgilentB1500A instrument, scanning voltage scope are-2V to 2V that step-length is 0.05V.The electric leakage of the grid current density of sample is at V
FbDuring ± 1V, be lower than 1 * 10
-7A/cm
2
3, on the Agilent4294A instrument, adopt
C p -GModel is tested sample with the fixing mode of grid voltage, sweep frequency.At first the grid voltage with-2V is biased in strong accumulation area to sample, adopts the logarithm mode from 500Hz to 1MHz scanning samples, and number of scan points is 100, obtains data C corresponding under each frequency
MaAnd G
MaBe biased in depletion region to sample with 0.27V and 0.53V voltage respectively then, be provided with sample test, obtain sample corresponding data C under each frequency of depletion region with frequency sweeping likewise
mAnd G
m
4, according to C
MaMeasured value about 1KHz obtains the gate dielectric layer capacitor C of sample
Ox
5, the equivalent electrical circuit when strong accumulation area per sample, as shown in Figure 6, the C that obtains in the integrating step 4
OxValue obtains parasitic parameter C under each frequency
EAnd R '
sValue:
6, per sample at the equivalent electrical circuit of depletion region, as shown in Figure 4, the parasitic parameter C that calculates in the integrating step 5
EAnd R '
sValue, obtain revised shunt capacitance Cc and electricity and lead Gc:
。
7, revising front and back
expression formula under each frequency is:
Before revising
Revise back
8, make the curve of considering ghost effect correction front and back respectively
, wherein
wBe the angular frequency of AC signal,
qBe the quantity of electric charge of electronics,
ABe the area of MOSCAP grid,
G p For being in the substrate shunt conductance of depletion region MOSCAP,
fFrequency for AC signal.0.27V when fixedly grid voltage was tested with 0.53V, the curve before and after revising was respectively like Fig. 7 and shown in Figure 8.Can confirm the measured value of the example interface density of states before and after room temperature (300K) is revised down according to the maximum value of curve.
Claims (2)
1. dead resistance and electric capacity characterize the modification method of the interference that Ge substrate interface attitude produced to conductance method, it is characterized in that concrete steps are following:
(1) is biased in strong accumulation area to MOSCAP and carries out the frequency sweeping test, obtain dead resistance and capacitance parameter under a series of frequencies;
(2) be biased in depletion region to MOSCAP, test with frequency sweeping setting consistent in the same step (1);
(3) with the test data under the respective frequencies in the parasitic parameter correction step (2) under each frequency that obtains in the step (1);
(4) with revised data computation conductance method in the step (3) to the characterization result of interface state.
2. modification method as claimed in claim 1, the substrate that it is characterized in that MOSCAP is that resistivity is p type Ge (100) sheet of 0.05 ~ 0.1 Ω cm, the operation steps of correction is:
(1) grid leakage current of test MOS CAP sample on the AgilentB1500A instrument, scanning voltage scope be-2V to 2V, and step-length is 0.05V, and the electric leakage of the grid current density of sample is at V
FbDuring ± 1V, be lower than 1 * 10
-7A/cm
2
(2) on the Agilent4294A instrument, adopt
C p -GModel is tested sample with the fixing mode of grid voltage, sweep frequency; At first the grid voltage with-2V is biased in strong accumulation area to sample, adopts the logarithm mode from 500Hz to 1MHz scanning samples, and number of scan points is 100, obtains data C corresponding under each frequency
MaAnd G
MaBe biased in depletion region to sample with 0.27V and 0.53V voltage respectively then, be provided with sample test, obtain sample corresponding data C under each frequency of depletion region with frequency sweeping likewise
mAnd G
m
(3) according to C
MaObtain the gate dielectric layer capacitor C of sample at the measured value of 1KHz
Ox
(4) equivalent electrical circuit when strong accumulation area per sample, the C that obtains in the integrating step (3)
OxValue obtains parasitic parameter C under each frequency
EAnd R '
sValue:
(5) per sample at the equivalent electrical circuit of depletion region, the parasitic parameter C that calculates in the integrating step (4)
EAnd R '
sValue, obtain revised shunt capacitance Cc and electricity and lead Gc:
(6) revising front and back
expression formula under each frequency is:
Before revising
Revise back
;
(7) make curve before and after the ghost effect correction respectively
, wherein
wBe the angular frequency of AC signal,
qBe the quantity of electric charge of electronics,
ABe the area of MOSCAP grid,
G p For being in the substrate shunt conductance of depletion region MOSCAP,
fFrequency for AC signal; Can confirm the measured value of the example interface density of states before and after at room temperature revising according to the maximum value of curve.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016061893A1 (en) * | 2014-10-24 | 2016-04-28 | 深圳市华星光电技术有限公司 | Method and system for controlling mis structure design in tft |
| CN110349875A (en) * | 2018-04-03 | 2019-10-18 | 江苏微导纳米装备科技有限公司 | A method of measurement crystal column surface charge density variation |
| CN112955760A (en) * | 2020-04-02 | 2021-06-11 | 北京大学深圳研究生院 | Interface state analysis method and device of MIS-HEMT device |
| CN115877164A (en) * | 2023-03-03 | 2023-03-31 | 长鑫存储技术有限公司 | Method and device for testing surface density of movable ion charge, electronic device and medium |
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| US20040164761A1 (en) * | 2003-02-26 | 2004-08-26 | Yang Gi-Young | Method of measuring gate capacitance by correcting dissipation factor error |
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| US20040164761A1 (en) * | 2003-02-26 | 2004-08-26 | Yang Gi-Young | Method of measuring gate capacitance by correcting dissipation factor error |
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| K S K KWA ET AL.: "A model for capacitance reconstruction from measured lossy MOS capacitance-voltage characteristics", 《SEMICONDUCTOR SCIENCE AND TECHNOLOGY》, vol. 18, 24 December 2002 (2002-12-24) * |
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| 张新昌等: "CdTe-HgCdTe界面的电导机制", 《半导体学报》, vol. 19, no. 7, 31 July 1998 (1998-07-31) * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016061893A1 (en) * | 2014-10-24 | 2016-04-28 | 深圳市华星光电技术有限公司 | Method and system for controlling mis structure design in tft |
| GB2547134A (en) * | 2014-10-24 | 2017-08-09 | Shenzhen China Star Optoelect | Method and system for controlling mis structure design in TFT |
| US9857655B2 (en) | 2014-10-24 | 2018-01-02 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for controlling MIS structure design in TFT and system thereof |
| CN110349875A (en) * | 2018-04-03 | 2019-10-18 | 江苏微导纳米装备科技有限公司 | A method of measurement crystal column surface charge density variation |
| CN110349875B (en) * | 2018-04-03 | 2021-07-09 | 江苏微导纳米科技股份有限公司 | Method for measuring change of surface charge density of wafer |
| CN112955760A (en) * | 2020-04-02 | 2021-06-11 | 北京大学深圳研究生院 | Interface state analysis method and device of MIS-HEMT device |
| CN112955760B (en) * | 2020-04-02 | 2022-05-31 | 北京大学深圳研究生院 | Interface state analysis method and device of MIS-HEMT device |
| CN115877164A (en) * | 2023-03-03 | 2023-03-31 | 长鑫存储技术有限公司 | Method and device for testing surface density of movable ion charge, electronic device and medium |
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Application publication date: 20120627 |