CN102497240B - Sampling synchronous device and sampling synchronous method of digital broadcasting system - Google Patents

Sampling synchronous device and sampling synchronous method of digital broadcasting system Download PDF

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CN102497240B
CN102497240B CN201110428551.4A CN201110428551A CN102497240B CN 102497240 B CN102497240 B CN 102497240B CN 201110428551 A CN201110428551 A CN 201110428551A CN 102497240 B CN102497240 B CN 102497240B
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sampling
frame
offset
frame head
deviation
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CN102497240A (en
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刘斌彬
葛啟宏
王静
陶涛
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Beijing Taimei Shiji Science & Technology Co Ltd
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Beijing Taimei Shiji Science & Technology Co Ltd
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Abstract

The invention discloses a sampling synchronous method of a digital broadcasting system. The sampling synchronous method comprises the following steps of: carrying out sampling on received continuous signals to obtain a sampling sequence, and carrying out interpolation treatment on the sampling sequence according to a sampling control signal; obtaining a sampling frequency deviation according to frame head positional deviation of a signal frame in the sampling sequence after the interpolation treatment; obtaining a sampling phase deviation according to symmetry degree of a late gate signal and an early gate signal and a local frame head serial coorelation value in the sampling sequence after the interpolation treatment; and carrying out dynamic adjustment on the sampling control signal according to the sampling frequency deviation and the sampling phase deviation, and realizing the synchronization of sampling frequency and a sampling phase after the interpolation treatment. The method provided by the invention can be capable of accurately realizing the synchronization of the sampling frequency and the sampling phase.

Description

A kind of sample-synchronous device and sampling synchronization method of digit broadcasting system
Technical field
The present invention relates to digital communicating field, relate in particular to a kind of sample-synchronous device and sampling synchronization method that is applicable to digit broadcasting system.
Background technology
Digit broadcasting system except program capacity is large, antijamming capability strong, maximum feature has broadcast exactly, can realize a point-to-multipoint, a point-to-area broadcast, and the cost of broadcast message has nothing to do with number of users.Therefore, digit broadcasting system, as an important component part of ICT industry, has critical role in national information infrastructure construction and national information security strategy.
In the receiver of digit broadcasting system, need to sample to the continuous signal receiving.Yet the sampling clock of receiver and transmitter can not have identical frequency and phase place.For multicarrier system, sampling deviation can cause no longer quadrature of subcarrier on frequency domain, causes between serious subcarrier and crosstalks.For single-carrier system, need to make sampling location to be positioned at as much as possible eye pattern maximum, to obtain good signal interference ratio.
Summary of the invention
The sample-synchronous device and the sampling synchronization method that the object of this invention is to provide a kind of digit broadcasting system.
One aspect of the present invention provides a kind of sampling synchronization method of digit broadcasting system, comprising:
The continuous signal receiving is sampled, obtain sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing;
According to the frame head position deviation of signal frame in the sample sequence after described interpolation processing, obtain sampling frequency deviation;
Symmetry acquisition sampling phase deviation according to slow gate signal in the sample sequence after described interpolation processing with morning gate signal and local frame head Serial relation value;
According to described sampling frequency deviation and described sampling phase deviation, described sampling control signal is dynamically adjusted, thereby realized the synchronous of sample frequency and sampling phase by controlling described interpolation processing.
One aspect of the present invention provides a kind of sample-synchronous device of digit broadcasting system, comprising:
Sample interpolation processing unit, for the continuous signal receiving is sampled, obtains sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing;
Sampling frequency deviation generation unit, for obtaining sampling frequency deviation according to the frame head position deviation of the sample sequence signal frame after described interpolation processing;
Sampling phase deviation generation unit, for the symmetry acquisition sampling phase deviation with morning gate signal and local frame head Serial relation value according to the slow gate signal of the sample sequence after described interpolation processing;
Controlling of sampling unit, for according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal dynamically being adjusted, thereby realizes the synchronous of sample frequency and sampling phase by controlling described interpolation processing.
The sample-synchronous device of the digit broadcasting system that the embodiment of the present invention provides and sampling synchronization method, owing to according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal dynamically being adjusted, therefore can be realized the synchronous of sample frequency and sampling phase accurately.
Accompanying drawing explanation
Above-mentioned and/or the additional aspect of the present invention and advantage will become from the following description of the accompanying drawings of embodiments and obviously and easily understand, wherein:
Fig. 1 is the applicable signal frame structure schematic diagram of the embodiment of the present invention.
Fig. 2 is the schematic diagram of m sequence generator.
Fig. 3 is the flow chart of the sampling synchronization method of the digit broadcasting system that provides of the embodiment of the present invention.
Fig. 4 is the flow chart of controlling of sampling in a kind of implementation of the present embodiment.
Fig. 5 is sampling control signal-adjustment frequency curve in the present embodiment.
Fig. 6 is sampling phase deviation-adjustment frequency curve in the present embodiment.
Fig. 7 is the structural representation of the sample-synchronous device of the digit broadcasting system that provides of the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the sample-synchronous device of digit broadcasting system of the present invention and the preferred embodiment of sampling synchronization method are elaborated.
Each embodiment of the present invention is applicable to have the multiple digit broadcasting system of cyclical signal frame structure.As shown in Figure 1, Fig. 1 is the applicable signal frame structure schematic diagram of the embodiment of the present invention.Every frame consists of frame head and frame, and frame head can be m sequence, Walsh sequence, Gold sequence etc.
For example, in received terrestrial digital broadcasting system, the baseband signalling rate of system is 7.56MHz.The length of signal frame has 4200,4375 and 4,725 three kinds of patterns.Under these three kinds of patterns, every 225,216 and 200 signal frames form a superframe, and the length of frame head is 420,595 and 945, by binary pseudo-random sequence, through " 0 ", to+1, generates after-1 mapping with " 1 ".
Wherein, the pseudo random sequence that frame head length is 595 10 rank m sequence generators as shown in Figure 2 generate, and get length and be front 595 points of 1023 m sequence.Generator polynomial is x 10+ x 3+ 1, shift register initial value is 0000000001, when each signal frame starts, resets.The frame head generating mode of other length similarly, only be take in embodiments of the invention and 595 is described as representative.
Please refer to Fig. 3, Fig. 3 is the flow chart of the sampling synchronization method of the digit broadcasting system that provides of the embodiment of the present invention.The executive agent of the method can be the receiver of digit broadcasting system.The method comprises the steps:
Step S11, the continuous signal receiving is sampled, obtain sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing.
In a kind of implementation of the present embodiment, step S11 specifically can comprise:
Sampling step: utilize A/D converter to carry out over-sampling to the continuous signal receiving, obtain sample sequence s (i).
Filtering interpolation step: adopt the interpolation filter of Farrow structure, according to sampling control signal, sample sequence s (i) is carried out to interpolation processing, obtain the sample sequence r (i) after sampling frequency conversion.
Step S12, according to the frame head position deviation of signal frame in the sample sequence after described interpolation processing, obtain sampling frequency deviation.
In a kind of implementation of the present embodiment, step S12 specifically can comprise:
Frame synchronization step: based on time-frequency domain scanning related algorithm, catch the frame head position PN_posi of each signal frame in sample sequence r (i).
Sampling frequency offset calculation procedure: the frame head position of calculating each signal frame is with respect to the deviation delta_PN_posi of the frame head position of a upper signal frame.
Preferably, in order to obtain sampling frequency deviation more accurately, can for example, according to the frame head position deviation of the individual signal frame of a pair of N of formula (can get 216), sue for peace.
delta _ PN _ posi = Σ n = 0 N - 1 ( PN _ posi ( n ) - PN _ posi ( n - 1 ) ) Formula one
Sampling frequency deviation freq_offset can be obtained by the frame head position deviation delta_PN_posi after suing for peace according to formula two:
freq _ offset = delta _ PN _ posi N × len _ frame × oversample Formula two
Wherein, the frame head position that PN_posi (n) is n signal frame, the frame head position that PN_posi (n-1) is n-1 signal frame, the length that len_frame is signal frame, for example, equal 4375; Oversample is over-sampling rate, for example, equal 4.
Step S13, according to late gate signal and early the symmetry acquisition sampling phase deviation of gate signal and local frame head Serial relation value in the sample sequence after described interpolation processing.
In a kind of implementation of the present embodiment, step S13 specifically can comprise:
Frame head extraction step: according to the position of the signal frame structure of system and frame head, in sample sequence r (i), extract frame head sequence q (j), j=0,1,2 ..., oversample * len_PN-1.Wherein, the length that len_PN is frame head, for example, equal 595
Local frame head sequence generates step: according to the frame head form of system, generate local frame head sequence PN (k), and k=0,1,2 ..., len_PN-1.
Sooner or later door step: frame head sequence q (j) is postponed and down-sampling, obtains gate signal p morning of single-time sampling e(k) and slow gate signal p l(k):
p e(k)=q(oversample×k),k=0,1,2,L,len_PN-1
p l(k)=q(oversample×k+2),k=0,1,2,L,len_PN-1
By morning gate signal and late gate signal carry out relevantly to local frame head sequence respectively, for example according to formula three, be correlated with, obtain the first correlation S ewith the second correlation S l:
S e = Σ k = 0 len _ PN - 1 p e ( k ) × PN ( k ) Formula three
S l = Σ k = 0 len _ PN - 1 p l ( k ) × PN ( k )
Sampling phase deviation phase_offset can be by correlation S eand S lsymmetry obtain, for example can be according to four couples of S of formula eand S lask respectively the first norm:
a=|real(S e)|+|imag(S e)|
B=|real (S l) |+| imag (S l) | formula four
Wherein, function real () represents to get real part, and imag () represents to get imaginary part.
Sampling phase deviation phase_offset can be obtained according to formula five by a and b:
phase _ offset = a - b a + b Formula five
Preferably, in order to obtain sampling phase deviation more accurately, can for example, to the sampling phase deviation of a plurality of (can get 32) signal frame, be averaging.
Step S14, according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal is dynamically adjusted, thereby realized the synchronous of sample frequency and sampling phase by controlling described interpolation processing.
Please refer to Fig. 4, Fig. 4 is the flow chart of step S14 in a kind of implementation of the present embodiment, and this step comprises operating state a-e:(a) idle, (b) sample frequency is followed the tracks of, (c) sooner or later door wait for, the locking of (d) sample frequency, the adjustment of (e) sampling phase.
(a) free time: do not process any input under this state, also do not produce any output.Wait for after frame synchronization acquisition success, enter " sample frequency tracking ".
(b) sample frequency is followed the tracks of: under this state according to sampling frequency deviation freq_offset, by Kalman filtering, obtain comparatively stable sampling control signal ppm_ctrl, the sample frequency of promotion interpolation filter output is the sample frequency of close transmitter gradually, thereby makes freq_offset level off to gradually zero.
ppm_ctrl(m)=ppm_ctrl(m-1)+freq_offset×k Kalman
Wherein, ppm_ctrl (m-1) is last sampling control signal, k kalmanfor the coefficient of Kalman filter, adjustable (for example can get 1/4).The time interval between twice of freq_offset is non-vanishing for example,, while surpassing threshold value thresh_inetrval (can get 16 superframes), enters " door is waited for sooner or later ".
(c) door is waited for sooner or later: consider that feedback control loop may have certain time delay, carrying out after sampling control signal ppm_ctrl adjusts regular hour being waited for (for example can get 3 superframes), wait for after the stable output of door sooner or later, enter " sample frequency locking ".
(d) sample frequency locking: keep sampling control signal ppm_ctrl constant under this state, monitor sampling frequency deviation freq_offset and sampling phase deviation phase_offset simultaneously.When freq_offset is not 0, return to " sampling frequency offset tracking ".When | for example, when phase_offset| is greater than threshold value thresh_offset (can get 0.1), enter " sampling phase adjustment ".
(e) sampling phase adjustment: the sampling phase deviation that enters this state description system is larger.Now first sampling control signal ppm_ctrl is carried out once to larger instantaneous adjustment inst_adjust (for example can get 0.1ppm), it is synchronous that promotion interpolation filter is realized sampling phase.
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + inst _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - inst _ adjust , phase _ offset < 0
For example, after the regular hour (can get 1 superframe), ppm_ctrl is returned to initial value, on the basis of initial value, carry out once more very little inching micro_adjust (for example can get 0.01ppm), it is synchronous that promotion interpolation filter is realized sample frequency, then returns to " door is waited for sooner or later ".
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + micro _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - micro _ adjust , phase _ offset < 0
Under " sample frequency tracking ", " door is waited for sooner or later ", " sample frequency locking " and " sampling phase adjustment " state, if find Frame Alignment Loss, return to " free time ", wait for frame synchronization acquisition success.
Please refer to Fig. 5 and Fig. 6, Fig. 5 is sampling control signal-adjustment frequency curve in the present embodiment; Fig. 6 is sampling phase deviation-adjustment frequency curve in the present embodiment.When signal to noise ratio is 0dB, when the sampling clock deviation of receiver is 1/0.945ppm, carry out 500 sampling control signal ppm_ctrl after controlling of sampling as shown in Figure 5, corresponding sampling phase deviation phase_offset is as shown in Figure 6.Sampled point deviation corresponding to sampling phase deviation is as shown in table 1.Can find out, after controlling of sampling loop stability, the sampling phase deviation of system can be controlled in 0.1, and corresponding sampled point deviation can be controlled in 0.15 sampled point.
Table 1
Sampling phase deviation Sampled point deviation
-0.200 -1/4
-0.160 -5/24
-0.125 -1/6
-0.090 -1/8
-0.050 -1/12
-0.015 -1/24
0.000 0
0.015 1/24
0.050 1/12
0.090 1/8
0.125 1/6
0.160 5/24
0.200 1/4
Please refer to Fig. 7, Fig. 7 is the structural representation of the sample-synchronous device of the digit broadcasting system that provides of the embodiment of the present invention.This device can be realized the method for Fig. 3 and the corresponding embodiment of Fig. 4, therefore, the description of Fig. 3 and the corresponding embodiment of Fig. 4 is equally applicable to the device of the present embodiment.This device 70 comprises:
Sample interpolation processing unit 71, for the continuous signal receiving is sampled, obtains sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing;
Sampling frequency deviation generation unit 72, for obtaining sampling frequency deviation according to the frame head position deviation of the sample sequence signal frame after described interpolation processing;
Sampling phase deviation generation unit 73, for the symmetry acquisition sampling phase deviation with morning gate signal and local frame head Serial relation value according to the slow gate signal of the sample sequence after described interpolation processing;
Controlling of sampling unit 74, for according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal dynamically being adjusted, thereby realizes the synchronous of sample frequency and sampling phase by controlling described interpolation processing.
In a kind of implementation of the present embodiment, described sample interpolation processing unit 71 comprises:
Sampling module 711, for the continuous signal receiving is carried out to over-sampling, obtains sample sequence s (i);
Filtering interpolation module 712, for according to sampling control signal, carries out interpolation processing to sample sequence s (i), obtains the sample sequence r (i) after sampling frequency conversion.
In a kind of implementation of the present embodiment, described sampling frequency deviation generation unit 72 comprises:
Frame synchronization module 721, for catching the frame head position of each signal frame of sample sequence r (i);
Sampling frequency offset computing module 722, for the deviation with respect to the frame head position of a upper signal frame according to the frame head position of described each signal frame, obtains sampling frequency deviation.
Optionally, described sampling frequency offset computing module, and is sued for peace and is obtained delta_PN_posi the frame head position deviation of N signal frame according to the following formula with respect to the deviation of the frame head position of a upper signal frame specifically for: the frame head position of calculating each signal frame:
delta _ PN _ posi = &Sigma; n = 0 N - 1 ( PN _ posi ( n ) - PN _ posi ( n - 1 ) )
According to following formula, obtain sampling frequency deviation freq_offset:
freq _ offset = delta _ PN _ posi N &times; len _ frame &times; oversample
Wherein, the frame head position that PN_posi (n) is n signal frame, the frame head position that PN_posi (n-1) is n-1 signal frame, the length that len_frame is signal frame, oversample is over-sampling rate.
In a kind of implementation of the present embodiment, described sampling phase deviation generation unit 73 comprises:
Frame head extraction module 731 for according to the position of the signal frame structure of system and frame head, extracts frame head sequence q (j) in sample sequence r (i);
Local frame head generation module 732, for according to the frame head form of system, generates local frame head sequence PN (k);
Door module 733, for frame head sequence q (j) is postponed and down-sampling, obtains early gate signal p sooner or later e(k) and slow gate signal p l(k); By gate signal p morning e(k) and slow gate signal p l(k) carry out relevantly to local frame head sequence PN (k) respectively, obtain the first correlation and the second correlation; According to the symmetry of described the first correlation and the second correlation, obtain sampling phase deviation.
Optionally, described sooner or later door module 733 specifically for:
Frame head sequence q (j) is postponed and down-sampling, obtain gate signal p morning of single-time sampling e(k) and slow gate signal p l(k);
By gate signal p morning e(k) and slow gate signal p l(k) carry out according to the following formula relevantly to local frame head sequence PN (k) respectively, obtain the first correlation S ewith the second correlation S l:
S e = &Sigma; k = 0 len _ PN - 1 p e ( k ) &times; PN ( k )
S l = &Sigma; k = 0 len _ PN - 1 p l ( k ) &times; PN ( k )
Wherein, the length that len_PN is frame head.
To the first correlation S ewith the second correlation S lask according to the following formula respectively the first norm a and b:
a=|real(S e)|+|imag(S e)|
b=|real(S l)|+|imag(S l)|
Wherein, function real () represents to get real part, and imag () represents to get imaginary part;
According to following formula, obtain sampling phase deviation phase_offset:
phase _ offset = a - b a + b .
In a kind of implementation of the present embodiment, described controlling of sampling unit 74 specifically for:
If frame synchronization acquisition success, according to sampling frequency deviation freq_offset, obtains comparatively stable sampling control signal ppm_ctrl by Kalman filtering according to the following formula:
ppm_ctrl(m)=ppm_ctrl(m-1)+freq_offset×k Kalman
Wherein, ppm_ctrl (m-1) is last sampling control signal, k kalmancoefficient for Kalman filter;
The time interval between twice of sampling frequency deviation freq_offset is non-vanishing is while surpassing predetermined threshold thresh_inetrval, waits for that a scheduled time is to stable output sooner or later;
After the stable output of door, monitor sampling frequency deviation freq_offset and sampling phase deviation phase_offset sooner or later simultaneously.When freq_offset is not 0, return to " obtaining comparatively stable sampling control signal by Kalman filtering " step;
When | when phase_offset| is greater than predetermined threshold thresh_offset, according to the following formula sampling control signal ppm_ctrl is carried out once to instantaneous adjustment:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + inst _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - inst _ adjust , phase _ offset < 0
Wherein, described inst_adjust is instantaneous adjusted value;
After a scheduled time, ppm_ctrl is returned to the initial value before described instantaneous adjustment, then on the basis of described initial value, carry out according to the following formula an inching, then wait for that a scheduled time is to the stable output of door sooner or later:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + micro _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - micro _ adjust , phase _ offset < 0
Wherein, described micro_adjust is inching value;
If discovery Frame Alignment Loss, enters idle condition, wait for frame synchronization acquisition success.
The sample-synchronous device of the digit broadcasting system that the embodiment of the present invention provides and sampling synchronization method are owing to according to described sampling frequency deviation and sampling phase deviation, described sampling control signal dynamically being adjusted, therefore, one, can realize accurately the synchronous of sample frequency and sampling phase; Two, there is the stronger ability to anti-noise jamming; Three, can be widely used in a plurality of fields such as received terrestrial digital broadcasting, satellite digital broadcasting, mobile digital broadcast; Four, the various parameters in method and device can be carried out flexible configuration according to the actual conditions of system.
Realization in order to demonstrate the invention, has described above-mentioned embodiment.But other variations of the present invention and modification, be apparent for those skilled in the art, any modification/variation within the scope of essence disclosed in this invention and basic principle or imitation conversion all belong to claim protection range of the present invention.

Claims (7)

1. a sampling synchronization method for digit broadcasting system, is characterized in that, comprising:
The continuous signal receiving is sampled, obtain sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing;
According to the frame head position deviation of signal frame in the sample sequence after described interpolation processing, obtain sampling frequency deviation;
Symmetry acquisition sampling phase deviation according to slow gate signal in the sample sequence after described interpolation processing with morning gate signal and local frame head Serial relation value;
According to described sampling frequency deviation and described sampling phase deviation, described sampling control signal is dynamically adjusted, by controlling described interpolation processing, realized the synchronous of sample frequency and sampling phase;
Wherein, the described acquisition of the frame head position deviation according to signal frame in the sample sequence after described interpolation processing sampling frequency deviation comprises: the frame head position of catching each signal frame in sample sequence; Deviation according to the frame head position of described each signal frame with respect to the frame head position of a upper signal frame, obtains sampling frequency deviation;
Described in described basis, the frame head position of each signal frame is with respect to the deviation of the frame head position of a upper signal frame, acquisition sampling frequency deviation comprises: the frame head position of calculating each signal frame is with respect to the deviation of the frame head position of a upper signal frame, and the frame head position deviation of N signal frame is sued for peace and obtained delta_PN_posi: delta _ PN _ posi = &Sigma; n = 0 N - 1 ( PN _ posi ( n ) - PN _ posi ( n - 1 ) ) ; According to following formula, obtain sampling frequency deviation freq_offset: freq _ offset = delta _ PN _ posi N &times; len _ frame &times; oversample ; Wherein, the frame head position that PN_posi (n) is n signal frame, the frame head position that PN_posi (n-1) is n-1 signal frame, the length that len_frame is signal frame, oversample is over-sampling rate;
Wherein, described according in the sample sequence after described interpolation processing late gate signal and early gate signal comprise with the symmetry acquisition sampling phase deviation of local frame head Serial relation value: according to the position of the signal frame structure of system and frame head, in sample sequence, extract frame head sequence; According to the frame head form of system, generate local frame head sequence; Frame head sequence is postponed and down-sampling, obtain early gate signal and late gate signal; By slow gate signal and early gate signal carry out relevantly to local frame head sequence respectively, obtain the first correlation and the second correlation; According to the symmetry of described the first correlation and the second correlation, obtain sampling phase deviation;
Described by slow gate signal and early gate signal carry out relevant comprising to local frame head sequence respectively: by slow gate signal p l(k) gate signal p and early e(k) carry out according to the following formula relevantly to local frame head sequence PN (k) respectively, obtain the first correlation S ewith the second correlation S l: S e = &Sigma; k = 0 len _ PN - 1 p e ( k ) &times; PN ( k ) S l = &Sigma; k = 0 len _ PN - 1 p l ( k ) &times; PN ( k ) ; Wherein, the length that len_PN is frame head;
The described symmetry according to described the first correlation and the second correlation obtains sampling phase deviation and comprises: to the first correlation S ewith the second correlation S lask according to the following formula respectively the first norm a and b: a = | real ( S e ) | + | imag ( S e ) | b = | real ( S l ) | + | imag ( S l ) | ; Wherein, function real () represents to get real part, and imag () represents to get imaginary part; According to following formula, obtain sampling phase deviation phase_offset:
Figure FDA0000400595100000023
2. method according to claim 1, is characterized in that, describedly according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal is dynamically adjusted, and comprising:
If frame synchronization acquisition success, according to sampling frequency deviation freq_offset, obtains comparatively stable sampling control signal ppm_ctrl by Kalman filtering according to the following formula:
ppm_ctrl(m)=ppm_ctrl(m-1)+freq_offset×k Kalman
Wherein, ppm_ctrl (m-1) is last sampling control signal, and freq_offset is sampling frequency deviation, k kalmancoefficient for Kalman filter.
3. method according to claim 1, is characterized in that, describedly according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal is dynamically adjusted, and comprising:
The time interval between twice of sampling frequency deviation freq_offset is non-vanishing is while surpassing predetermined threshold thresh_inetrval, waits for that a scheduled time is to stable output sooner or later;
After the stable output of door, monitor sampling frequency deviation freq_offset and sampling phase deviation phase_offset sooner or later simultaneously, when freq_offset is not 0, return to " obtaining comparatively stable sampling control signal by Kalman filtering " step;
When | when phase_offset| is greater than predetermined threshold thresh_offset, according to the following formula sampling control signal ppm_ctrl is carried out once to instantaneous adjustment:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + inst _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - inst _ adjust , phase _ offset < 0
Wherein, described inst_adjust is instantaneous adjusted value;
After a scheduled time, ppm_ctrl is returned to the initial value before described instantaneous adjustment, then according to following formula, carry out an inching on the basis of described initial value, then wait for that a scheduled time is to the stable output of door sooner or later:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + micro _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - micro _ adjust , phase _ offset < 0
Wherein, described micro_adjust is inching value.
4. method according to claim 1, is characterized in that, described method also comprises:
If discovery Frame Alignment Loss, enters idle condition, wait for frame synchronization acquisition success.
5. a sample-synchronous device for digit broadcasting system, is characterized in that, comprising:
Sample interpolation processing unit, for the continuous signal receiving is sampled, obtains sample sequence, and according to sampling control signal, sample sequence is carried out to interpolation processing;
Sampling frequency deviation generation unit, for obtaining sampling frequency deviation according to the frame head position deviation of the sample sequence signal frame after described interpolation processing;
Sampling phase deviation generation unit, for the symmetry acquisition sampling phase deviation with morning gate signal and local frame head Serial relation value according to the slow gate signal of the sample sequence after described interpolation processing;
Controlling of sampling unit, for according to described sampling frequency deviation and described sampling phase deviation, described sampling control signal dynamically being adjusted, thereby realizes the synchronous of sample frequency and sampling phase by controlling described interpolation processing;
Described sampling frequency deviation generation unit comprises: frame synchronization module, for catching the frame head position of each signal frame of sample sequence; Sampling frequency offset computing module, for the deviation with respect to the frame head position of a upper signal frame according to the frame head position of described each signal frame, obtains sampling frequency deviation;
Described sampling frequency offset computing module, and is sued for peace and is obtained delta_PN_posi the frame head position deviation of N signal frame with respect to the deviation of the frame head position of a upper signal frame specifically for: the frame head position of calculating each signal frame: delta _ PN _ posi = &Sigma; n = 0 N - 1 ( PN _ posi ( n ) - PN _ posi ( n - 1 ) ) ; According to following formula, obtain sampling frequency deviation freq_offset: freq _ offset = delta _ PN _ posi N &times; len _ frame &times; oversample ; Wherein, the frame head position that PN_posi (n) is n signal frame, the frame head position that PN_posi (n-1) is n-1 signal frame, the length that len_frame is signal frame, oversample is over-sampling rate;
Described sampling phase deviation generation unit comprises: frame head extraction module for according to the position of the signal frame structure of system and frame head, extracts frame head sequence in sample sequence; Local frame head generation module, for according to the frame head form of system, generates local frame head sequence; Door module, for frame head sequence is postponed and down-sampling, obtains early gate signal and late gate signal sooner or later; By morning gate signal and late gate signal carry out relevantly to local frame head sequence respectively, obtain the first correlation and the second correlation; According to the symmetry of described the first correlation and the second correlation, obtain sampling phase deviation;
The described module of door is sooner or later used for: frame head sequence q (j) is postponed and down-sampling, obtain gate signal p morning of single-time sampling e(k) and slow gate signal p l(k); By gate signal p morning e(k) and slow gate signal p l(k) carry out according to the following formula relevantly to local frame head sequence PN (k) respectively, obtain the first correlation Se and the second correlation Sl: S e = &Sigma; k = 0 len _ PN - 1 p e ( k ) &times; PN ( k ) S l = &Sigma; k = 0 len _ PN - 1 p l ( k ) &times; PN ( k ) ; Wherein, the length that len_PN is frame head; To the first correlation S ewith the second correlation S lask according to the following formula respectively the first norm a and b: a = | real ( S e ) | + | imag ( S e ) | b = | real ( S l ) | + | imag ( S l ) | ; Wherein, function real () represents to get real part, and imag () represents to get imaginary part; According to following formula, obtain sampling phase deviation phase_offset: phase _ offset = a - b a + b .
6. device according to claim 5, is characterized in that, described sample interpolation processing unit comprises:
Sampling module, for the continuous signal receiving is carried out to over-sampling, obtains sample sequence;
Filtering interpolation module, for according to sampling control signal, carries out interpolation processing to sample sequence, obtains the sample sequence after sampling frequency conversion.
7. according to the device described in any one in claim 5 to 6, it is characterized in that, described controlling of sampling unit specifically for:
If frame head synchronization acquistion success, according to sampling frequency deviation freq_offset, obtains comparatively stable sampling control signal ppm_ctrl by Kalman filtering according to the following formula:
ppm_ctrl(m)=ppm_ctrl(m-1)+freq_offset×k Kalman
Wherein, ppm_ctrl (m-1) is last sampling control signal, and freq_offset is sampling frequency deviation, k kalmancoefficient for Kalman filter;
The time interval between twice of sampling frequency deviation freq_offset is non-vanishing is while surpassing first threshold thresh_inetrval, waits for that a scheduled time is to stable output sooner or later;
After the stable output of door, monitor sampling frequency deviation freq_offset and sampling phase deviation phase_offset sooner or later simultaneously, when freq_offset is not 0, return to " obtaining comparatively stable sampling control signal by Kalman filtering " step;
When | when phase_offset| is greater than predetermined threshold thresh_offset, according to the following formula sampling control signal ppm_ctrl is carried out once to instantaneous adjustment:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + inst _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - inst _ adjust , phase _ offset < 0 ,
Wherein, described inst_adjust is instantaneous adjusted value;
After a scheduled time, ppm_ctrl is returned to the initial value before described instantaneous adjustment, then according to following formula, carry out an inching on the basis of described initial value, then wait for that a scheduled time is to the stable output of door sooner or later:
ppm _ ctrl ( m ) = ppm _ ctrl ( m - 1 ) + micro _ adjust , phase _ offset > 0 ppm _ ctrl ( m - 1 ) - micro _ adjust , phase _ offset < 0 ,
Wherein, described micro_adjust is inching value;
If discovery Frame Alignment Loss, enters idle condition, wait for frame head synchronization acquistion success.
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CN105323056B (en) * 2014-07-08 2018-08-07 国家广播电影电视总局广播科学研究院 bit synchronization method and device
CN107634812B (en) * 2017-09-06 2019-04-19 深圳磊诺科技有限公司 A kind of LTE micro-base station and its method and synchronous method for detecting frame header deviation
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