CN102492932B - In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices - Google Patents

In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices Download PDF

Info

Publication number
CN102492932B
CN102492932B CN201110394348.XA CN201110394348A CN102492932B CN 102492932 B CN102492932 B CN 102492932B CN 201110394348 A CN201110394348 A CN 201110394348A CN 102492932 B CN102492932 B CN 102492932B
Authority
CN
China
Prior art keywords
gaas
ald
gaas substrate
atomic layer
layer deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201110394348.XA
Other languages
Chinese (zh)
Other versions
CN102492932A (en
Inventor
李学飞
李爱东
曹燕强
吴迪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing University
Original Assignee
Nanjing University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing University filed Critical Nanjing University
Priority to CN201110394348.XA priority Critical patent/CN102492932B/en
Publication of CN102492932A publication Critical patent/CN102492932A/en
Application granted granted Critical
Publication of CN102492932B publication Critical patent/CN102492932B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The invention discloses an in-situ surface passivation method in the ALD production of GaAs-based MOS devices. After being cleaned, a GaAs substrate is immersed in HCI aqueous solution for 3 to 5 minutes and then in (NH4)2S aqueous solution for 10 to 40 minutes, the GaAs substrate is dried by nitrogen and transferred into an atomic layer deposition reaction chamber, and the GaAs substrate is cleaned in situ by metal pulse. On the basis of S passivation, the method further uses metal pulse to passivate the surface of the gallium arsenide substrate in situ in the reaction chamber, thus effectively removing the oxides of arsenic and gallium on the surface, consequently, a stable interface is formed, the production of oxides is prevented, the quality of the interface between a gate dielectric film and the GaAs substrate is improved, the thickness of the interlayer is decreased, the heat stability of the interface is enhanced, the density of defective charge and interface states is decreased, and thereby the electric properties of post-ALD GaAs-based MOS devices are remarkably improved.

Description

ALD prepares the in-situ surface passivating method in GaAs base MOS device
Technical field
The present invention relates to a kind of method that technique for atomic layer deposition is applied to the manufacture of MOSFETs device, specifically a kind of ALD prepares the in-situ surface passivating method in GaAs base MOS device process.
Background technology
Along with improving constantly of unicircuit integrated level, in the silicon-based semiconductor unicircuit, Metal-oxide-semicondutor field effect transistor (MOSFETs) device feature size is about to reach nanoscale.The technical bottleneck that the application of novel material and new device structure has become the topmost solution of semiconductor microactuator Nanoelectronic Technology Sustainable development and must break through.Although the traditional SiO of the high k material substitution of hafnium base 2be applied to traditional si-substrate integrated circuit field as the gate oxide medium, but faced the physics of a series of sternnesses and the challenge of technical problem.One of them main chronic illness is exactly the introducing of high-k gate dielectric and metal gate material, when reducing the high power consumption of small scale complementary CMOS device, also bring the deterioration at channel material/gate dielectric material interface, due to reasons such as coulomb scattering, phon scatterings, cause the obvious decline of channel mobility, greatly affected the raising of CMOS logical device speed.So, another the attractive solution that adopts the novel semiconductor channel material with high mobility to prepare the high-performance novel cmos device as Ge and GaAs replace traditional Si material to become.
With the silica-based microelectronic device of tradition, compare, GaAs-MOSFET has very high electronic mobility, larger band gap, higher breaking down field strength.The ITRS route map of 2004 has been listed the MOSFET of compound semiconductor base in the candidate technologies of following CMOS technical development.Last decade, the device of the GaAs of radio frequency and optoelectronic applications and InP base is volume production.Compound semiconductor FET just more and more receives people's concern, is expected to obtain application in the following MOSFET of 22nm node.But up to now, major technique obstacle prepared by obstruction GaAs base MOSFET is that the GaAs surface passivation technique does not solve, the native oxide Ga of GaAs 2o 3quality with non-constant, produce serious Fermi's pinning effect, thereby affect the normal operation of device.In order to solve the problem of Fermi's pinning, must development suitable and semiconductor technology compatibility, and the GaAs surface passivation technology of simple possible, and find suitable gate dielectric material.
Technique for atomic layer deposition (Atomic layer deposition, ALD) is a kind of just type material deposition technique in flourish.Since calendar year 2001 international semiconductor TIA (ITRS) using ALD and metal organic chemical vapor deposition (MOCVD), plasma enhanced CVD side by side since the candidate technologies with the microelectronic technique compatibility, the ALD recent years comes growth momentum powerful.Why technique for atomic layer deposition is subject to the favor of microelectronics industry and field of nano material preparation, and these growing principle and characteristics with its uniqueness are inseparable.Ald is by the pulse of gas phase presoma alternately being passed into to reactor and a kind of film forming method of Chemisorption occurring on the depositing base surface, because its surface reaction has the characteristics from restriction (Self-limiting), so ALD has excellent three-dimensional stickiness (Conformality) and large-area homogeneity; Accurately, simple film thickness monitoring (only relevant with the reaction cycle number of times); Low depositing temperature (room temperature~400 ° C); Be applicable to modifying interface and prepare many group members' of nanoscale laminate structure (Nanolaminates); Low deposition rate (1~2 nm/min); Have stable process window, between this window region, deposition is insensitive to temperature, fluctuations in discharge.
But the quality of ALD quality depends critically upon the result of GaAs surface passivation, only has effective formation that reduces liner oxide, could in the ALD process, improve the interface quality between gate dielectric membrane and GaAs substrate, improved the electric property of GaAs Base Metal oxide semiconductor (metal-oxide-semiconductor, MOS) device.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of ALD and prepares the in-situ surface passivating method in GaAs base MOS device process, this passivating method has reduced the formation of GaAs liner oxide, thereby improved the interface quality between gate dielectric membrane and GaAs substrate, improved the electric property of GaAs Base Metal oxide semiconductor element.
ALD of the present invention prepares the in-situ surface passivating method in GaAs base MOS device, and it comprises the following steps:
1) at first clean the GaAs substrate,
2) afterwards the GaAs substrate is soaked 3 ~ 5 minutes in the HCl aqueous solution,
3) (the NH followed in the 15-20% weight ratio 4) 2in the S aqueous solution, soak 10 ~ 40 minutes,
4) dry up the GaAs substrate and move into atomic layer deposition reaction chamber with nitrogen,
5) use in position metal pulse cleaning GaAs substrate.
Above-mentioned steps 1) detailed process is: use successively acetone, ethanol, Virahol ultrasonic cleaning GaAs substrate 3 ~ 10 minutes.
Above-mentioned steps 2) in, the weight ratio of the HCl aqueous solution is HCl:H 2o=1:10 .
Above-mentioned steps 5) detailed process is: under 250-300 ℃ of working temperature, to atomic layer deposition reaction chamber, first pass into source metal TMA pulse 0.1s, then pass into metal TDMAH pulse 0.1s; So circulation is 10-30 time.
Beneficial effect of the present invention:
Before carrying out the gate medium oxidate, the present invention further uses metal pulse deopiking gallium arsenide substrate surface in the reaction chamber original position on the basis of S passivation, surperficial arsenic and the oxide compound of gallium have effectively been removed, formed stable interface, prevented the generation of oxide compound, improved the interface quality between gate dielectric membrane and GaAs substrate, reduced the thickness of interfacial layer, improve the interface thermostability, reduce defect electric charge and interface state density, and then improved significantly the electric property of GaAs base MOS device after ALD.This method technique is simple, in the preparation of GaAs base MOSFET device, has important application prospect.
The accompanying drawing explanation
Fig. 1 is the present invention's (upper part) and the As2p photoelectron spectrum figure that only adopts the gallium arsenide substrate that two kinds of Cleaning and Passivation methods of S passivation (lower part) processed;
Fig. 2 is the present invention's (upper part) and only adopts two kinds of Cleaning and Passivation methods of S passivation (lower part) to process the Ga2p photoelectron spectrum figure of rear sample;
Fig. 3 be the present invention (Fig. 3 b) and only adopt the S passivation (Fig. 3 a) two kinds of Cleaning and Passivation methods process after the surface growth HfO of gallium arsenide substrate 2/ (1nm) Al 2o 3the high-resolution-ration transmission electric-lens photo of film;
Fig. 4 is the present invention and only adopts two kinds of Cleaning and Passivation methods of S passivation to process rear Ge substrate deposition HfO 2/ Al 2o 3the capacitance-voltage of film (C-V) curve.
Embodiment
Core of the present invention is on the GaAs of ammonium sulfide passivation substrate, adopt metal burst process substrate surface by original position in the reaction chamber of ald, reduced the formation of liner oxide, improved the interface quality between gate dielectric membrane and GaAs substrate, obviously improved the electric property of GaAs Base Metal oxide semiconductor (metal-oxide-semiconductor, MOS) device.This method technique is simple, in the preparation of GaAs base MOSFET device, has important application prospect.
embodiment 1:
1) use successively acetone, ethanol, Virahol ultrasonic 3 minutes, remove the greasy dirt of GaAs substrate surface.
2) use again HCl (weight ratio HCl/H 2o=1:10) water-soluble vacuole is 3 minutes, removes the natural oxidizing layer of GaAs substrate surface.
3) use again (the NH of 20% weight ratio 4) 2the water-soluble vacuole of S 10 minutes, make the GaAs substrate surface form Ga-S and As-S key, further removes unnecessary As simple substance and the oxide compound of As.
4) the GaAs substrate after drying up with nitrogen moves into atomic layer deposition reaction chamber.
5) in the time of 250 ℃, first pass into source metal TMA pulse 0.1s to atomic layer deposition reaction chamber, then pass into metal TDMAH pulse 0.1s; So circulation is 10 times.
embodiment 2:
1) use successively acetone, ethanol, Virahol ultrasonic 10 minutes, remove the greasy dirt of GaAs substrate surface.
2) use again HCl (weight ratio HCl/H 2o=1:10) water-soluble vacuole is 5 minutes, removes surperficial natural oxidizing layer.
3) use again (the NH of 15% weight ratio 4) 2the water-soluble vacuole of S 40 minutes, make the GaAs substrate surface form Ga-S and As-S key, further removes unnecessary As simple substance and the oxide compound of As.
4) the GaAs substrate after drying up with nitrogen moves into atomic layer deposition reaction chamber.
5) in the time of 300 ℃, first pass into source metal TMA pulse 0.1s to atomic layer deposition reaction chamber, then pass into metal TDMAH pulse 0.1s; So circulation is 30 times.
embodiment 3:
1) use successively acetone, ethanol, Virahol ultrasonic 5 minutes, remove the greasy dirt of GaAs substrate surface.
2) use again HCl (weight ratio HCl/H 2o=1:10) water-soluble vacuole is 4 minutes, removes the natural oxidizing layer of GaAs substrate surface.
3) use again (the NH of 25% weight ratio 4) 2the water-soluble vacuole of S 20 minutes, make the GaAs substrate surface form Ga-S and As-S key, further removes unnecessary As simple substance and the oxide compound of As.
4) the GaAs substrate after drying up with nitrogen moves into atomic layer deposition reaction chamber.
5) in the time of 270 ℃, first pass into source metal TMA pulse 0.1s to atomic layer deposition reaction chamber, then pass into metal TDMAH pulse 0.1s; So circulation is 20 times.
follow-up ALD process:
Gate dielectric membrane growth technique: adopt the representative processes-atomic layer deposition method of growth gate dielectric membrane to prepare HfO 2/ Al 2o 3storehouse (stacking structure) structural membrane.
Growth temperature: 250-350 ℃; Reaction source: trimethyl aluminium Al (CH 3) 3, four or two (methyl ammonia) hafniums (TDMAH), oxygen source is water H 2o; The source temperature: trimethyl aluminium and water are room temperature, and TDMAH is 60-90 ℃;
The growth pulse: the burst length of source metal is 0.1 second, and the burst length of oxygen source is 0.1 second; Cleaning the burst length is 4 seconds.An atomic layer deposition cycles cycle, one was cleaned pulse by a metal pulse, and an oxygen source pulse and a cleaning pulse form.
HfO 2/ Al 2o 3storehouse: first pass into source metal TMA pulse 0.1s, then pass into N 2pulse cleaning 4s, then pass into water vapour pulse 0.1s, finally pass into N 2pulse cleaning 4s; So circulation is 10 times.Pass into again source metal TDMAH pulse 0.1s, then pass into N 2pulse cleaning cleans 4s, then passes into water vapour pulse 0.1s, finally passes into N 24s, so circulate 30 times.
Electrode materials: magnetron sputtering upper current conducting cap Pt.
Test characterizes: the Surface Physical Chemistry structure after gallium arsenide substrate is processed is measured with x-ray photoelectron spectroscopy, interface structure characterizes with high-resolution-ration transmission electric-lens, high precision electro potential source for I-E characteristic/Pi Anbiao measures, and capacitance-voltage characteristics is measured with accurate electric impedance analyzer.
performance comparison:
Comparative sample adopts identical ALD technique, just in passivating process, only adopts the S passivation.
1, the chemical structure at interface
The As2p photoelectron spectrum figure that Fig. 1 is the gallium arsenide substrate processed of two kinds of different Cleaning and Passivation methods.The combination at three peaks in figure can be respectively 1322.5,1323.7 and 1325.6 eV, corresponds respectively to substrate GaAs, As-S, and As 2o 3.According to the intensity at two chemical shift peaks, calculate, ammonium sulfide is processed As-S and the As on rear gallium arsenide substrate surface 2o 3content be respectively 9.62% and 15.06%, and As-S and the As on gallium arsenide substrate surface after ammonium sulfide and metal burst process 2o 3content be respectively 5.80% and 11.13%.
The Ga2p photoelectron spectrum figure that Fig. 2 is counter sample.The combination at three peaks in Fig. 2 can be respectively 1116.9,1118 and 1118.9 eV, corresponds respectively to substrate GaAs, Ga-S, and Ga 2o 3.According to the intensity at two chemical shift peaks, calculate, ammonium sulfide is processed Ga-S and the Ga on rear gallium arsenide substrate surface 2o 3content be respectively 7.83% and 9.88%, and Ga-S and the Ga on gallium arsenide substrate surface after ammonium sulfide and metal burst process 2o 3content be respectively 3.96% and 7.12%.After this explanation, a kind for the treatment of process more can effectively be removed the oxide compound of gallium arsenide surface, contributes to reduce defect electric charge and interface state density.
Fig. 3 provides is the surface growth HfO of the gallium arsenide substrate processed by two kinds of different Cleaning and Passivation methods 2/ (1nm) Al 2o 3the high-resolution-ration transmission electric-lens photo of film.The HfO of two samples 2thickness be all 2.8nm.The interfacial layer thickness of the sample of only processing with ammonium sulfide is probably 0.9nm, and the interfacial layer thickness of the sample of processing together with the metal pulse with ammonium sulfide is probably 0.2nm.
2, electrical properties
Fig. 4 has showed GaAs substrate deposition HfO after two kinds of Cleaning and Passivation art breading 2/ Al 2o 3the capacitance-voltage of film (C-V) curve.When survey frequency is 1MHz, after ammonium sulfide and metal burst process, deposit HfO 2/ Al 2o 3the accumulation state electric capacity of film is 2.3 μ F/cm 2, and the accumulation state electric capacity obtained after only processing with ammonium sulfide is 1.1 μ F/cm 2, reducing of this capacitance may be due to interfacial layer very thick causing.In addition, the C-V curve obtained after only processing with ammonium sulfide seriously stretches along X-direction, in the sample that this explanation ammonium sulfide is processed, has more charge defects, has caused high interface state density.
Above-mentioned these embodiments are only for the present invention is described, but do not limit the scope of the invention, and after having read the present invention, those skilled in the art all fall within the application's claims limited range to the modification of the various equivalent form of values of the present invention.

Claims (3)

1. an ALD prepares the in-situ surface passivating method in GaAs base MOS device, it is characterized in that comprising the following steps: 1) at first clean the GaAs substrate, 2) afterwards the GaAs substrate is soaked 3 ~ 5 minutes in the HCl aqueous solution to 3) then at the (NH of 15-25% weight ratio 4) 2in the S aqueous solution, soak 10 ~ 40 minutes, 4) dry up the GaAs substrate and move into atomic layer deposition reaction chamber with nitrogen, 5) use in position metal pulse cleaning GaAs substrate, be specially: under 250-300 ℃ of working temperature, first pass into source metal TMA pulse 0.1s to atomic layer deposition reaction chamber, then pass into metal TDMAH pulse 0.1s; So circulation is 10-30 time.
2. ALD according to claim 1 prepares the in-situ surface passivating method in GaAs base MOS device, it is characterized in that, the process of step 1) is: use successively acetone, ethanol, Virahol ultrasonic cleaning GaAs substrate 3 ~ 10 minutes.
3. ALD according to claim 1 and 2 prepares the in-situ surface passivating method in GaAs base MOS device, it is characterized in that step 2) in the weight ratio of the HCl aqueous solution be HCl:H 2o=1:10.
CN201110394348.XA 2011-12-02 2011-12-02 In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices Expired - Fee Related CN102492932B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110394348.XA CN102492932B (en) 2011-12-02 2011-12-02 In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110394348.XA CN102492932B (en) 2011-12-02 2011-12-02 In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices

Publications (2)

Publication Number Publication Date
CN102492932A CN102492932A (en) 2012-06-13
CN102492932B true CN102492932B (en) 2014-01-08

Family

ID=46184793

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110394348.XA Expired - Fee Related CN102492932B (en) 2011-12-02 2011-12-02 In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices

Country Status (1)

Country Link
CN (1) CN102492932B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103065955B (en) * 2012-11-21 2015-11-18 中国科学院微电子研究所 A kind of ALD of utilization prepares the method for gate dielectric structure
KR102099881B1 (en) * 2013-09-03 2020-05-15 삼성전자 주식회사 Semiconductor device and method of fabricating the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101752236B (en) * 2009-10-26 2011-10-19 南京大学 Atomic layer deposition Al2O3/HfO2 method for regulating energy band offset between GaAs semiconductor and gate dielectric
CN102024707B (en) * 2010-11-03 2012-05-23 南京大学 Method for manufacturing GaAs-based metal oxide semiconductor (MOS) device

Also Published As

Publication number Publication date
CN102492932A (en) 2012-06-13

Similar Documents

Publication Publication Date Title
CN101752236B (en) Atomic layer deposition Al2O3/HfO2 method for regulating energy band offset between GaAs semiconductor and gate dielectric
Zhao et al. Effects of sulfur passivation on GaSb metal–oxide–semiconductor capacitors with neutralized and unneutralized (NH4) 2S solutions of varied concentrations
CN101447420A (en) Method for preparing high-dielectric-coefficient grid medium membrane hafnium silicon oxygen nitrogen
CN101838812B (en) Method for cleaning surface of passivated Ge substrate
Fukuda et al. Low-Temperature Formation of High-Quality $\hbox {GeO} _ {2} $ Interlayer for High-$\kappa $ Gate Dielectrics/Ge by Electron-Cyclotron-Resonance Plasma Techniques
Jiang et al. Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al2O3 Passivation Layer and Forming Gas Annealing
CN103367408A (en) Gate dielectric material based on silicon substrate high dielectric constant and preparation method for gate dielectric material
Lu et al. Comparison of HfAlO, HfO2/Al2O3, and HfO2 on n-type GaAs using atomic layer deposition
CN102543751A (en) Preparation method of Ge-based Metal Oxide Semiconductor (MOS) device with sub-nanometer equivalent to oxide thickness
CN102492932B (en) In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices
CN102024707B (en) Method for manufacturing GaAs-based metal oxide semiconductor (MOS) device
CN102403367A (en) High-mobility MOS (Metal Oxide Semiconductor) capacitor and manufacturing method thereof
CN101800178A (en) Preparation method of hafnium silicon aluminum oxygen nitrogen high-dielectric constant gate dielectric
CN101962758A (en) Method for forming Hf-based gate medium film on germanium substrate by atomic layer deposition at low temperature
Cao et al. HfO2/GeOxNy/Ge gate stacks with sub-nanometer capacitance equivalent thickness and low interface trap density by in situ NH3 plasma pretreatment
Tan et al. Interfacial and electrical properties of HfAlO/GaSb metal-oxide-semiconductor capacitors with sulfur passivation
CN205177850U (en) Germanium base MOS device
Ye et al. Capacitance-voltage characterization of atomic-layer-deposited Al2O3/InGaAs and Al2O3/GaAs metal-oxide-semiconductor structures
Rao et al. Investigations on the Nitride Interface Engineering at HfO2/Ge stacks for MOS devices
US20140273519A1 (en) Hydrogen-plasma process for surface preparation prior to insulator deposition on compound semiconductor materials
Gong et al. Impact of Gd2O3 passivation layer on interfacial and electrical properties of atomic-layer-deposited ZrO2 gate dielectric on GaAs
CN105374689A (en) A surface passivation method for a germanium-base MOS device and an obtained germanium-base MOS device
Jia et al. Properties of LaAlO3 thin film on GaAs (1 0 0) treated by in situ NH3 plasma
Fujiwara et al. Characteristic Change of GeO2/Ge Interface by Hf-Post Metallization Annealing
CN112259613A (en) Method, system and equipment for improving performance of germanium Ge MOS capacitor device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140108

Termination date: 20141202

EXPY Termination of patent right or utility model