CN102486752B - Sas扩展器中数据预取 - Google Patents
Sas扩展器中数据预取 Download PDFInfo
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- CN102486752B CN102486752B CN201110086062.5A CN201110086062A CN102486752B CN 102486752 B CN102486752 B CN 102486752B CN 201110086062 A CN201110086062 A CN 201110086062A CN 102486752 B CN102486752 B CN 102486752B
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- 238000000034 method Methods 0.000 claims description 47
- 238000003860 storage Methods 0.000 claims description 35
- 230000008569 process Effects 0.000 claims description 11
- 238000004891 communication Methods 0.000 claims description 9
- 239000004606 Fillers/Extenders Substances 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 1
- 238000012005 ligant binding assay Methods 0.000 description 8
- 230000008901 benefit Effects 0.000 description 4
- 230000000977 initiatory effect Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000004590 computer program Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000009189 diving Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000036452 memory potential Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0689—Disk arrays, e.g. RAID, JBOD
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/60—Details of cache memory
- G06F2212/6022—Using a prefetch buffer or dedicated prefetch cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0038—System on Chip
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Information Transfer Between Computers (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/960,118 | 2010-12-03 | ||
US12/960,118 US8566496B2 (en) | 2010-12-03 | 2010-12-03 | Data prefetch in SAS expanders |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102486752A CN102486752A (zh) | 2012-06-06 |
CN102486752B true CN102486752B (zh) | 2016-05-04 |
Family
ID=45747082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110086062.5A Active CN102486752B (zh) | 2010-12-03 | 2011-04-07 | Sas扩展器中数据预取 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8566496B2 (zh) |
EP (1) | EP2461245A3 (zh) |
JP (1) | JP5480834B2 (zh) |
KR (1) | KR101378270B1 (zh) |
CN (1) | CN102486752B (zh) |
TW (1) | TWI444833B (zh) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8626981B1 (en) * | 2011-03-24 | 2014-01-07 | Maxim Integrated Products, Inc. | SAS expander with non-blocking virtual PHY architecture |
US8689044B2 (en) * | 2011-11-16 | 2014-04-01 | Hewlett-Packard Development Company, L.P. | SAS host controller cache tracking |
US8694826B2 (en) * | 2012-02-29 | 2014-04-08 | Hewlett-Packard Development Company, L.P. | SAS host cache control |
US8898506B2 (en) | 2012-07-25 | 2014-11-25 | Lsi Corporation | Methods and structure for hardware serial advanced technology attachment (SATA) error recovery in a serial attached SCSI (SAS) expander |
US8589607B1 (en) * | 2012-08-07 | 2013-11-19 | Lsi Corporation | Methods and structure for hardware management of serial advanced technology attachment (SATA) DMA non-zero offsets in a serial attached SCSI (SAS) expander |
US8756345B2 (en) | 2012-10-31 | 2014-06-17 | Lsi Corporation | Methods and structure for managing protection information with a serial attached SCSI expander |
US9135198B2 (en) | 2012-10-31 | 2015-09-15 | Avago Technologies General Ip (Singapore) Pte Ltd | Methods and structure for serial attached SCSI expanders that self-configure by setting routing attributes of their ports based on SMP requests |
US8904108B2 (en) | 2012-10-31 | 2014-12-02 | Lsi Corporation | Methods and structure establishing nested Redundant Array of Independent Disks volumes with an expander |
US8782292B2 (en) | 2012-10-31 | 2014-07-15 | Lsi Corporation | Methods and structure for performing a rebuild of a logical volume with a serial attached SCSI expander |
US8904119B2 (en) | 2012-10-31 | 2014-12-02 | Lsi Corporation | Method and structures for performing a migration of a logical volume with a serial attached SCSI expander |
US9026706B2 (en) | 2012-12-14 | 2015-05-05 | Lsi Corporation | Method and system for detecting multiple expanders in an SAS topology having the same address |
US8990448B2 (en) | 2013-03-08 | 2015-03-24 | Lsi Corporation | Smart discovery model in a serial attached small computer system topology |
US20140297910A1 (en) * | 2013-03-29 | 2014-10-02 | Hewlett-Packard Development Company, L.P. | Sas expander |
CN104956348B (zh) * | 2013-04-02 | 2018-04-20 | 慧与发展有限责任合伙企业 | Sata发起方寻址和存储设备分片 |
WO2015126420A1 (en) * | 2014-02-24 | 2015-08-27 | Hewlett-Packard Development Company, L.P. | Sas zone configuration management |
CN104601711A (zh) * | 2015-01-27 | 2015-05-06 | 曙光云计算技术有限公司 | 用于云服务器的基于fpga的数据存储方法和系统 |
US11289137B2 (en) * | 2017-11-16 | 2022-03-29 | Micron Technology, Inc. | Multi-port storage-class memory interface |
US10990307B2 (en) * | 2018-07-27 | 2021-04-27 | Broadcom International Pte. Ltd. | System and method for providing a configurable storage media interface |
Citations (2)
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US6721870B1 (en) * | 2001-06-12 | 2004-04-13 | Emc Corporation | Prefetch algorithm for short sequences |
CN100511118C (zh) * | 2004-12-21 | 2009-07-08 | 普安科技股份有限公司 | 储存虚拟化控制器、子系统及系统与方法 |
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JPS55118168A (en) * | 1979-03-02 | 1980-09-10 | Hitachi Ltd | Memory reading control system |
JPS615358A (ja) * | 1984-06-07 | 1986-01-11 | Fujitsu Ltd | デ−タ処理装置 |
JPS61221966A (ja) * | 1985-03-28 | 1986-10-02 | Nec Corp | ベクトル命令処理装置 |
US4878219A (en) * | 1988-04-28 | 1989-10-31 | Digital Equipment Corporation | Method and apparatus for nodes in network to avoid shrinkage of an interframe gap |
JPH02127742A (ja) * | 1988-11-07 | 1990-05-16 | Nec Corp | 空き領域検索方式 |
SE469402B (sv) * | 1991-05-02 | 1993-06-28 | Swedish Inst Of Computer Scien | Foerfarande foer att haemta data till ett cache-minne |
US5634025A (en) * | 1993-12-09 | 1997-05-27 | International Business Machines Corporation | Method and system for efficiently fetching variable-width instructions in a data processing system having multiple prefetch units |
US5881254A (en) * | 1996-06-28 | 1999-03-09 | Lsi Logic Corporation | Inter-bus bridge circuit with integrated memory port |
JPH1016115A (ja) * | 1996-07-08 | 1998-01-20 | Mitsui Petrochem Ind Ltd | 透湿性シート |
US6138192A (en) * | 1996-12-31 | 2000-10-24 | Compaq Computer Corporation | Delivering a request to write or read data before delivering an earlier write request |
US6298407B1 (en) * | 1998-03-04 | 2001-10-02 | Intel Corporation | Trigger points for performance optimization in bus-to-bus bridges |
FI105749B (fi) * | 1998-06-12 | 2000-09-29 | Ericsson Telefon Ab L M | Dataverkkoliikennöinti |
JP3149856B2 (ja) * | 1998-08-31 | 2001-03-26 | 日本電気株式会社 | 磁気ディスク制御装置 |
US6286074B1 (en) * | 1999-03-24 | 2001-09-04 | International Business Machines Corporation | Method and system for reading prefetched data across a bridge system |
US6636927B1 (en) * | 1999-09-24 | 2003-10-21 | Adaptec, Inc. | Bridge device for transferring data using master-specific prefetch sizes |
US6678782B1 (en) * | 2000-06-27 | 2004-01-13 | International Business Machines Corporation | Flow architecture for remote high-speed interface application |
US6820161B1 (en) * | 2000-09-28 | 2004-11-16 | International Business Machines Corporation | Mechanism for allowing PCI-PCI bridges to cache data without any coherency side effects |
KR100649300B1 (ko) * | 2000-11-07 | 2006-11-24 | 주식회사 케이티 | 통신 시스템에서의 적응적인 데이터 전송 방법 및 그 장치 |
US7047327B1 (en) * | 2000-12-20 | 2006-05-16 | Adaptec, Inc. | Method and structure for supporting flow control by a SCSI initiator during the data out phase of the packetized SCSI protocol |
US6792496B2 (en) * | 2001-08-02 | 2004-09-14 | Intel Corporation | Prefetching data for peripheral component interconnect devices |
US6578130B2 (en) * | 2001-10-18 | 2003-06-10 | International Business Machines Corporation | Programmable data prefetch pacing |
US6973528B2 (en) * | 2002-05-22 | 2005-12-06 | International Business Machines Corporation | Data caching on bridge following disconnect |
US7089369B2 (en) * | 2003-03-31 | 2006-08-08 | Sun Microsystems, Inc. | Method for optimizing utilization of a double-data-rate-SDRAM memory system |
US7139878B2 (en) * | 2003-06-20 | 2006-11-21 | Freescale Semiconductor, Inc. | Method and apparatus for dynamic prefetch buffer configuration and replacement |
US7107384B1 (en) * | 2004-03-01 | 2006-09-12 | Pericom Semiconductor Corp. | Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths |
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JP2006331252A (ja) * | 2005-05-30 | 2006-12-07 | Matsushita Electric Ind Co Ltd | バスブリッジ装置 |
US7657690B1 (en) * | 2005-06-14 | 2010-02-02 | Globalfoundries Inc. | Control of PCI memory read behavior using memory read alias and memory command reissue bits |
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US8079031B2 (en) * | 2005-10-21 | 2011-12-13 | Intel Corporation | Method, apparatus, and a system for dynamically configuring a prefetcher based on a thread specific latency metric |
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JP5052193B2 (ja) * | 2007-04-17 | 2012-10-17 | 株式会社日立製作所 | 記憶制御装置および記憶制御方法 |
JP4977583B2 (ja) | 2007-11-22 | 2012-07-18 | 株式会社日立製作所 | 記憶制御装置及び記憶制御装置の制御方法 |
JP4809413B2 (ja) * | 2008-10-08 | 2011-11-09 | 株式会社日立製作所 | ストレージシステム |
US8490088B2 (en) * | 2010-09-10 | 2013-07-16 | International Business Machines Corporation | On demand virtual machine image streaming |
US8949579B2 (en) * | 2010-10-04 | 2015-02-03 | International Business Machines Corporation | Ineffective prefetch determination and latency optimization |
-
2010
- 2010-12-03 US US12/960,118 patent/US8566496B2/en not_active Expired - Fee Related
-
2011
- 2011-02-10 TW TW100104369A patent/TWI444833B/zh not_active IP Right Cessation
- 2011-02-16 EP EP11250178A patent/EP2461245A3/en not_active Ceased
- 2011-03-03 KR KR1020110018995A patent/KR101378270B1/ko not_active IP Right Cessation
- 2011-03-03 JP JP2011046608A patent/JP5480834B2/ja not_active Expired - Fee Related
- 2011-04-07 CN CN201110086062.5A patent/CN102486752B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6721870B1 (en) * | 2001-06-12 | 2004-04-13 | Emc Corporation | Prefetch algorithm for short sequences |
CN100511118C (zh) * | 2004-12-21 | 2009-07-08 | 普安科技股份有限公司 | 储存虚拟化控制器、子系统及系统与方法 |
Also Published As
Publication number | Publication date |
---|---|
CN102486752A (zh) | 2012-06-06 |
KR20120061710A (ko) | 2012-06-13 |
JP5480834B2 (ja) | 2014-04-23 |
EP2461245A2 (en) | 2012-06-06 |
US20120144082A1 (en) | 2012-06-07 |
TW201224777A (en) | 2012-06-16 |
JP2012118958A (ja) | 2012-06-21 |
EP2461245A3 (en) | 2012-11-21 |
TWI444833B (zh) | 2014-07-11 |
US8566496B2 (en) | 2013-10-22 |
KR101378270B1 (ko) | 2014-03-25 |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160721 Address after: Singapore Singapore Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd. Address before: Milpitas, California, USA Patentee before: LSI Corp. |
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TR01 | Transfer of patent right |
Effective date of registration: 20181022 Address after: Singapore Singapore Patentee after: Avago Technologies General IP (Singapore) Pte. Ltd. Address before: Singapore Singapore Patentee before: Avago Technologies General IP (Singapore) Pte. Ltd. |
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