CN102479277B - 在芯片设计中改善时序收敛的方法和系统 - Google Patents
在芯片设计中改善时序收敛的方法和系统 Download PDFInfo
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- CN102479277B CN102479277B CN201010577022.6A CN201010577022A CN102479277B CN 102479277 B CN102479277 B CN 102479277B CN 201010577022 A CN201010577022 A CN 201010577022A CN 102479277 B CN102479277 B CN 102479277B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/3312—Timing analysis
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- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
路径A-D | 连线AB | 器件G1 | 器件G2 | 器件G3 | 连线CD |
差异度 | 50ps | 200ps | 100ps | 130ps | 20ps |
路径A-D | 连线AB | 器件G1 | 器件G2 | 器件G3 | 连线CD |
差异度 | 50ps | 200ps | 100ps | 130ps | 20ps |
比例 | 10% | 40% | 20% | 26% | 4% |
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201010577022.6A CN102479277B (zh) | 2010-11-29 | 2010-11-29 | 在芯片设计中改善时序收敛的方法和系统 |
US13/296,555 US8769470B2 (en) | 2010-11-29 | 2011-11-15 | Timing closure in chip design |
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CN201010577022.6A CN102479277B (zh) | 2010-11-29 | 2010-11-29 | 在芯片设计中改善时序收敛的方法和系统 |
Publications (2)
Publication Number | Publication Date |
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CN102479277A CN102479277A (zh) | 2012-05-30 |
CN102479277B true CN102479277B (zh) | 2014-06-11 |
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CN201010577022.6A Expired - Fee Related CN102479277B (zh) | 2010-11-29 | 2010-11-29 | 在芯片设计中改善时序收敛的方法和系统 |
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US (1) | US8769470B2 (zh) |
CN (1) | CN102479277B (zh) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
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US8453089B2 (en) * | 2011-10-03 | 2013-05-28 | Globalfoundries Singapore Pte. Ltd. | Method and apparatus for pattern adjusted timing via pattern matching |
US8863058B2 (en) | 2012-09-24 | 2014-10-14 | Atrenta, Inc. | Characterization based buffering and sizing for system performance optimization |
CN103810446A (zh) * | 2012-11-15 | 2014-05-21 | 中国科学院研究生院 | 基于片上全局互连随机延时网络的物理不可克隆函数电路 |
US9760672B1 (en) | 2014-12-22 | 2017-09-12 | Qualcomm Incorporated | Circuitry and method for critical path timing speculation to enable process variation compensation via voltage scaling |
US9564884B1 (en) | 2015-04-13 | 2017-02-07 | Qualcomm Incorporated | Circuitry and method for measuring negative bias temperature instability (NBTI) and hot carrier injection (HCI) aging effects using edge sensitive sampling |
US9564883B1 (en) | 2015-04-13 | 2017-02-07 | Qualcomm Incorporated | Circuitry and method for timing speculation via toggling functional critical paths |
US9536038B1 (en) * | 2015-04-13 | 2017-01-03 | Qualcomm Incorporated | Method and algorithm for functional critical paths selection and critical path sensors and controller insertion |
US10216882B2 (en) * | 2016-11-02 | 2019-02-26 | International Business Machines Corporation | Critical path straightening system based on free-space aware and timing driven incremental placement |
US10719654B2 (en) | 2017-11-28 | 2020-07-21 | International Business Machines Corporation | Placement and timing aware wire tagging |
US10572618B2 (en) | 2017-11-28 | 2020-02-25 | International Business Machines Corporation | Enabling automatic staging for nets or net groups with VHDL attributes |
CN116776790B (zh) * | 2023-08-17 | 2023-12-08 | 华芯巨数(杭州)微电子有限公司 | 一种时序分析的快速计算方法、装置及计算机设备 |
CN117313602B (zh) * | 2023-10-17 | 2024-05-07 | 北京市合芯数字科技有限公司 | 模块边界时序约束方法及相关设备 |
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US5371851A (en) * | 1989-04-26 | 1994-12-06 | Credence Systems Corporation | Graphical data base editor |
US7020589B1 (en) | 2000-09-29 | 2006-03-28 | Lsi Logic Corporation | Method and apparatus for adaptive timing optimization of an integrated circuit design |
US6637014B2 (en) * | 2001-03-06 | 2003-10-21 | Nec Corporation | Crosstalk mitigation method and system |
US6480991B1 (en) * | 2001-04-11 | 2002-11-12 | International Business Machines Corporation | Timing-driven global placement based on geometry-aware timing budgets |
EP1449126A4 (en) * | 2001-08-29 | 2008-01-16 | Infineon Technologies Ag | CHIP DICE FOR INTEGRATED CIRCUITS |
US6614714B2 (en) * | 2002-01-22 | 2003-09-02 | Ibm Corporation | Semiconductor memory system having a data clock system for reliable high-speed data transfers |
US6920625B2 (en) * | 2003-04-24 | 2005-07-19 | International Business Machines Corporation | Method and apparatus for optimum transparent latch placement in a macro design |
US6910197B2 (en) | 2003-06-20 | 2005-06-21 | Sun Microsystems, Inc. | System for optimizing buffers in integrated circuit design timing fixes |
JP2005135229A (ja) * | 2003-10-31 | 2005-05-26 | Toshiba Corp | 半導体集積回路の自動設計方法 |
US7117457B2 (en) * | 2003-12-17 | 2006-10-03 | Sequence Design, Inc. | Current scheduling system and method for optimizing multi-threshold CMOS designs |
US20050268258A1 (en) * | 2004-06-01 | 2005-12-01 | Tera Systems, Inc. | Rule-based design consultant and method for integrated circuit design |
US7380228B2 (en) | 2004-11-08 | 2008-05-27 | Lsi Corporation | Method of associating timing violations with critical structures in an integrated circuit design |
US7251797B2 (en) * | 2004-11-22 | 2007-07-31 | Freescale Semiconductor, Inc. | Pessimism reduction in crosstalk noise aware static timing analysis |
US7853911B1 (en) * | 2005-11-04 | 2010-12-14 | Altera Corporation | Method and apparatus for performing path-level skew optimization and analysis for a logic design |
US7595675B2 (en) * | 2006-05-01 | 2009-09-29 | International Business Machines Corporation | Duty cycle measurement method and apparatus that operates in a calibration mode and a test mode |
US7774729B1 (en) * | 2006-06-02 | 2010-08-10 | Altera Corporation | Method and apparatus for reducing dynamic power in a system |
US7810053B2 (en) * | 2006-10-04 | 2010-10-05 | Michael Bushnell | Method and system of dynamic power cutoff for active leakage reduction in circuits |
JP4815326B2 (ja) | 2006-10-31 | 2011-11-16 | 富士通株式会社 | 集積回路のタイミング不良改善装置、並びに、集積回路のタイミング不良診断装置および方法、並びに、集積回路 |
US7739640B2 (en) * | 2007-01-12 | 2010-06-15 | International Business Machines Corporation | Method and apparatus for static timing analysis in the presence of a coupling event and process variation |
US7581201B2 (en) * | 2007-02-28 | 2009-08-25 | International Business Machines Corporation | System and method for sign-off timing closure of a VLSI chip |
CN101078746B (zh) * | 2007-07-11 | 2010-06-23 | 凤凰微电子(中国)有限公司 | 多芯片封装体内部连接的边界扫描测试结构及测试方法 |
US7996812B2 (en) | 2008-08-14 | 2011-08-09 | International Business Machines Corporation | Method of minimizing early-mode violations causing minimum impact to a chip design |
US8086983B2 (en) * | 2008-09-30 | 2011-12-27 | Cadence Design Systems, Inc. | Method and system for performing improved timing window analysis |
US20100153896A1 (en) | 2008-12-12 | 2010-06-17 | Lsi Corporation | Real-time critical path margin violation detector, a method of monitoring a path and an ic incorporating the detector or method |
US8219952B2 (en) * | 2009-02-23 | 2012-07-10 | Synopsys, Inc. | Variation aware victim and aggressor timing overlap detection by pessimism reduction based on relative positions of timing windows |
US8154335B2 (en) * | 2009-09-18 | 2012-04-10 | Stmicroelectronics Pvt. Ltd. | Fail safe adaptive voltage/frequency system |
US8205181B1 (en) * | 2010-03-05 | 2012-06-19 | Applied Micro Circuits Corporation | Victim net crosstalk reduction |
US8453090B2 (en) * | 2010-10-21 | 2013-05-28 | Global Unichip Corp. | System and method for optimizing logic timing |
US8689158B2 (en) * | 2010-11-11 | 2014-04-01 | International Business Machines Corporation | System and method for performing static timing analysis in the presence of correlations between asserted arrival times |
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2010
- 2010-11-29 CN CN201010577022.6A patent/CN102479277B/zh not_active Expired - Fee Related
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2011
- 2011-11-15 US US13/296,555 patent/US8769470B2/en active Active
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Publication number | Publication date |
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US8769470B2 (en) | 2014-07-01 |
US20120137263A1 (en) | 2012-05-31 |
CN102479277A (zh) | 2012-05-30 |
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