CN102474262B - 交织的流水线二进制搜索a/d转换器 - Google Patents
交织的流水线二进制搜索a/d转换器 Download PDFInfo
- Publication number
- CN102474262B CN102474262B CN201080031210.7A CN201080031210A CN102474262B CN 102474262 B CN102474262 B CN 102474262B CN 201080031210 A CN201080031210 A CN 201080031210A CN 102474262 B CN102474262 B CN 102474262B
- Authority
- CN
- China
- Prior art keywords
- comparison
- hierarchical
- analog
- level
- adc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1014—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
- H03M1/1023—Offset correction
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
- H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1235—Non-linear conversion not otherwise provided for in subgroups of H03M1/12
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
- H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
- H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal
- H03M1/445—Sequential comparisons in series-connected stages with change in value of analogue signal the stages being of the folding type
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US22451909P | 2009-07-10 | 2009-07-10 | |
| US61/224,519 | 2009-07-10 | ||
| EP10151660A EP2280486A1 (en) | 2009-07-10 | 2010-01-26 | Interleaved pipelined binary search A/D converter |
| EP10151660.7 | 2010-01-26 | ||
| PCT/EP2010/059821 WO2011003978A2 (en) | 2009-07-10 | 2010-07-08 | Interleaved pipelined binary search a/d converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102474262A CN102474262A (zh) | 2012-05-23 |
| CN102474262B true CN102474262B (zh) | 2015-06-03 |
Family
ID=42269365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201080031210.7A Active CN102474262B (zh) | 2009-07-10 | 2010-07-08 | 交织的流水线二进制搜索a/d转换器 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8618973B2 (enExample) |
| EP (2) | EP2280486A1 (enExample) |
| JP (1) | JP5558566B2 (enExample) |
| KR (1) | KR20120062695A (enExample) |
| CN (1) | CN102474262B (enExample) |
| WO (1) | WO2011003978A2 (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5652259B2 (ja) * | 2011-03-01 | 2015-01-14 | 富士通セミコンダクター株式会社 | アナログデジタル変換器 |
| US8487803B1 (en) * | 2012-01-23 | 2013-07-16 | Freescale Semiconductor, Inc. | Pipelined analog-to-digital converter having reduced power consumption |
| EP2629428A1 (en) * | 2012-02-16 | 2013-08-21 | Imec | A/D Converter and Method for Calibrating the Same |
| RU2507681C2 (ru) * | 2012-11-21 | 2014-02-20 | Гарри Романович Аванесян | Способ и устройство для выявления нелинейных искажений, вносимых аналого-цифровым преобразователем |
| US8872691B1 (en) | 2013-05-03 | 2014-10-28 | Keysight Technologies, Inc. | Metastability detection and correction in analog to digital converter |
| US9600999B2 (en) | 2014-05-21 | 2017-03-21 | Universal City Studios Llc | Amusement park element tracking system |
| CN104702285B (zh) | 2014-12-26 | 2018-10-12 | 华为技术有限公司 | 一种模数转换器及模数转换方法 |
| US9628302B2 (en) * | 2015-05-21 | 2017-04-18 | International Business Machines Corporation | Decision feedback equalizer |
| US9819314B1 (en) * | 2017-01-31 | 2017-11-14 | Board Of Regents, The University Of Texas System | Method and circuit for PVT stabilization of dynamic amplifiers |
| CN108647406B (zh) * | 2018-04-24 | 2024-08-23 | 北京新岸线移动多媒体技术有限公司 | 一种流水线模数转换器中各级电路的设计方法 |
| US10720934B1 (en) * | 2019-02-28 | 2020-07-21 | Nxp Usa, Inc. | MDAC based time-interleaved analog-to-digital converters and related methods |
| CN111865315B (zh) * | 2020-07-13 | 2022-07-26 | 同济大学 | 一种适用于流水线flash ADC的比较器电路 |
| CN112422130B (zh) * | 2020-11-26 | 2022-07-01 | 重庆邮电大学 | 一种基于全动态结构的低功耗Binary-Search ADC系统 |
| US11387842B1 (en) * | 2021-03-10 | 2022-07-12 | Robert Bosch Gmbh | System AMD method for a self-calibrating pipelined dynamic preamplifier for high speed comparators in a time-interpolating flash ADC |
| CN115694494A (zh) * | 2021-07-23 | 2023-02-03 | 三星电子株式会社 | 模数转换器及其操作方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050062635A1 (en) * | 2003-09-23 | 2005-03-24 | Alcatel | Pipeline analog to digital converter |
| EP1679799A1 (en) * | 2003-10-21 | 2006-07-12 | Fujitsu Limited | D/a conversion circuit and a/d conversion circuit |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5579006A (en) * | 1993-12-28 | 1996-11-26 | Nec Corporation | A/D converter |
| US6169502B1 (en) * | 1998-05-08 | 2001-01-02 | Cirrus Logic, Inc. | Pipelined analog-to-digital converter (ADC) systems, methods, and computer program products |
| US6781531B2 (en) * | 2002-01-15 | 2004-08-24 | Raytheon Company | Statistically based cascaded analog-to-digital converter calibration technique |
| EP1627266A1 (en) * | 2003-05-27 | 2006-02-22 | Georgia Tech Research Corporation | Floating-gate reference circuit |
| US7106230B2 (en) * | 2004-06-17 | 2006-09-12 | Kenet, Inc. | Analog to digital converter calibration via synchronous demodulation |
| US7012559B1 (en) * | 2004-09-24 | 2006-03-14 | Broadcom Corporation | Hierarchical parallel pipelined operation of analog and digital circuits |
| US7656340B2 (en) * | 2008-06-06 | 2010-02-02 | Lsi Corporation | Systems and methods for pipelined analog to digital conversion |
-
2010
- 2010-01-26 EP EP10151660A patent/EP2280486A1/en not_active Withdrawn
- 2010-07-08 WO PCT/EP2010/059821 patent/WO2011003978A2/en not_active Ceased
- 2010-07-08 EP EP10736647.8A patent/EP2452437B1/en active Active
- 2010-07-08 JP JP2012518996A patent/JP5558566B2/ja active Active
- 2010-07-08 CN CN201080031210.7A patent/CN102474262B/zh active Active
- 2010-07-08 KR KR1020127002931A patent/KR20120062695A/ko not_active Withdrawn
- 2010-07-08 US US13/382,735 patent/US8618973B2/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050062635A1 (en) * | 2003-09-23 | 2005-03-24 | Alcatel | Pipeline analog to digital converter |
| EP1679799A1 (en) * | 2003-10-21 | 2006-07-12 | Fujitsu Limited | D/a conversion circuit and a/d conversion circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20120062695A (ko) | 2012-06-14 |
| US8618973B2 (en) | 2013-12-31 |
| EP2452437B1 (en) | 2014-03-05 |
| WO2011003978A2 (en) | 2011-01-13 |
| CN102474262A (zh) | 2012-05-23 |
| JP2012533200A (ja) | 2012-12-20 |
| EP2452437A2 (en) | 2012-05-16 |
| JP5558566B2 (ja) | 2014-07-23 |
| WO2011003978A3 (en) | 2011-08-11 |
| US20120133535A1 (en) | 2012-05-31 |
| EP2280486A1 (en) | 2011-02-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102474262B (zh) | 交织的流水线二进制搜索a/d转换器 | |
| US8957794B2 (en) | A/D converter and method for calibrating the same | |
| Verbruggen et al. | A 2.6 mW 6 bit 2.2 GS/s fully dynamic pipeline ADC in 40 nm digital CMOS | |
| Brooks et al. | A zero-crossing-based 8-bit 200 MS/s pipelined ADC | |
| Harpe | Successive approximation analog-to-digital converters: Improving power efficiency and conversion speed | |
| US7764215B2 (en) | Multi-stage comparator with offset canceling capacitor across secondary differential inputs for high-speed low-gain compare and high-gain auto-zeroing | |
| Shin et al. | A fully-differential zero-crossing-based 1.2 V 10b 26MS/s pipelined ADC in 65nm CMOS | |
| US9654126B2 (en) | Systems and methods for providing a pipelined analog-to-digital converter | |
| US7652600B2 (en) | A/D converter comprising a voltage comparator device | |
| US9621145B2 (en) | Sense amplifier latch with offset correction | |
| TWI677194B (zh) | 用於類比數位轉換器殘餘放大器的增益校準裝置及方法 | |
| Hao et al. | A 14b 180MS/s pipeline-SAR ADC with adaptive-region-selection technique and gain error calibration | |
| US8242946B2 (en) | Pipelined analog-to-digital converter | |
| Pelgrom | Nyquist analog-to-digital conversion | |
| Minh et al. | A design of 10-bit 25-MS/s SAR ADC using separated clock frequencies with high speed comparator in 180nm CMOS | |
| US7948410B2 (en) | Multibit recyclic pipelined ADC architecture | |
| Fu | High-Speed Successive Approximation Register (SAR) ADC Design with Multiple Concurrent Comparators | |
| Harpe et al. | Analog calibration of mismatches in an open-loop track-and-hold circuit for time-interleaved ADCs | |
| CN111147077B (zh) | 用于模拟数字转换器残余放大器的增益校准装置及方法 | |
| Sung et al. | A 9-bit 123-MS/s swiched-current pipelined ADC with OP feedback and offset current cancellation | |
| Pelgrom | Pipeline Analog-to-Digital Conversion | |
| Kaur | A Multiplying Digital to Analog Converter Insensitive to Component Mismatch | |
| Hermansen | High-Speed SAR ADC Design in SIGE BiCMOS Technology | |
| Kilic et al. | A pipelined speed enhancement technique for CDAC-threshold configuring SAR ADC | |
| Silva | Pipelined Analog-To-Digital Conversion Using Current-Mode Reference Shifting |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |