CN102437085A - Manufacturing method of mechanical uniaxial strain SOI (silicon-on-insulator) wafer - Google Patents
Manufacturing method of mechanical uniaxial strain SOI (silicon-on-insulator) wafer Download PDFInfo
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- CN102437085A CN102437085A CN2011103615127A CN201110361512A CN102437085A CN 102437085 A CN102437085 A CN 102437085A CN 2011103615127 A CN2011103615127 A CN 2011103615127A CN 201110361512 A CN201110361512 A CN 201110361512A CN 102437085 A CN102437085 A CN 102437085A
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Abstract
The invention discloses a manufacturing method of a mechanical uniaxial strain SOI (silicon-on-insulator) wafer. The method comprises the following steps: 1) putting an SOI wafer on a cambered bending table, wherein the top layer (Si layer surface) of the SOI wafer faces up or down; 2) respectively horizontally putting two cylindrical stainless steel pressure bars on both ends of the SOI wafer, wherein the two cylindrical stainless steel pressure bars are respectively 1cm away from the edge of the SOI wafer; 3) slowly rotating a screw cap which connects the pressure bars, so that the SOI wafer is gradually bent along the cambered table until the SOI wafer is completely laminated on the cambered table; 4) putting the cambered bending table carrying the SOI wafer in an annealing furnace, and carrying out annealing; 5) after the annealing finishes, slowly cooling to room temperature, and taking out the cambered bending table carrying the SOI wafer; and 6) rotating the screw cap which connects the pressure bars, and slowly elevating the pressure bars until the bent SOI wafer restores to the original state. The invention has the advantages of 1) favorable strain effect, 2) small surface roughness, 3) fewer surface defects, 4) favorable thermal properties, 5) high electric properties, 6) high yield, 7) wide annealing temperature range, 8) simple manufacturing technique, 9) fewer manufacturing devices which can be self-made, 10) low manufacturing cost and 11) accessible raw materials.
Description
Technical field
The invention belongs to microelectronics technology; Relate to semiconductor substrate materials manufacture craft technology; The manufacture method of a kind of specifically uniaxial strain SOI (Silicon On Insulater, silicon on the insulating barrier) wafer can be used for making ultrahigh speed, low-power consumption, anti-irradiation semiconductor device and the required SOI wafer of integrated circuit; Can significantly improve the electron mobility and the hole mobility of traditional SOI wafer, overcome the High-Field degeneration that traditional double axial strain SOI mobility promotes.With existing uniaxial strain SOI compared with techniques, the present invention has the variation of answering height, technology is simple, rate of finished products is high, low cost and other advantages.
Background technology
With body Si compared with techniques, the SOI technology has speed height, low in energy consumption, advantage such as integration density is high, parasitic capacitance is little, anti-irradiation ability is strong, technology is simple, is widely used at devices such as high speed, low-power consumption, anti-irradiation and circuit field.
Along with device feature size gets into sub-micron and deep-submicron, Si mobility of charge carrier rate has limited the speed of device and circuit, can't satisfy the demand of high-speed high frequency and low-voltage and low-power dissipation.And the electronics of strain Si and hole mobility, in theory with being 2 times and 5 times of body Si respectively, the frequency of boost device and circuit and speed greatly.At present, strain Si technology is widely used in 65 nanometers and the following Si integrated circuit technology.
In conjunction with the strained-soi technology of strain Si and SOI taken into account characteristics and the technical advantage of strain Si and SOI well; And it is compatible fully with traditional Si technology; Be the selection process of high speed, low power consumption integrated circuit, become the key technology of 21 century continuity Moore's Law.
Traditional strained-soi is based on the biaxial strain of SGOI (germanium silicon on the insulating barrier) wafer, promptly earlier on the SOI wafer epitaxial growth one thick relaxation SiGe layer as empty substrate, the required strain Si layer of epitaxial growth on relaxation SiGe layer again.The major defect of tradition strained-soi is that the mobility of the heat radiation that increased hot expense and cost of manufacture, the empty substrate of SiGe and had a strong impact on device and circuit of the empty substrate of high, the thick SiGe of roughness, biaxial strain Si is lifted under the high electric field degeneration etc.
In order to overcome the shortcoming of traditional strained-soi, C.Himcinschi has proposed the manufacturing technology of uniaxial strain SOI wafer in 2007, referring to [1] C.Himcinschi., I.Radu; F.Muster, R.SiO2gh, M.Reiche; M.Petzold, U.Go ¨ sele, S.H.Christiansen; Uniaxially strained sil icon by wafer bonding and layer transfer, Solid-State Electronics, 51 (2007) 226-230; [2] C.Himcinschi; M.Reiche; R.Scholz; S.H.Christiansen; And U.
Compressive uniaxially strained silicon on insulator by prestrained wafer bonding and layer transferAPPLIED, PHYSICS LETTERS 90,231909 (2007).Technological principle and step that this is technological are as depicted in figs. 1 and 2, and the manufacturing process steps of its single shaft tensile strain SOI is described below:
1,, again this oxidation sheet is injected H+ (hydrogen ion) earlier with 4 inches Si sheet 1 thermal oxidations.
2, will annotate H
+Oxidation sheet 1 be placed on the arc-shaped bend platform,, fit tightly its bending through outer depression bar with the arc table top; Subsequently 3 inches Si sheets 2 are placed on the crooked notes H+ oxidation sheet 1 along the same flex direction, with its bending, fit tightly with oxidation sheet 1 through interior depression bar;
3, crooked platform is placed in the annealing furnace, annealing is 15 hours under 200oC.
4, take off crooked and two Si wafers of bonding from crooked platform, be reentered in the annealing furnace,, accomplish smart peeling, and finally form uniaxial strain SOI wafer 500 ℃ of annealing 1 hour down.
Compare with the present invention, this method has following some major defect: 1) processing step is complicated: this method must experience thermal oxidation, H
+Ion injects, peels off requisite main technique and correlation step thereof such as annealing.2) flexure temperature is limited: owing to be to close and crooked annealing at the smart peeling line unit that advances, the restriction of being annotated the H+ exfoliation temperature, its crooked annealing temperature can not be higher than 300 ℃, otherwise will in crooked annealing process, peel off, and makes the fragmentation of Si sheet.3) fabrication cycle is long: extra thermal oxidation, H
+Ion injects, peels off the time that processing step such as annealing has increased its making.4) rate of finished products is low: this method is to carry out mechanical bend and bonding with two overlapping silicon wafer, and under case of bending, carries out high temperature again and peel off, and silicon wafer is easy to fragmentation.
Summary of the invention
The objective of the invention is to overcome the deficiency of above-mentioned prior art; The manufacture method that a kind of machinery causes uniaxial strain SOI wafer is proposed; With the cost of manufacture that reduces the strained-soi wafer, heat dispersion, insulation property and the integrated level that improves strained-soi device and integrated circuit, satisfy microelectronics technology, particularly ultrahigh speed, low-power consumption, anti-irradiation and high power device and integrated circuit demand to the strained-soi wafer.Adopt following technical scheme:
A kind of machinery causes the manufacture method of uniaxial strain SOI wafer, may further comprise the steps: 1) SOI wafer top layer Si aspect is placed on the arc-shaped bend platform up or down; 2) two cylindrical depression bars lie in a horizontal plane in SOI wafer two ends respectively, the 1cm apart from the SOI edge; 3) slow turn connects the nut of depression bar, makes the SOI wafer crooked gradually along the arc table top, the complete and arc table top applying until the SOI wafer; 4) the arc-shaped bend platform that is loaded with the SOI wafer is placed in the annealing furnace anneals, and annealing temperature can be selected arbitrarily in 200 ℃ to 1250 ℃ scopes.For example, can anneal 10 hours down, also can anneal 2.5 hours down at 800 ℃ at 200 ℃; 5) annealing slowly is cooled to room temperature after finishing, and takes out the arc-shaped bend platform that is loaded with the SOI sheet; 6) turn connects the nut of depression bar, depression bar is slowly promoted, until the reinstatement of the SOI of bending wafer.Being loaded with temperature that the crooked platform of SOI wafer anneals minimum in annealing furnace is 200 ℃, to guarantee the SiO in the SOI wafer
2The deformation of enterree in this process can surpass its yield strength, and plastic deformation takes place; The highest annealing temperature is 1250 ℃, near the fusing point of Si; But the highest annealing temperature must not be higher than the deformation temperature of mechanical bend platform.
Described manufacture method, the radius of curvature of described arc-shaped bend platform can change from 1.2m to 0.4m continuously, the uniaxial strain SOI wafer of the differently strained amount of its respective production.
Described manufacture method, the annealing process of said step 4) is: annealed 10 hours down at 200 ℃; Perhaps annealed 2.5 hours down at 800 ℃; Perhaps annealed 1.5 hours down at 1250 ℃.
Described manufacture method, said SOI wafer are 3 inches, 4 inches, 5 inches, 6 inches, 8 inches, 12 inches, 16 inches SOI wafer.
Know-why of the present invention:
The SOI sheet top layer Si aspect of finished product upwards is placed on carries out mechanical bend, thermal annealing then on the circular arc table top.According to material plastoelasticity principle, receive the effect of long-time crooked thermomechanical treatment, be in the SiO on SOI wafer neutral surface top
2Layer and top layer Si layer will be along bending direction generation uniaxial tensile deformations, and its lattice constant will become greatly, and so-called single shaft tensile strain promptly takes place.Simultaneously, in SOI wafer internal reservoir certain elastic potential energy.After annealing finished to remove mechanical external force, under this elastic potential energy effect, resilience can take place in the SOI wafer, promptly is returned to ortho states by case of bending, and was as shown in Figure 3.
But the top layer Si layer has kept a certain amount of tensile strain in the SOI wafer that restores.This is because when crooked thermal anneal process, has set suitable annealing temperature and time, guarantees that the mechanical external force that is applied can surpass SiO
2The yield strength of layer but, make SiO less than the yield strength of Si substrate
2Plastic deformation takes place in layer, and the Si substrate is elastic deformation all the time.The SiO of plastic deformation
2Enterree is resilience fully when the resilience of SOI wafer is restored, and still keeps a certain amount of tensile strain.And the top layer Si layer receives plastic deformation SiO
2The effect that pulls and supports of enterree, resilience fully finally forms single shaft tensile strain SOI wafer.
In like manner; Circular arc table top on carry out mechanical bend and thermal annealing as if SOI wafer top layer Si aspect is placed on downwards, because the top layer Si layer is in the bottom of SOI wafer neutral surface, its lattice will be compressed when bending is annealed; Lattice constant diminishes, and finally can obtain single shaft compressive strain SOI wafer.
With respect to existing uniaxial strain SOI technology, the present invention has the following advantages:
1. strain effects is good: with existing similar compared with techniques, under the same flexibility, dependent variable of the present invention is high, thereby can obtain higher electron mobility and hole mobility.
2. surface roughness is little: the present invention need not to make strained-soi through stripping technology, thus the surface roughness of its top layer Si film monocrystalline much smaller than with existing similar technique.
3. few surface defects: compare based on the twin shaft compressive strain SOI wafer of the empty substrate of SiGe with tradition, the present invention need not heteroepitaxial growth SiGe virtual substrate, does not have the formed misfit dislocation of heteroepitaxial growth.
4. hot property is good: compare with the strained-soi wafer based on the empty substrate of SiGe that traditional C VD (chemical vapor deposition) extension is made; The uniaxial strain SOI wafer that the present invention makes does not have thick SiGe resilient coating; Both can reduce the hot expense of device and circuit greatly, help the heat radiation of its device and circuit again.
5. electric property is high: compare based on the biaxial strain SOI wafer of the empty substrate of SiGe with tradition, the strained-soi wafer that the present invention makes is a uniaxial strain, thereby the electronics of its device and circuit and the enhancing of mobility performance are not only high, and under high electric field, does not degenerate.
6. rate of finished products is high: prior art adopts two Si wafers to carry out the crooked annealing of bonding, and under case of bending, peels off through high temperature and obtain uniaxial strain SOI, thereby the Si sheet is very easy to broken.And the present invention only carries out bending annealing with the SOI wafer of a slice finished product and obtains uniaxial strain SOI, is difficult for brokenly, thereby rate of finished products is high.
7. annealing region is big: 200 ℃ to 300 ℃ annealing regions of existing relatively uniaxial strain SOI technology, annealing temperature of the present invention from minimum 200 ℃ to the highest 1250 ℃, can select arbitrarily.
8. manufacture craft is simple: with existing similar compared with techniques, do not have extra technologies such as thermal oxidation, ion inject, high temperature is peeled off, mechanical bend and thermal annealing twice technical process are only arranged.
9. equipment is few and can make by oneself: only need crooked platform and two equipment of annealing furnace can realize the present invention, and crooked platform can be made by oneself.
10. cost of manufacture is low: because manufacture craft is simple, equipment investment is few, thereby cost of manufacture is low.
11. raw material is easy to get: different with existing similar technique, the present invention adopts finished product SOI wafer, on market, can buy in batch at any time, greatly reduces process complexity and equipment cost.
Description of drawings
Fig. 1 is existing single shaft tensile strain SOI principle and processing step;
Fig. 2 is existing single shaft compressive strain SOI principle and processing step;
Fig. 3 is single shaft tensile strain SOI wafer manufacturing principle of the present invention and processing step;
Fig. 4 is single shaft compressive strain SOI wafer manufacturing principle of the present invention and processing step;
The 1-Si substrate, 2-SiO
2Enterree, 3-top layer Si layer.
Embodiment
Below in conjunction with specific embodiment, the present invention is elaborated.
The preparation of embodiment 1:4 inch uniaxial strain SOI wafer
1, the SOI wafer is selected: 4 inches (100) or (11O) wafer ((100) or (110) refer to certain crystal face of SOI wafer plane of crystal), the thick 0.4mm of Si substrate, SiO
2The thick 500nm of enterree, the thick 500nm of top layer Si.
The SOI diameter wafer is selected: the diameter of SOI wafer is big more, and its crooked minimum bending radius is just more little, and the dependent variable of the uniaxial strain SOI wafer that obtains is also just big more, and the electron mobility of final uniaxial strain SOI wafer and the enhancing of hole mobility are also just high more.For made of the present invention based on SiO
2The uniaxial strain SOI wafer of enterree according to the different process of its SOI device and circuit, can be selected the different-diameter SOI wafer from 3 inches to 16 inches.
SOI wafer crystal face and crystal orientation are selected: for the tensile strain SOI wafer of made of the present invention; Should select (100) crystal face; Bending direction should be selected < 110>crystal orientation, and (< 110>refer to certain crystal orientation of wafer surface; Usually also be the channel direction of device), can obtain maximum electron mobility and promote.For the compressive strain SOI wafer of made of the present invention, should select (110) crystal face, bending direction should be selected < 100>crystal orientation, can obtain maximum hole mobility and promote.
SOI wafer Si substrate thickness is selected: the thickness of Si substrate is thin more, and the minimum bending radius of its SOI wafer is just little, and the dependent variable of the single shaft tensile strain SOI wafer that obtains is also just big more.For made of the present invention based on SiO
2The uniaxial strain SOI wafer of enterree according to the different structure and the technology thereof of its SOI device and circuit, can be selected the SOI wafer of different Si substrate thickness.
SOI wafer top layer Si layer thickness is selected: according to the different structure of its SOI device and circuit, can select the SOI wafer of different top layer Si layer thickness.If made of the present invention based on SiO
2The tensile strain SOI wafer of enterree is applied to PD (partly exhausting) SOI device and circuit, then requires top layer Si thickness between 150nm-500nm; If be applied to FD (exhausting entirely) strained-soi device and circuit, then require top layer Si thickness between 10nm-50nm;
SOI wafer SiO
2Enterree thickness is selected: according to the different structure of SOI device and circuit, can select different SiO
2The SOI wafer of thickness of insulating layer.If made of the present invention based on SiO
2The tensile strain SOI wafer of enterree is applied to PD SOI device and circuit, then requires SiO
2Thickness of insulating layer is between 200nm-400nm; If be applied to FD SOI device and circuit, then require SiO
2Thickness of insulating layer is between 50nm-200nm;
Crooked platform material is selected: crooked platform material mainly is to select according to annealing temperature, guarantee that crooked platform is indeformable under the highest annealing temperature.For the present invention adopted based on SiO
2The SOI wafer of enterree, its highest annealing temperature is 1250 ℃, therefore crooked platform material should adopt resistant to elevated temperatures metal molybdenum.
2, crooked platform radius of curvature is selected: according to the SOI wafer of selecting, selecting crooked platform radius of curvature is 1m.The radius of curvature of crooked platform is to select according to the diameter and the thickness of SOI wafer.Under the identical SOI wafer size, the minimum bending radius of thin SOI wafer is littler than thick SOI wafer.Under the same thickness, the minimum bending radius of large scale SOI wafer is littler than small size SOI wafer.For made of the present invention based on SiO
2The tensile strain SOI wafer of enterree; The bending radius scope of its 3 inches SOI wafers is 0.6m-1.2m; The bending radius scope of its 4 inches SOI wafers is 0.5m-1.2m, and the bending radius scope of its 6 inches SOI wafers is 0.55m-1.2m, and its 8 inches SOI wafer bending radius scopes are 0.45m-1.2m;, its 12 inches SOI wafer bending radius scopes are 0.4m-1.2m.
3, SOI wafer bending process step:
1) with SOI wafer top layer Si aspect upwards (or, upwards be tensile strain downwards,, be compressive strain downwards like Fig. 3, like Fig. 4, down with) be placed on the arc-shaped bend platform, its bending direction is parallel with < 110>or < 100>direction;
2) two cylindrical horizontal depression bars on the crooked platform lie in a horizontal plane in SOI wafer two ends respectively, apart from 1 centimetre at its edge;
3) the push rod nut of one of them depression bar on the crooked platform of turn makes SOI wafer one end fixing earlier;
4) the slow push rod nut of another depression bar of turn again makes the SOI wafer crooked gradually along arc-shaped bend platform table top, until the SOI wafer fully and arc-shaped bend platform table top fit fully.
4, annealing process step:
1) annealing temperature: 200 ℃;
2) heating rate: 5 ℃/minute;
3) annealing time: 10 hours;
4) rate of temperature fall: 5 ℃/minute;
5, unload frame: treat that furnace temperature reduces to room temperature, take out crooked platform.The push rod nut of two depression bars in the crooked platform two ends of simultaneously slow turn slowly promotes horizontal struts simultaneously, breaks away from the SOI wafer fully until depression bar.
Through above-mentioned processing step, can obtain 4 inches uniaxial strain SOI wafers.
The preparation of embodiment 2:6 inch uniaxial strain SOI wafer
1, the SOI wafer is selected: 6 inches (100) or (110) crystal face, the thick 0.55mm of Si substrate, SiO
2The thick 300nm of enterree, top layer Si bed thickness 50nm.
2, the bending curvature radius is selected: according to the SOI wafer of selecting, selecting crooked platform radius of curvature is 0.75m.
3, SOI wafer bending process step:
1) SOI wafer top layer Si is placed on the crooked platform of cleaning towards last (or downwards), its < 110>or < 100>direction are parallel with bending direction, like Fig. 3 or shown in Figure 4;
2) two cylindrical horizontal depression bars on the crooked platform lie in a horizontal plane in SOI wafer two ends respectively, apart from 1 centimetre at its edge;
3) the push rod nut of one of them depression bar on the crooked platform of turn makes SOI wafer one end fixing earlier;
4) the slow push rod nut of another depression bar of turn again makes the SOI wafer crooked gradually along arc-shaped bend platform table top, until the SOI wafer fully and arc-shaped bend platform table top fit fully.
4, annealing process step:
1) annealing temperature: 800 ℃;
2) heating rate: 4 ℃/minute;
3) annealing time: 2.5 hours;
4) rate of temperature fall: 4 ℃/minute;
5, unload frame: treat that furnace temperature reduces to room temperature, take out crooked platform.The push rod nut of two depression bars in the crooked platform two ends of simultaneously slow turn slowly promotes horizontal struts simultaneously, breaks away from the SOI wafer fully until depression bar.
Through above-mentioned processing step, can obtain 6 inches uniaxial strain SOI wafers.
The preparation of embodiment 3:8 inch uniaxial strain SOI wafer
1, the SOI wafer is selected: 8 inches (100) or (110) crystal face, the thick 0.68mm of Si substrate, SiO
2The thick 1000nm of enterree, top layer Si bed thickness 1000nm.
2, the bending curvature radius is selected: according to the SOI wafer of selecting, selecting crooked platform radius of curvature is 0.5m.
3, SOI wafer bending process step:
1) with SOI wafer top layer Si aspect upwards (or downwards) be placed on the arc-shaped bend platform, its bending direction is parallel with < 110>or < 100>direction, like Fig. 3 or shown in Figure 4;
2) two cylindrical horizontal depression bars on the crooked platform lie in a horizontal plane in SOI wafer two ends respectively, apart from 1 centimetre at its edge;
3) the push rod nut of one of them depression bar on the crooked platform of turn makes SOI wafer one end fixing earlier;
4) the slow push rod nut of another depression bar of turn again makes the SOI wafer crooked gradually along arc-shaped bend platform table top, until the SOI wafer fully and arc-shaped bend platform table top fit fully.
4, annealing process step:
1) annealing temperature: 1250 ℃;
2) heating rate: 3 ℃/minute;
3) annealing time: 1.5 hours;
4) rate of temperature fall: 3 ℃/minute;
5, unload frame: treat that furnace temperature reduces to room temperature, take out crooked platform.The push rod nut of two depression bars in the crooked platform two ends of simultaneously slow turn slowly promotes horizontal struts simultaneously, breaks away from the SOI wafer fully until depression bar.
Through above-mentioned processing step, can obtain 8 inches uniaxial strain SOI wafers.
In order to make narration of the present invention more clear, below will make specifying to many details.For example concrete structure, composition, material, size, technical process and technology.
The used arc-shaped bend platform of the present invention adopts the metal molybdenum material, and this is indeformable under the highest annealing temperature in order to guarantee crooked platform.In addition, the used crooked platform of the present invention can adopt also that other are easy to machining, fineness is higher and resistant to elevated temperatures all materials are made.
Strained-soi wafer base semiconductor substrate 1 of the present invention can be other semi-conducting materials also, like all possible semi-conducting materials such as Ge, GaAs.
Strained-soi wafer top layer semi-conducting material 3 of the present invention is not limited to the Si semi-conducting material, also SiGe, Ge, GaAs etc. all be fit to make semi-conducting materials of SOI wafer top layer semiconductive thin films.
The SOI wafer that any process is made all is suitable for the present invention and makes uniaxial strain SOI wafer, these processes comprise smart peeling (Smart-cut), annotate oxygen isolate (SIMOX), bonding and back of the body corrosion (BESOI), layer transfer (ELRANT), based on the epitaxial growth of SOI wafer etc.
The selection principle of crooked annealing temperature of the present invention and annealing time is to guarantee SiO in the SOI crystal circle structure
2Plastic deformation takes place in film in annealing process, but the Si substrate in the SOI wafer in annealing elastic deformation can only take place.Therefore, according to SiO
2The Material Thermodynamics characteristic of film, its minimum annealing temperature must not be lower than 200 ℃.-and according to the thermodynamic behaviour of the Si backing material of SOI wafer, its highest annealing temperature can reach 1250 ℃, near the fusing point of Si.But the highest annealing temperature must be considered the thermodynamic property of crooked platform material, can not be higher than its deformation temperature.
Detailed description of the present invention and describing all based on the optimization test scheme, but person of skill in the art will appreciate that above-mentioned variation with other forms and details can't depart from essence of the present invention and scope.To those skilled in the art; After having understood content of the present invention and principle; Can be under the situation that does not deviate from the principle and scope of the present invention; Carry out various corrections and change on form and the details according to the method for the invention, but these are based on correction of the present invention with change still within claim protection range of the present invention.
Claims (4)
1. a machinery causes the manufacture method of uniaxial strain SOI wafer, it is characterized in that may further comprise the steps: 1) SOI wafer top layer Si aspect is placed on the arc-shaped bend platform up or down; 2) two cylindrical stainless steel depression bars lie in a horizontal plane in SOI wafer two ends respectively, apart from SOI crystal round fringes 1cm; 3) slow turn connects the nut of depression bar, makes the SOI wafer crooked gradually along the arc table top, the complete and arc table top applying until the SOI wafer; 4) the arc-shaped bend platform that is loaded with the SOI wafer is placed in the annealing furnace anneals, and annealing temperature can be selected arbitrarily in 200 ℃ to 1250 ℃ scopes; 5) annealing slowly is cooled to room temperature after finishing, and takes out the arc-shaped bend platform that is loaded with the SOI wafer; 6) turn connects the nut of depression bar, depression bar is slowly promoted, until the reinstatement of the SOI of bending wafer.
2. manufacture method according to claim 1 is characterized in that, the radius of curvature of described crooked platform can change from 1.2m to 0.4m continuously, the uniaxial strain SOI wafer of the differently strained amount of its respective production; Crooked platform material adopts the metal molybdenum material.
3. manufacture method according to claim 1 is characterized in that, the annealing process of said step 4) is: annealed 10 hours down at 200 ℃; Perhaps annealed 2.5 hours down at 800 ℃; Perhaps annealed 1.5 hours down at 1250 ℃.
4. manufacture method according to claim 1 is characterized in that, said SOI wafer is 3 inches, 4 inches, 5 inches, 6 inches, 8 inches, 12 inches, 16 inches a SOI wafer.
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| Title |
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| 肖哲: "晶圆级机械致单轴应变Si技术研究", 《中国优秀硕士学位论文全文数据库》 * |
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