CN102543719B - Manufacture method of uniaxial strain silicon germanium on insulator (SGOI) wafer on aluminum nitride (AIN) embedded insulating barrier based on mechanical bending table - Google Patents
Manufacture method of uniaxial strain silicon germanium on insulator (SGOI) wafer on aluminum nitride (AIN) embedded insulating barrier based on mechanical bending table Download PDFInfo
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Abstract
The invention discloses a manufacture method of a uniaxial strain silicon germanium on insulator (SGOI) wafer on an aluminum nitride (AIN) embedded insulating barrier based on a mechanical bending table, which comprises the steps as follows, (1) a top layer silicon-germanium (SiGe) layer face of the SGOI wafer is upwards or downwards placed on the mechanical bending table; (2) two cylindrical stainless steel compression bars are respectively and horizontally placed at two ends of the SGOI wafer and 1cm away from the edge of the SGOI wafer; (3) a nut connected with the compression bars is slowly rotated to enable the SGOI wafer to bend gradually along an arc-shaped table face until the SGOI wafer is completely fitted with the arc-shaped table face; (4) the arc-shaped bending table loaded with the SGOI wafer is placed in an annealing furnace for annealing; (5) the temperature is reduced to the room temperature after completion of annealing, and the arc-shaped bending table loaded with the SGOI wafer is taken out; and (6) the nut connected with the compression bars is rotated to slowly life the compression bars until bending SGOI wafer is reinstated. The manufacture method has the following advantages of being (1) low in manufacture cost, (2) simple in manufacture equipment and process, (3) high in strain effect, (4) excellent in insulativity and thermal property, (5) high in rate of finished products, and (6) large in annealing temperature range.
Description
Technical field
The invention belongs to microelectronics technology, relate to semi-conducting material manufacturing technology.A kind of uniaxial strain SGOI (Silicon Germanium On Insulater based on AlN (aluminium nitride) enterree specifically, germanium silicon on insulating barrier) new method of wafer manufacturing, can be used for making the required SGOI wafer of ultrahigh speed, low-power consumption, anti-irradiation semiconductor device and integrated circuit, can significantly strengthen electron mobility and the hole mobility of SGOI wafer, improve the electric property of SGOI device and circuit.
Background technology
Strain SiGe (germanium silicon) so that its device is high with the operating frequency of circuit, power consumption is little, more inexpensive than GaAs, with the plurality of advantages such as Si CMOS process compatible, cost are low, have a wide range of applications and competitive advantage at industrial fields such as microwave device, mobile communication, high-frequency circuits.Still extremely excellent photoelectric material of SiGe, has a wide range of applications at aspects such as detector, modulator, fiber waveguide, optical transmitting set, solar cell, photoelectricity are integrated.
Compared with body Si, SOI (Silicon On Insulater, silicon on insulating barrier) device and circuit have low in energy consumption, antijamming capability is strong, integration density is high, speed is high, parasitic capacitance is little, technique is simple, Radiation hardness is strong, and can thoroughly eliminate the advantage such as latch-up of Bulk CMOS, being widely used at the devices such as high speed, low-power consumption, anti-irradiation and circuit field, is the developing direction of 21 century Si integrated circuit technique.
SSGOI (Strained Silicon Germanium On Insulater, strained SiGe on insulating barrier) combine the advantage of strain SiGe and SOI, provide a kind of new solution for researching and developing novel ultrahigh speed, low-power consumption, radioresistance, high integration silicon-based devices and chip, also there is important application prospect the aspect such as, system level chip integrated at photoelectricity.
Normally SiO of the enterree of SGOI wafer
2(silicon dioxide), its thermal conductivity is only one of percentage of silicon, hindered SGOI in high temperature, application aspect high-power; Its dielectric constant is only 3.9, easily causes signal transmission to be lost, and has also hindered the application of SGOI in high density, high power integrated circuit.(be SiO and AlN has thermal conductivity high
2200 times), high, the chemistry of resistivity large (320W/mK), disruptive field intensity and the excellent properties such as thermal stability is good, thermal coefficient of expansion is close with Si, be a kind of more excellent dielectric and insulating material.Replace SiO with AlN
2sGOI there is better insulating properties and thermal diffusivity, be widely used in high temperature, large power consumption, high power integrated circuit.
Traditional strain SGOI is the Biaxial Compressive strain based on SOI wafer, i.e. direct growth strain SiGe on SOI wafer, or the SiGe layer of the Ge content gradually variational of first growing on SOI wafer makes empty substrate, then on this SiGe layer the required strain SiGe layer of epitaxial growth.The major defect of tradition strain SGOI is that dislocation density is high, can only to be that Biaxial Compressive strain, mobility promote not high, the empty substrate of SiGe has increased hot expense and cost of manufacture, the empty substrate of SiGe have had a strong impact on device and circuit heat radiation, strain SiGe layer critical thickness are subject to that Ge component limits, hole mobility lifting under High-Field can be degenerated etc.
C.Himcinschi has proposed the manufacturing technology of uniaxial strain SOI wafer in 2007, referring to [1] C.Himcinschi., I.Radu, F.Muster, R.AlNgh, M.Reiche, M.Petzold, U.Go ¨ sele, S.H.Christiansen, Uniaxially strained silicon by wafer bonding and layer transfer, Solid-State Electronics, 51 (2007) 226-230; [2] C.Himcinschi, M.Reiche, R.Scholz, S.H.Christiansen, and U.
compressive uniaxially strained silicon on insulator by prestrained wafer bonding and layer transferAPPLIED, PHYSICS LETTERS 90,231909 (2007).As depicted in figs. 1 and 2, the manufacturing process steps of its single shaft tensile strain SOI is described below for the technological principle of this technology and step:
1. inject H by 4 inches of Si wafer 1 thermal oxidations, then by this oxidation sheet
+(hydrogen ion).
2. will note H
+oxidation sheet 1 be placed on arc-shaped bend platform,, fit tightly with arc-shaped table board its bending by outer depression bar; Subsequently 3 inches of Si sheets 2 are placed on to 4 inches of bending note H along same flexure direction
+oxidation sheet 1 on, by interior depression bar by its bending, with H
+oxidation sheet 1 fits tightly;
3. bending platform is placed in annealing furnace, at 200 DEG C, anneals 15 hours.
4. take off bending and two Si wafers of bonding from bending platform, be reentered in annealing furnace, at 500 DEG C, anneal 1 hour, complete smart peeling, and finally form uniaxial strain SOI wafer.
The major defect of this technology is: 1) processing step complexity: the method must experience thermal oxidation, H
+implantation, peel off requisite main technique and the correlation step thereof such as annealing.2) flexure temperature is limited: because being advances at smart peeling that line unit closes and bending annealing, noted H
+the restriction of exfoliation temperature, its bending annealing temperature can not be higher than 300 DEG C, otherwise will in bending annealing process, peel off, and make the fragmentation of Si sheet.3) fabrication cycle is long: extra thermal oxidation, H
+implantation, peel off the processing steps such as annealing and increased the time of its making.4) rate of finished products is low: the method is to carry out mechanical bend and bonding by two overlapping silicon wafer, and under case of bending, carries out again high temperature and peel off, and silicon wafer is easy to fragmentation.
Summary of the invention
The object of the invention is to overcome the deficiency of above-mentioned prior art, a kind of manufacture method of the uniaxial strain SGOI wafer based on AlN enterree is proposed, to improve the mobility of strain SGOI, reduce the cost of manufacture of strain SGOI wafer, improve heat dispersion, insulation property and the integrated level of strain SGOI device and integrated circuit, meet device and the demands of integrated circuit to strain SGOI wafer such as microelectronics and photoelectron technology field, particularly ultrahigh speed, low-power consumption, anti-irradiation, photoelectricity is integrated.Adopt following technical scheme:
A manufacture method for uniaxial strain SGOI wafer based on AlN enterree, comprises the following steps: 1) SGOI wafer top layer Si Ge aspect is placed on arc-shaped bend platform up or down; 2) two cylindrical stainless steel depression bars lie in a horizontal plane in respectively SGOI wafer two ends, apart from SGOI crystal round fringes 1cm; 3) slowly turn connects the nut of depression bar, makes SGOI wafer bending gradually along arc-shaped table board, until SGOI wafer completely and arc platform and fitting; 4) the arc-shaped bend platform that is loaded with SGOI wafer is placed in annealing furnace anneals, and annealing temperature can be selected arbitrarily within the scope of 300 DEG C to 1250 DEG C.For example, can at 300 DEG C, anneal 10 hours, also can at 800 DEG C, anneal 3.5 hours; 5) annealing finishes rear slow cooling to room temperature, takes out the arc-shaped bend platform that is loaded with SGOI wafer; 6) turn connects the nut of depression bar, depression bar is slowly promoted, until bending SGOI wafer reinstatement.Being loaded with temperature that the bending platform of SGOI wafer anneals in annealing furnace minimum is 300 DEG C, to ensure that the deformation in this process of AlN enterree in SGOI wafer can exceed its yield strength, and plastic deformation occurs; According to the difference of Ge component in SiGe layer, the highest upper annealing temperature is 1250 DEG C, approaches the fusing point of Si; Under the highest annealing temperature, be limited to 900 DEG C, approach the fusing point of Ge.But the highest annealing temperature must not be higher than the deformation temperature of mechanical bend platform.
Described manufacture method, the radius of curvature of described arc-shaped bend platform can change continuously from 1.2m to 0.35m, the uniaxial strain SGOI wafer of the differently strained amount of its respective production.
Described manufacture method, described step 4) annealing process be: at 300 DEG C, anneal 10 hours; Or at 800 DEG C, anneal 3.5 hours; Or at 1250 DEG C, anneal 2.2 hours.
Described manufacture method, described SGOI wafer is the SGOI wafer of 4 inches, 5 inches, 6 inches, 8 inches, 12 inches.
Know-why of the present invention:
The SGOI sheet top layer Si Ge of finished product towards on be placed on and on circular arc table top, carry out mechanical bend, then thermal annealing.According to material plastoelasticity principle, be subject to the heat treated effect of long-time Bending Deformation, AlN layer in SGOI wafer neutral surface top and top layer Si Ge layer will be along bending direction generation uniaxial tensile deformations, and its lattice constant will become greatly, and so-called single shaft tensile strain occurs.Meanwhile, stored certain elastic potential energy at SGOI inside wafer.When annealing finishes to remove after mechanical external force, under this elastic potential energy effect, can there is resilience in SGOI wafer, be returned to ortho states by case of bending, as shown in Figure 3.
But in the SGOI wafer restoring, top layer Si Ge layer has retained a certain amount of tensile strain.This is because in the time of bending thermal anneal process, has set suitable annealing temperature and time, ensures that the mechanical external force applying can exceed the yield strength of AlN but be less than the yield strength of Si substrate, make AlN that plastic deformation occur, and Si substrate is elastic deformation all the time.The AlN enterree of plastic deformation is resilience completely in the time that the resilience of SOI wafer is restored, and still keeps a certain amount of tensile strain.And top layer Si Ge is subject to the effect that pulls and supports of plastic deformation AlN enterree, resilience completely, finally forms single shaft tensile strain SGOI wafer.
In like manner, if SGOI wafer top layer Si Ge aspect is placed on downwards and carries out mechanical bend and thermal annealing on circular arc table top, due to the bottom of top layer Si Ge layer in SOI wafer neutral surface, in the time that bending is annealed, its lattice is by compressed, lattice constant diminishes, and finally can obtain single shaft compressive strain SGOI wafer.
With respect to existing uniaxial strain SOI technology, the present invention has the following advantages:
1) cost of manufacture is low: because manufacture craft is simple, equipment investment is few, thereby cost of manufacture is low.
2) making apparatus and technique are simple: only need bending platform and two equipment of annealing furnace can realize the present invention, and bending platform can be made by oneself.Compared with existing similar technology, there is no the extra techniques such as thermal oxidation, Implantation, high temperature are peeled off, surface finish.
3) strain effects is good: compared with existing similar technology, under same flexibility, dependent variable of the present invention is high, thereby can obtain higher mobility.
4) insulating properties is good with hot property: compared with traditional strain SGOI wafer based on the empty substrate of SiGe, the uniaxial strain SGOI wafer that the present invention makes is without thick SiGe resilient coating, can greatly reduce the hot expense of device and circuit, its AlN enterree makes again its device and circuit have good insulating properties and heat dispersion.
5) rate of finished products is high: prior art adopts two Si wafers to carry out the bending annealing of bonding, and peels off to obtain uniaxial strain SOI by high temperature under case of bending, thereby Si sheet is very easy to broken.And the present invention only carries out bending annealing with the SGOI wafer of a slice finished product and obtains uniaxial strain SGOI, be difficult for brokenly, thereby rate of finished products is high.
6) annealing region is large: 200 DEG C to 300 DEG C annealing regions of relatively existing uniaxial strain SOI technology, annealing temperature of the present invention from minimum 300 DEG C to the highest 1250 DEG C, can select arbitrarily.
Brief description of the drawings
Fig. 1 is existing single shaft tensile strain SOI principle and processing step;
Fig. 2 is existing single shaft compressive strain SOI principle and processing step;
Fig. 3 is single shaft tensile strain SGOI wafer manufacturing principle of the present invention and processing step;
Fig. 4 is single shaft compressive strain SGOI wafer manufacturing principle of the present invention and processing step;
1-Si substrate, 2-AlN enterree, 3-top layer Si Ge layer.
Embodiment
Below in conjunction with specific embodiment, the present invention is described in detail.
The preparation of embodiment 1:4 inch uniaxial strain SGOI wafer
1, SGOI wafer is selected: 4 inches (100) or (110) wafer ((100) or (110) refer to certain crystal face of SGOI wafer plane of crystal), the thick 0.4mm of Si substrate, the thick 500nm of AlN enterree, top layer Si Ge bed thickness 500nm.
SGOI diameter wafer is selected: the brilliant diameter of a circle of SGOI is larger, its bending minimum bending radius is just less, the dependent variable of the uniaxial strain SGOI wafer obtaining is also just larger, and the final electron mobility of uniaxial strain SGOI wafer and the enhancing of hole mobility are also just higher.For the uniaxial strain SGOI wafer based on AlN enterree of made of the present invention, according to the different process of its SGOI device and circuit, can select the different-diameter SGOI wafer from 4 inches to 12 inches.
SGOI wafer crystal face and crystal orientation are selected: for the tensile strain SGOI wafer of made of the present invention, should select (100) crystal face, bending direction should be selected <110> crystal orientation, and (<110> refers to certain crystal orientation of wafer surface, conventionally be also the channel direction of device), can obtain maximum electron mobility and promote.For the compressive strain SGOI wafer of made of the present invention, should select (110) crystal face, bending direction should be selected <100> crystal orientation, can obtain maximum hole mobility and promote.
SGOI wafer Si substrate thickness is selected: the thickness of Si substrate is thinner, and the minimum bending radius of its SGOI wafer is just little, and the dependent variable of the single shaft tensile strain SGOI wafer obtaining is also just larger.For the uniaxial strain SGOI wafer based on AlN enterree of made of the present invention, according to different structure and the technique thereof of its SOI device and circuit, can select the SOI wafer of different Si substrate thickness.
SGOI wafer top layer Si Ge thickness is selected: according to the different structure of its SGOI device and circuit, can select the SGOI wafer of different top layer SiGe thickness.If the strain SGOI wafer based on AlN enterree of made of the present invention is applied to HBT (heterojunction bipolar transistor) device, top layer Si Ge thickness can not be lower than 300nm; If be applied to BiCMOS (bipolar complementary metal oxide semiconductor transistor) circuit, top layer Si Ge thickness can not exceed 200nm;
SGOI wafer AlN thickness of insulating layer is selected: according to the different structure of SGOI device and circuit, can select the SGOI wafer of different al N thickness of insulating layer.If the strain SGOI wafer based on AlN enterree of made of the present invention is applied to HBT (heterojunction bipolar transistor) device, SiO
2thickness of insulating layer is not less than 800nm; If be applied to BiCMOS circuit, SiO
2thickness of insulating layer is no more than 200nm;
Bending platform material is selected: bending platform material is mainly to select according to annealing temperature, ensure that bending platform is indeformable under the highest annealing temperature.For the SGOI wafer based on AlN enterree of the present invention, because the Ge component of its top layer Si Ge semi-conducting material is no more than 30% conventionally, its the highest annealing temperature is 1000 DEG C, and therefore bending platform material adopts ZG40Cr25Ni20 heat-resisting steel material.If the Ge component of its top layer Si Ge semi-conducting material is lower than 10%, its highest annealing temperature is 1250 DEG C, and bending platform material should adopt resistant to elevated temperatures metal molybdenum.
2, bending platform radius of curvature is selected: according to the SGOI wafer of selecting, selecting bending platform radius of curvature is 1m.The radius of curvature of bending platform is to select according to the diameter of SGOI wafer and thickness.Under identical SGOI wafer size, the minimum bending radius of thin SGOI wafer is less than thick SGOI wafer.Under same thickness, the minimum bending radius of large scale SGOI wafer is less than small size SGOI wafer.For the tensile strain SGOI wafer based on AlN enterree of made of the present invention, the bending radius scope of its 4 inches of SOI wafers is 0.50m-1.2m, the bending radius scope of its 6 inches of SOI wafers is 0.45m-1.2m, its 8 inches of SOI wafer bending radius scopes are 0.4m-1.2m, and its 12 inches of SOI wafer bending radius scopes are 0.35m-1.2m.
3, SGOI wafer bending process step:
1) by SGOI wafer top layer Si Ge aspect upwards (or downwards, it is upwards tensile strain, as Fig. 3, it is downwards compressive strain, as Fig. 4, lower same) be placed on arc-shaped bend platform, its bending direction is parallel with <110> or <100> direction;
2) two cylindrical horizontal depression bars on bending platform lie in a horizontal plane in respectively SGOI wafer two ends, apart from 1 centimetre, its edge;
3) the push rod nut of one of them depression bar on the bending platform of turn, makes SGOI wafer one end first fixing;
4) the slow push rod nut of another depression bar of turn again, makes SGOI wafer bending gradually along arc-shaped bend platform table top, until SGOI wafer completely and arc-shaped bend platform table top fit completely.
4, annealing process step:
1) annealing temperature: 300 DEG C;
2) heating rate: 5 DEG C/min;
3) annealing time: 10 hours;
4) rate of temperature fall: 5 DEG C/min;
5, unload frame: treat that furnace temperature is down to room temperature, take out bending platform.The push rod nut of two depression bars in the bending platform two ends of simultaneously slow turn slowly promotes horizontal struts, until depression bar departs from SGOI wafer completely simultaneously.
By above-mentioned processing step, can obtain 4 inches of uniaxial strain SGOI wafers based on AlN enterree.
The preparation of embodiment 2:5 inch uniaxial strain SGOI wafer
1, SGOI wafer is selected: 5 inches (100) or (110) crystal face, the thick 0.55mm of Si substrate, the thick 300nm of AlN enterree, the thick 50nm of top layer Si Ge.
2, bending curvature radius is selected: according to the SGOI wafer of selecting, selecting bending platform radius of curvature is 0.75m.
3, SGOI wafer bending process step:
1) by SGOI wafer top layer Si Ge aspect upwards (or downwards) be placed on clean stainless steel arc-shaped bend platform, its <110> or <100> direction are parallel with bending direction, as shown in Figure 3 or Figure 4;
2) two cylindrical horizontal depression bars on bending platform lie in a horizontal plane in respectively SGOI wafer two ends, apart from 1 centimetre, its edge;
3) the push rod nut of one of them depression bar on the bending platform of turn, makes SGOI wafer one end first fixing;
4) the slow push rod nut of another depression bar of turn again, makes SGOI wafer bending gradually along arc-shaped bend platform table top, until SGOI wafer completely and arc-shaped bend platform table top fit completely.
4, annealing process step:
1) annealing temperature: 800 DEG C;
2) heating rate: 4 DEG C/min;
3) annealing time: 3.5 hours;
4) rate of temperature fall: 4 DEG C/min;
5, unload frame: treat that furnace temperature is down to room temperature, take out bending platform.The push rod nut of two depression bars in the bending platform two ends of simultaneously slow turn slowly promotes horizontal struts, until depression bar departs from SGOI wafer completely simultaneously.
By above-mentioned processing step, can obtain 5 inches of uniaxial strain SGOI wafers based on AlN enterree.
The preparation of embodiment 3:8 inch uniaxial strain SGOI wafer
1, SGOI wafer is selected: 8 inches (100) or (110) crystal face, the thick 0.68mm of Si substrate, the thick 1000nm of AlN enterree, the thick 1000nm of top layer Si Ge.
2, bending curvature radius is selected: according to the SGOI wafer of selecting, selecting bending platform radius of curvature is 0.5m.
3, SGOI wafer bending process step:
1) by SGOI wafer top layer Si Ge aspect upwards (or downwards) be placed on arc-shaped bend platform, its bending direction is parallel with <110> or <100> direction, as shown in Figure 3 or Figure 4;
2) two cylindrical horizontal depression bars on bending platform lie in a horizontal plane in respectively SGOI wafer two ends, apart from 1 centimetre, its edge;
3) the push rod nut of one of them depression bar on the bending platform of turn, makes SGOI wafer one end first fixing;
4) the slow push rod nut of another depression bar of turn again, makes SGOI wafer bending gradually along arc-shaped bend platform table top, until SGOI wafer completely and arc-shaped bend platform table top fit completely.
4, annealing process step:
1) annealing temperature: 1250 DEG C;
2) heating rate: 3 DEG C/min;
3) annealing time: 2.2 hours;
4) rate of temperature fall: 3 DEG C/min;
5, unload frame: treat that furnace temperature is down to room temperature, take out bending platform.The push rod nut of two depression bars in the bending platform two ends of simultaneously slow turn slowly promotes horizontal struts, until depression bar departs from SGOI wafer completely simultaneously.
By above-mentioned processing step, can obtain 8 inches of uniaxial strain SGOI wafers based on AlN enterree.
In order to make narration of the present invention more clear, below will make its body explanation to many details.For example concrete structure, composition, material, size, technical process and technology.
The present invention's arc-shaped bend platform used adopts ZG40Cr25Ni20 heat-resisting steel material or metal molybdenum material, and this is indeformable under the highest annealing temperature in order to ensure bending platform.In addition, the present invention's bending platform used also can adopt other to be easy to higher and resistant to elevated temperatures all materials of machining, fineness to make.
Strain SGOI wafer base semiconductor substrate 1 of the present invention can be also other semi-conducting materials, semi-conducting material as all possible in Ge, GaAs etc.
Strain SGOI wafer top layer semi-conducting material 3 of the present invention is not limited to SiGe semi-conducting material, also the semi-conducting materials of all applicable making SOI wafer top layer semiconductive thin films such as Si, Ge, GaAs.
The SGOI wafer that any process is made is all suitable for the present invention and makes uniaxial strain SOI wafer, and these processes comprise smart peeling (Smart-cut), note oxygen isolation (SIMOX), bonding and back of the body corrosion (BESOI), layer transfer (ELRANT), epitaxial growth based on SOI wafer etc.
The selection principle of the bending annealing temperature of the present invention and annealing time is, ensures that in SGOI crystal circle structure, plastic deformation occurs AlN film in annealing process, but Si substrate in SGOI wafer, in annealing, elastic deformation can only occur.Therefore,, according to the Material Thermodynamics characteristic of AlN film, its minimum annealing temperature must not be lower than 300 DEG C.According to the fusing point T of SiGe material
srelation with Ge component x: T
s=1412-738x+263x
2, the fusing point of SiGe is up to 1412 DEG C, and minimum is 937 DEG C.Thereby the highest annealing temperature of SGOI wafer is not limited to 800 DEG C, the highest upper annealing temperature can reach 1250 DEG C, approaches the fusing point of Si; The highest annealing temperature lower limit can reach 900 DEG C, approaches the fusing point of Ge.But the highest annealing temperature must be considered the thermodynamic property of bending platform material, can not be higher than its deformation temperature.
Detailed description of the present invention and describing all based on optimization test scheme, but person of skill in the art will appreciate that, the variation of above and other form and details can't depart from essence of the present invention and scope.For those skilled in the art; understanding after content of the present invention and principle; can be in the situation that not deviating from the principle and scope of the present invention; the method according to this invention is carried out various corrections and the change in form and details, but these based on correction of the present invention and change still within claim protection range of the present invention.
Should be understood that, for those of ordinary skills, can be improved according to the above description or convert, and all these improvement and conversion all should belong to the protection range of claims of the present invention.
Claims (4)
1. the manufacture method of the uniaxial strain SGOI wafer based on AlN enterree, it is characterized in that SGOI wafer taking finished product is as raw material, only there are mechanical bend and thermal annealing twice technical process, only adopt two equipment of bending platform and annealing furnace, comprise the following steps: 1) SGOI wafer top layer Si Ge aspect is placed on arc-shaped bend platform up or down, and its minimum profile curvature radius is relevant to SGOI wafer size; 2) two cylindrical stainless steel depression bars lie in a horizontal plane in respectively SGOI wafer two ends, apart from SGOI crystal round fringes 1cm; 3) slow turn connects the nut of depression bar, makes SGOI wafer bending gradually along arc-shaped table board, until SGOI wafer is complete and arc-shaped table board laminating; 4) the arc-shaped bend platform that is loaded with SGOI wafer is placed in annealing furnace anneals, and annealing temperature is between 300 DEG C to 1250 DEG C; 5) annealing finishes rear slow cooling to room temperature, takes out the arc-shaped bend platform that is loaded with SGOI wafer; 6) turn connects the nut of depression bar, depression bar is slowly promoted, until bending SGOI wafer reinstatement.
2. manufacture method according to claim 1, is characterized in that, the radius of curvature of described bending platform is that 1.2m is to 0.35m; Bending platform material adopts ZG40Cr25Ni20 heat-resisting steel material or metal molybdenum material.
3. manufacture method according to claim 1, is characterized in that, described step 4) annealing time and the annealing temperature of annealing process closely related, for annealing at 300 DEG C 10 hours; Or at 800 DEG C, anneal 3.5 hours; Or at 1250 DEG C, anneal 2.2 hours.
4. manufacture method according to claim 1, is characterized in that, described SGOI wafer is the SGOI wafer of 4 inches, 5 inches, 6 inches, 8 inches, 12 inches.
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| 晶圆级机械致单轴应变Si技术研究;肖哲;《中国优秀硕士学位论文全文数据库》;20101115(第11期);第39-62页，附图5.3 * |
| 肖哲.晶圆级机械致单轴应变Si技术研究.《中国优秀硕士学位论文全文数据库》.2010,(第11期),第39-62页，附图5.3. * |
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