CN102436998B - Field emission display panel - Google Patents
Field emission display panel Download PDFInfo
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- CN102436998B CN102436998B CN201110394220.3A CN201110394220A CN102436998B CN 102436998 B CN102436998 B CN 102436998B CN 201110394220 A CN201110394220 A CN 201110394220A CN 102436998 B CN102436998 B CN 102436998B
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- 239000000758 substrate Substances 0.000 claims abstract description 31
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- 239000000463 material Substances 0.000 abstract description 15
- 238000010586 diagram Methods 0.000 description 12
- 239000007769 metal material Substances 0.000 description 12
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 6
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- 229910003481 amorphous carbon Inorganic materials 0.000 description 1
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Abstract
A field emission display panel. The substrate at least comprises a display area and a non-display area. The first conductive layer is disposed in the display area and includes a first electrode line and a first electrode electrically connected to the first electrode line. The resistance material layer is located on the first conductive layer in the display region. The insulating layer covers the resistance material layer in the display area and is provided with a first opening and a second opening, the first opening exposes part of the resistance material layer above the first electrode, and the second opening exposes part of the resistance material layer above the first electrode wire. The electron emission element is disposed on the resistive material layer exposed by the first opening. The second conductive layer is disposed on the insulating layer and in the second opening, wherein the second conductive layer includes a second electrode line and a second electrode electrically connected to the second electrode line, the second electrode has a third opening to expose the electron emitting device, and the second electrode line and the first electrode line at least define a first sub-pixel region and a second sub-pixel region.
Description
Technical field
The invention relates to a kind of display floater, and relate to especially a kind of emission type display panel.
Background technology
In general, field emission type display panel is mainly under the environment (being less than 10-6 Tao Er) at ultra high vacuum, on negative electrode, make electron transmitting terminal (electron emitter), and utilize the micro-structural of high-aspect-ratio in electron transmitting terminal (high aspect ratio) to help electronics to overcome the work function (work function) of negative electrode and depart from negative electrode.In addition, in transmitting display floater on the scene, if be coated with phosphor powder on anode, and by the high electric field between negative electrode and positive electrode, electronics is derived by the electron transmitting terminal of negative electrode, the phosphor powder through the effect of electric field in direct impinge anode, can send visible ray.
The problem that current field emission type display panel faces is, the uniformity deficiency of the luminosity of display floater.In other words, in the emission type display panel of traditional field, the electric current of the electron transmitting terminal of subregion has obvious difference with the electric current of the electron transmitting terminal in another part region, so will cause the uniformity of overall luminosity of display floater not good.
Summary of the invention
The invention provides a kind of emission type display panel, it can improve the problem of the uniformity deficiency of a tradition emission type display panel luminosity.
The present invention proposes a kind of emission type display panel, and it comprises substrate, the first resistive element, the first conductive pattern, electronic emission element, the second resistive element, the second conductive pattern and conductive layer.Substrate at least has viewing area and non-display area, and viewing area at least comprises the first sub-pixel area and the second sub-pixel area.The first resistive element is arranged in the first sub-pixel area and the second sub-pixel area, and wherein the resistance value of the first resistive element in the first sub-pixel area is different from the resistance value of the first resistive element in the second sub-pixel area.The first conductive pattern connects one end of the first resistive element in one end and second sub-pixel area of the first resistive element in the first sub-pixel area.Electronic emission element is arranged in the first sub-pixel area and the second sub-pixel area, and connects the other end of the first resistive element in the other end and second sub-pixel area of the first resistive element in the first sub-pixel area.The second resistive element is arranged in the first sub-pixel area and the second sub-pixel area, and wherein the resistance value of the second resistive element in the first sub-pixel area is different from the resistance value of the second resistive element in the second sub-pixel area.The second conductive pattern connects one end of the second resistive element in one end and second sub-pixel area of the second resistive element in the first sub-pixel area.Conductive layer connects the other end of the second resistive element in the other end and second sub-pixel area of the second resistive element in the first sub-pixel area, wherein conductive layer around and suspension joint in electronic emission element.
This first resistive element and this second resistive element comprise resistance elements.
This first conductive pattern and this second conductive pattern are made up of same rete.
This conductive layer is positioned at the upper of this first resistive element, this second resistive element, this first conductive pattern and this second conductive pattern.
Further comprise an insulating barrier, be positioned at the lower of this conductive layer and do not cover this electronic emission element.
When this first resistive element and this second resistive element are projected on this substrate, this first resistive element does not overlap with this second resistive element.
The voltage that this conductive layer transmits gives voltage that the electric current of this electronic emission element transmits with this conductive layer gives this electronic emission element electric current via the second resistive element of this second sub-pixel area via this second resistive element of this first sub-pixel area identical in fact.
The present invention separately proposes a kind of emission type display panel, comprises substrate, the first conductive layer, resistance elements, insulating barrier, electronic emission element and the second conductive layer.Substrate at least comprises viewing area and non-display area.The first conductive layer is arranged in viewing area, and the first conductive layer comprises the first electrode wires and the first electrode with the first electrode wires electric connection.Resistance elements is arranged on the first conductive layer of viewing area.Insulating barrier is covered on the resistance elements in viewing area, and insulating barrier has the first opening and the second opening, the first opening exposes the part resistance elements of position above the first electrode, and the second opening exposes the part resistance elements of position above the first electrode wires.Electronic emission element is arranged on the resistance elements being come out by the first opening.The second conductive layer is arranged on insulating barrier and in the second opening, the second electrode that wherein the second conductive layer comprises the second electrode wires and is electrically connected with the second electrode wires, and the second electrode has the 3rd opening to expose electronic emission element, and the second electrode wires and the first electrode wires at least define the first sub-pixel area and the second sub-pixel area.
The area that this second opening in this first sub-pixel area is projected to this substrate is different in essence and is projected to the area of this substrate in the second opening in this second sub-pixel area.
This second conductive layer contact is arranged in the surface of this resistance elements of this second opening.
This second opening in this first sub-pixel area is to be positioned at this first electrode wires and this second electrode wires staggered place.
This second opening in this second sub-pixel area is to be positioned at this first electrode wires and this second electrode wires staggered place.
The junction of this first electrode wires and this first electrode has a gap, to make this first electrode wires and this first electrode separation.
The area that this first opening in this first sub-pixel area is projected to this substrate is different in essence and is projected to the area of this substrate in this first opening in this second sub-pixel area.
This electronic emission element area in this first sub-pixel area is different in essence in this electronic emission element area in this second sub-pixel area.
Based on above-mentioned, the first sub-pixel area of the present invention's emission type display panel on the scene and the second sub-pixel area are provided with the first resistive element and the second resistive element separately.Particularly, the resistance value of the first resistive element in the first sub-pixel area is different from the resistance value of the first resistive element in the second sub-pixel area, and the resistance value of the second resistive element in the first sub-pixel area is different from the resistance value of the second resistive element in the second sub-pixel area.The difference that the electric current that electronic emission element in the first sub-pixel area and second sub-pixel area that can reduce an emission type display panel produces is set of the first above-mentioned resistive element and the second resistive element, and then improve the uniformity of the luminosity of an emission type display panel.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate appended graphic being described in detail below.
Accompanying drawing explanation
Fig. 1 be according to an embodiment of the invention emission type display panel on look schematic diagram.
Fig. 2 A is the equivalent circuit diagram of the first sub-pixel area of the field emission type display panel of Fig. 1.
Fig. 2 B be Fig. 1 field emission type display panel the first sub-pixel area on look schematic diagram.
Fig. 2 C is the generalized section along hatching I-I ' and II-II ' of Fig. 2 B.
Fig. 2 D be according to another embodiment field emission type display panel the first sub-pixel area on look schematic diagram.
Fig. 3 A is the equivalent circuit diagram of the second sub-pixel area of the field emission type display panel of Fig. 1.
Fig. 3 B be Fig. 1 field emission type display panel the second sub-pixel area on look schematic diagram.
Fig. 3 C is the generalized section along hatching I-I ' and II-II ' of Fig. 3 B.
Fig. 3 D be according to another embodiment field emission type display panel the second sub-pixel area on look schematic diagram.
Description of reference numerals
100: substrate A: viewing area
B: non-display area P1: the first sub-pixel area
P2: the second sub-pixel area Ra-1: the first resistive element
Rb-1: the second resistive element Ro-1: resistance
Va-1, Vb-1, V1, Vg-1, HV1L: voltage
110-1: 102: the first conductive layers of electronic emission element
102a-1,102a-2: the first electrode (the first conductive pattern)
102b-1,102b-2,102c-1,102c-2: the first electrode wires (the second conductive pattern)
103: resistance elements 104: insulating barrier
106: the second conductive layer 106a-1,106a-2: the second electrode
106b-1,106b-2: the second electrode wires Oa-1, Oa-2: the first opening
Ob-1, Ob-2: the second opening Oc-1,0c-2: the 3rd opening
Embodiment
Fig. 1 be according to an embodiment of the invention emission type display panel on look schematic diagram.Please refer to Fig. 1, the field emission type display panel of the present embodiment comprises substrate 100.According to the present embodiment, the material of substrate 100 can be glass, quartz, polymer or light tight/reflecting material (for example: electric conducting material, metal, wafer, pottery or other material applicatory) or other material applicatory.Substrate 100 at least has viewing area A and non-display area B, and non-display area B is centered around viewing area A around.In addition, in the A of viewing area, there is the sub-pixel area of multiple arrayed.In Fig. 1, only indicate the first sub-pixel area P1 and the second sub-pixel area P2 to describe in detail.The first sub-pixel area P1 and the second sub-pixel area P2 are that the edge and the central authorities that lay respectively at viewing area A illustrate for example, but the invention is not restricted to this.According to other embodiment, the first sub-pixel area P1 and the second sub-pixel area P2 also can be positioned at the edge of viewing area A, or are all positioned at the central authorities near viewing area A.
To first elaborate for the structure in above-mentioned the first sub-pixel area P1 below.Fig. 2 A is the equivalent circuit diagram of the first sub-pixel area of the field emission type display panel of Fig. 1.Fig. 2 B be Fig. 1 field emission type display panel the first sub-pixel area on look schematic diagram.Fig. 2 C is the generalized section along hatching I-I ' and II-II ' of Fig. 2 B.
Referring to Fig. 2 A, Fig. 2 B and Fig. 2 C, comprise and be provided with the first conductive layer 102, resistance elements 103, insulating barrier 104, electronic emission element 110-1 and the second conductive layer 106 at the first sub-pixel area P1.
The first electrode 102a-1 that the first conductive layer 102 comprises the first electrode wires 102b-1 and is electrically connected with the first electrode wires 102b-1.At this, the first electrode 102a-1 of the first conductive layer 102 can be described as the first conductive pattern, and the first electrode wires 102b-1 of the first conductive layer 102 can be described as the second conductive pattern.Therefore, in the present embodiment, the first conductive pattern (the first electrode 102a-1) is made up of 102 of same retes (the first conductive layer) with the second conductive pattern (the first electrode wires) 102b-1, but the invention is not restricted to this.According to other embodiment, the first conductive pattern (the first electrode 102a-1) is made up of different rete from the second conductive pattern (the first electrode wires) 102b-1.Based on considering of conductivity, the first conductive layer 102 is generally to use metal material.So, the invention is not restricted to this, according to other embodiment, the first conductive layer 102 also can use other electric conducting materials.For example: the nitrogen oxide of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or the stack of layers of metal material and other electric conducting material.
Insulating barrier 104 covers resistance elements 103, and insulating barrier 104 has the first opening Oa-1 and the second opening Ob-1.The first opening Oa-1 exposes the part resistance elements 103 of position in the first electrode (the first conductive pattern) 102a-1 top, and the second opening Ob-1 exposes the part resistance elements 103 of position in the first electrode wires (the second conductive pattern) 102b-1 top.
Electronic emission element 110-1 is arranged to be insulated on the resistance elements 103 that layer the first opening Oa-1 of 104 come out.Therefore, electronic emission element 110-1 is the other end that connects the first resistive element Ra-1 in the first sub-pixel area P1.Electronic emission element 110-1 can be the electron transmitting terminal of cone, carbon nanotube electron transmitting terminal or other kind of point discharge form or the combination of above-mentioned two kinds of transmitting terminals of metal material.The present invention does not limit the number of electronic emission element 110-1 set in the first subpixel area P1.In other words, in the first subpixel area P1, the number of set electronic emission element 110-1 can be more than graphic illustrated number.Moreover the present invention does not limit the existing region of electronic emission element 110-1 set in the first subpixel area P1 to be only used as an electron-emitting area yet.In other words, in the first subpixel area P1, multiple electron-emitting areas can be set.
The second conductive layer 106 is arranged on insulating barrier 104 and inserts in the second opening Ob-1.According to the present embodiment, the second conductive layer 106 more contacts the surface of the resistance elements 103 that is arranged in the second opening Ob-1.In addition, the second conductive layer 106 around and suspension joint in electronic emission element 110-1.In other words, the second conductive layer 106 is looped around the surrounding of electronic emission element 110-1 and does not link together with electronic emission element 110-1.
According to the present embodiment, the second electrode 106a-1 that the second conductive layer 106 comprises the second electrode wires 106b-1 and is electrically connected with the second electrode wires 106b-1.The second electrode 106a-1 of the second conductive layer 106 has the 3rd opening Oc-1 to expose electronic emission element 110-1, and the second electrode wires 106b-1 of the second conductive layer 106 connects the other end of the second resistive element Rb-1 in the first sub-pixel area P1.In addition, insulating barrier 104 is be positioned at the lower of the second conductive layer 106 and do not cover electronic emission element 110-1.And second conductive layer 106 are be positioned at the first resistive element Ra-1, the second resistive element Rb-1, the first conductive pattern 102a-1 and the second conductive pattern 102b-1 upper.Based on considering of conductivity, the second conductive layer 106 is generally to use metal material.So, the invention is not restricted to this, according to other embodiment, the second conductive layer 106 also can use other electric conducting materials.For example: the nitrogen oxide of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or the stack of layers of metal material and other electric conducting material.
According to the present embodiment, the bearing of trend of the bearing of trend of above-mentioned the second electrode wires 106b-1 and the first electrode wires 102b-1 is not parallel, and preferably, the bearing of trend of the second electrode wires 106b-1 is vertical with the bearing of trend of the first electrode wires 102b-1.Therefore, the second electrode wires 106b-1 and the first electrode wires 102b-1 define the first sub-pixel area P1.In addition, in this embodiment, the second opening Ob-1 in the first sub-pixel area P1 is positioned at the first electrode wires 102b-1 and the second electrode wires 106b-1 staggered place.
In the embodiment of Fig. 2 B, the first conductive layer 102 in the first sub-pixel area P1 is to comprise the first electrode wires 102b-1 and the first electrode 102a-1.So, the invention is not restricted to this.According to other embodiment, as shown in Figure 2 D, the first conductive layer 102 in the first sub-pixel area P1 except comprise the first electrode 102a-1, the first electrode wires is made up of 102b-1 and 102c-1.The junction of the first electrode wires 102c-1 and the first electrode 102a-1 has gap, so that the first electrode wires 102c-1 is separated with the first electrode 102a-1.And the second opening Ob-1 that exposes the second resistive element Rb-1 is the staggered place that correspondence is arranged on the first electrode wires 102c-1 and the second electrode wires 106b-1.At this, the first electrode wires 102c-1 and the first electrode wires 102b-1 can be connected to corresponding voltage Va-1, Vb-1 separately, and voltage Va-1, Vb-1 can be identical or not identical.
In the first sub-pixel area P1 of the present embodiment, as shown in Figure 2 A, in the time that external circuit gives the first sub-pixel area P1 voltage V1, the magnitude of voltage that enters the first subpixel area P1 after consuming through the resistance R o-1 of outside line is Vg-1, and voltage Vg-1 and voltage HV1 will drive electronic emission element 110-1 to produce electric discharge.
Then, be for the present embodiment field emission type display panel the second sub-pixel area P2 in structure elaborate.Fig. 3 A is the equivalent circuit diagram of the second sub-pixel area of the field emission type display panel of Fig. 1.Fig. 3 B be Fig. 1 field emission type display panel the second sub-pixel area on look schematic diagram.Fig. 3 C is the generalized section along hatching I-I ' and II-II ' of Fig. 3 B.
Referring to Fig. 3 A, Fig. 3 B and Fig. 3 C, comprise and be provided with the first conductive layer 102, resistance elements 103, insulating barrier 104, electronic emission element 110-2 and the second conductive layer 106 at the second sub-pixel area P2.
The first electrode 102a-2 that the first conductive layer 102 comprises the first electrode wires 102b-2 and is electrically connected with the first electrode wires 102b-2.At this, the first electrode 102a-2 of the first conductive layer 102 can be described as the first conductive pattern, and the first electrode wires 102b-2 of the first conductive layer 102 can be described as the second conductive pattern.Therefore, in the present embodiment, the first conductive pattern (the first electrode 102a-2) is made up of 102 of same retes (the first conductive layer) with the second conductive pattern (the first electrode wires) 102b-2.
Similarly, the resistance elements 103 of the second sub-pixel area P2 is positioned on the first conductive layer 102.Resistance elements 103 is as the first resistive element Ra-2 in the top of the first conductive pattern (the first electrode 102a-2), and one end of the first resistive element Ra-2 connects the first conductive pattern 102a-2.Resistance elements 103 is as the second resistive element Rb-2 in the second conductive pattern (the first electrode wires) 102b-2 top, and one end of the second resistive element Rb-21 connects the second conductive pattern 102b-2.In addition, in the time that the first resistive element Ra-2 and the second resistive element Rb-2 are projected on substrate 100, the first resistive element Ra-2 does not overlap with the second resistive element Rb-2.
It is worth mentioning that, in this emission type display panel, the resistance value of the first resistive element Ra-1 in the first sub-pixel area P1 is different from the resistance value of the first resistive element Ra-2 of P2 in the second sub-pixel area.And the resistance value of the second resistive element Rb-1 in the first sub-pixel area P1 is different from the resistance value of the second resistive element Rb-2 in the second sub-pixel area P2.
Insulating barrier 104 covers resistance elements 103, and insulating barrier 104 has the first opening Oa-2 and the second opening Ob-2.The first opening Oa-2 exposes the part resistance elements 103 of position in the first electrode (the first conductive pattern) 102a-2 top, and the second opening Ob-2 exposes the part resistance elements 103 of position in the first electrode wires (the second conductive pattern) 102b-2 top.
It is worth mentioning that, according to an embodiment, the area that the first opening Oa-1 in the first sub-pixel area P1 is projected to substrate 100 is different in essence and is projected to the area of substrate 100 in the first opening Oa-2 in the second sub-pixel area P2.So, the invention is not restricted to this, in other embodiments, it is suitable with the area that the first opening Oa-2 in the second sub-pixel area P2 is projected to substrate 100 that the first opening Oa-1 in the first sub-pixel area P1 is projected to the area of substrate 100.In addition, according to an embodiment, the area that the second opening Ob-1 in the first sub-pixel area P1 is projected to substrate 110 is different in essence and is projected to the area of substrate 100 in the second opening Ob-2 in the second sub-pixel area P2.So, the invention is not restricted to this, in other embodiments, the area that the second opening Ob-1 in the first sub-pixel area P1 is projected to substrate 110 also can with the second sub-pixel area P2 in the second opening Ob-2 to be projected to the area of substrate 100 suitable.
Electronic emission element 110-2 is arranged to be insulated on the resistance elements 103 that layer the first opening Oa-2 of 104 come out.Therefore, electronic emission element 110-2 connects the other end of the first resistive element Ra-2 in the second sub-pixel area P2.Electronic emission element 110-2 can be the electron transmitting terminal of cone, carbon nanotube electron transmitting terminal or other kind of point discharge form or the combination of above-mentioned two kinds of transmitting terminals of metal material.The present invention does not limit the number of electronic emission element 110-2 set in the second sub-pixel area P2.In other words, in the second sub-pixel area P2, the number of set electronic emission element 110-2 can be more than graphic illustrated number.Moreover the present invention does not limit the existing region of electronic emission element 110-1 set in the first subpixel area P1 to be only used as an electron-emitting area yet.In other words, in the first subpixel area P1, multiple electron-emitting areas can be set.In addition, the second conductive layer 106 around and suspension joint in electronic emission element 110-2.In other words, the second conductive layer 106 is looped around the surrounding of electronic emission element 110-2 and does not link together with electronic emission element 110-2.
It is worth mentioning that, the area of the electronic emission element 110-1 in the first sub-pixel area P1 is different in essence in the electronic emission element 110-2 area in the second sub-pixel area P2.But, the invention is not restricted to this, according to other embodiment, the area of the electronic emission element 110-1 in the first sub-pixel area P1 in fact with the second sub-pixel area P2 in electronic emission element 110-2 area suitable.
The second conductive layer 106 is arranged on insulating barrier 104 and inserts in the second opening Ob-2.According to the present embodiment, the second conductive layer 106 more contacts the surface of the resistance elements 103 that is arranged in the second opening Ob-2.The second electrode 106a-2 that the second conductive layer 106 comprises the second electrode wires 106b-2 and is electrically connected with the second electrode wires 106b-2.The second electrode 106a-2 of the second conductive layer 106 has the 3rd opening Oc-2 to expose electronic emission element 110-2, and the second electrode wires 106b-2 of the second conductive layer 106 connects the other end of the second resistive element Rb-2 in the second sub-pixel area P2.In addition, insulating barrier 104 is be positioned at the lower of the second conductive layer 106 and do not cover electronic emission element 110-2.And second conductive layer 106 are be positioned at the first resistive element Ra-2, the second resistive element Rb-2, the first conductive pattern 102a-2 and the second conductive pattern 102b-2 upper.
According to the present embodiment, the bearing of trend of the bearing of trend of above-mentioned the second electrode wires 106b-2 and the first electrode wires 102b-2 is not parallel, and preferably, the bearing of trend of the second electrode wires 106b-2 is vertical with the bearing of trend of the first electrode wires 102b-2.Therefore, the second electrode wires 106b-2 and the first electrode wires 102b-2 define the second sub-pixel area P2.In addition, in this embodiment, the second opening Ob-2 in the second sub-pixel area P2 is positioned at the first electrode wires 102b-2 and the second electrode wires 106b-2 staggered place.
In the embodiment of Fig. 3 B, the first conductive layer 102 in the second sub-pixel area P2 is to comprise the first electrode wires 102b-2 and the first electrode 102a-2.So, the invention is not restricted to this.According to other embodiment, as shown in Figure 3 D, the first conductive layer 102 in the second sub-pixel area P2 except comprise the first electrode 102a-2, the first electrode wires is made up of 102b-2 and 102c-2.The junction of the first electrode wires 102c-2 and the first electrode 102a-2 has gap, so that the first electrode wires 102c-2 is separated with the first electrode 102a-2.And the second opening Ob-2 that exposes the second resistive element Rb-2 is the staggered place that correspondence is arranged on the first electrode wires 102c-2 and the second electrode wires 106b-2.At this, the first electrode wires 102c-2 and the first electrode wires are can be connected to separately corresponding voltage Va-2, Vb-2 by 102b-2, and voltage Va-2, Vb-2 can be identical or not identical.
In the second sub-pixel area P2 of the present embodiment, as shown in Figure 3A, in the time that external circuit gives the second sub-pixel area P2 voltage V2, the magnitude of voltage that enters the second sub-pixel area P2 after consuming through the resistance R o-2 of outside line is Vg-2, and voltage Vg-2 and voltage HV2 will drive electronic emission element 110-2 to produce electric discharge.
From the above, in the emission type display panel of the field of the present embodiment, in the first sub-pixel area P1, there is the first resistive element Ra-1 and the second resistive element Rb-1, and in the second sub-pixel area P2, there is the first resistive element Ra-2 and the second resistive element Rb-2.Particularly, the resistance value of the first resistive element Ra-1 in the first sub-pixel area P1 is different from the resistance value of the first resistive element Ra-2 of P2 in the second sub-pixel area.And the resistance value of the second resistive element Rb-1 in the first sub-pixel area P1 is different from the resistance value of the second resistive element Rb-2 in the second sub-pixel area P2.Therefore the voltage Vg-1, transmitting when the second conductive layer 106 gives voltage Vg-2 that the electric current of electronic emission element 110-1 can transmit with the second conductive layer 106 gives electronic emission element 110-2 electric current via the second resistive element Rb-2 of the second sub-pixel area P2 via the second resistive element Rb-1 of the first sub-pixel area P1 identical in fact.
In other words, the present embodiment arranges the first resistive element and the second resistive element in each sub-pixel area by emission type display panel on the scene, can make the otherness of the electric current of the electron emission unit of all sub-pixel area of an emission type display panel diminish, and then reach the uniformity of the luminosity that improves an emission type display panel.
Must it should be noted that, in above-described embodiment, number and shape described in the first opening Oa-1, the second opening Ob-1, the 3rd opening Oc-1 are neither limited to described in embodiment, for example: the first opening Oa-1/Oa-2, the second opening Ob-1/Ob-2, each other number of the 3rd opening Oc-1/Oc-2, can at least more than one.The first opening Oa-1/Oa-2, the second opening Ob-1/Ob-2, each other shape of the 3rd opening Oc-1/Oc-2, comprise circle, rectangle, triangle, rhombus, pentagon, hexagon, star, flower shape, arc, polygon, zigzag, gear shape or other suitable shape or the above-mentioned combination of wantonly two kinds.In addition, the first opening Oa-1/Oa-2, the second opening Ob-1/Ob-2, the 3rd opening Oc-1/Oc-2 are not restrictive condition when each other chi yet.
Below row cite an actual example and comparative example so that the uniformity that the first resistive element and the second resistive element are set really can improve the luminosity of an emission type display panel in each sub-pixel area of emission type display panel on the scene to be described.
Example
In the emission type display panel of the field of this example, the first resistive element and the second resistive element are set in each sub-pixel area, wherein the structure of the sub-pixel area of the field emission type display panel of this example is as shown in Fig. 2 A-Fig. 2 C or Fig. 3 A-Fig. 3 C.In addition, in this example, the voltage that external circuit gives each sub-pixel area is all about 35V, and the resistance value of external circuit is about 3K Ω, and the first conductive layer 102 (the first electrode and the first electrode wires) is to give about 0V.When for this example field emission type display panel wherein three sub-pixel area ( sub-pixel area 1,2,3) electrically measure time, can obtain the result as table 1.
Table 1
Comparative example
In the emission type display panel of the field of this comparative example, in each sub-pixel area, be only provided with the first resistive element, and the second resistive element is not set.In addition, in this comparative example, the voltage that external circuit gives each sub-pixel area is all about 30V, and the resistance value of external circuit is about 3K Ω, and negative electrode is to give about 0V.When for this example field emission type display panel wherein three sub-pixel area ( sub-pixel area 1,2,3) electrically measure time, can obtain the result as table 2.
Table 2
From above-mentioned example, in the time the first resistive element and the second resistive element being set in each sub-pixel area in emission type display panel on the scene, can make the uniformity of electric current (IRa) of the electronic emission element of an emission type display panel up to approximately 72.8%.If the first resistive element is only set in each sub-pixel area in emission type display panel on the scene, the uniformity of the electric current (IRa) of the electronic emission element of an emission type display panel only has an appointment 66.7%.Therefore, the first resistive element and the second resistive element are set in each sub-pixel area in the present invention's emission type display panel on the scene and really can reach the luminance uniformity that improves an emission type display panel.
Although the present invention with embodiment openly as above; so it is not in order to limit the present invention; any those skilled in the art without departing from the spirit and scope of the present invention, when doing a little change and retouching, are as the criterion with claims therefore protection scope of the present invention is worked as.
Claims (15)
1. a field emission type display panel, comprising:
One substrate, at least has a viewing area and a non-display area, and this viewing area at least comprises one first sub-pixel area and one second sub-pixel area;
One first resistive element, is arranged in this first sub-pixel area and this second sub-pixel area, and wherein the resistance value of this first resistive element in this first sub-pixel area is different from the resistance value of this first resistive element in this second sub-pixel area;
One first conductive pattern, connects the one end of this first resistive element in one end and this second sub-pixel area of this first resistive element in this first sub-pixel area;
One electronic emission element, is arranged in this first sub-pixel area and this second sub-pixel area, and connects the other end of this first resistive element in the other end and this second sub-pixel area of this first resistive element in this first sub-pixel area;
One second resistive element, is arranged in this first sub-pixel area and this second sub-pixel area, and wherein the resistance value of this second resistive element in this first sub-pixel area is different from the resistance value of this second resistive element in this second sub-pixel area;
One second conductive pattern, connects the one end of this second resistive element in one end and this second sub-pixel area of this second resistive element in this first sub-pixel area; And
One conductive layer, connects the other end of this second resistive element in the other end and this second sub-pixel area of this second resistive element in this first sub-pixel area, wherein this conductive layer around and suspension joint in this electronic emission element;
Wherein the first resistive element in different pixels district equates with the ratio of the resistance value of the second resistive element.
2. as claimed in claim 1 emission type display panel, is characterized in that, this first resistive element and this second resistive element comprise resistance elements.
3. as claimed in claim 1 emission type display panel, is characterized in that, this first conductive pattern and this second conductive pattern are made up of same rete.
4. as claimed in claim 1 emission type display panel, is characterized in that, this conductive layer is positioned at the upper of this first resistive element, this second resistive element, this first conductive pattern and this second conductive pattern.
5. as claimed in claim 1 emission type display panel, is characterized in that, further comprises an insulating barrier, is positioned at the lower of this conductive layer and does not cover this electronic emission element.
6. as claimed in claim 1 emission type display panel, is characterized in that, when this first resistive element and this second resistive element are projected on this substrate, this first resistive element does not overlap with this second resistive element.
7. as claimed in claim 1 emission type display panel, it is characterized in that, the voltage that this conductive layer transmits gives voltage that the electric current of this electronic emission element transmits with this conductive layer gives this electronic emission element electric current via the second resistive element of this second sub-pixel area via this second resistive element of this first sub-pixel area identical in fact.
8. a field emission type display panel, comprising:
One substrate, it at least comprises a viewing area and a non-display area;
One first conductive layer, is arranged in this viewing area, and this first conductive layer comprises the first electrode wires and one first electrode with this first electrode wires electric connection;
One resistance elements, is arranged on this first conductive layer of this viewing area;
One insulating barrier, be covered on this resistance elements in this viewing area, and this insulating barrier has one first opening and one second opening, this first opening exposes position this resistance elements of part above this first electrode, and this second opening exposes position this resistance elements of part above this first electrode wires;
One electronic emission element, is arranged on this resistance elements being come out by this first opening;
One second conductive layer, be arranged on this insulating barrier and in this second opening, one second electrode that wherein this second conductive layer comprises one second electrode wires and is electrically connected with this second electrode wires, and this second electrode has one the 3rd opening to expose this electronic emission element, and this second electrode wires and this first electrode wires at least define one first sub-pixel area and one second sub-pixel area;
The ratio of the resistance value of this resistance elements of part that this resistance elements of part that wherein the first opening comes out comes out with the second opening equates.
9. as claimed in claim 8 emission type display panel, is characterized in that, the area that this second opening in this first sub-pixel area is projected to this substrate is different in essence and is projected to the area of this substrate in the second opening in this second sub-pixel area.
10. as claimed in claim 8 emission type display panel, is characterized in that, this second conductive layer contact is arranged in the surface of this resistance elements of this second opening.
11. as claimed in claim 8 emission type display panels, is characterized in that, this second opening in this first sub-pixel area is to be positioned at this first electrode wires and this second electrode wires staggered place.
12. as claimed in claim 8 emission type display panels, is characterized in that, this second opening in this second sub-pixel area is to be positioned at this first electrode wires and this second electrode wires staggered place.
13. as claimed in claim 8 emission type display panels, is characterized in that, the junction of this first electrode wires and this first electrode has a gap, to make this first electrode wires and this first electrode separation.
14. as claimed in claim 8 emission type display panels, is characterized in that, the area that this first opening in this first sub-pixel area is projected to this substrate is different in essence and is projected to the area of this substrate in this first opening in this second sub-pixel area.
15. as claimed in claim 8 emission type display panels, is characterized in that, this electronic emission element area in this first sub-pixel area is different in essence in this electronic emission element area in this second sub-pixel area.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100128741A TWI475925B (en) | 2011-08-11 | 2011-08-11 | Field emitting display panel |
| TW100128741 | 2011-08-11 |
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| CN102436998A CN102436998A (en) | 2012-05-02 |
| CN102436998B true CN102436998B (en) | 2014-06-04 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1109205A (en) * | 1993-11-29 | 1995-09-27 | 双叶电子工业株式会社 | Field emission type electron source |
| CN1722341A (en) * | 2004-06-29 | 2006-01-18 | 三星Sdi株式会社 | Electron emission device and electron emission display using the same |
| US20060192492A1 (en) * | 2005-02-28 | 2006-08-31 | Nobuyuki Ushifusa | Display panel |
| CN1953130A (en) * | 2005-10-18 | 2007-04-25 | 中原工学院 | Flat active display with goniometric ballast structure and manufacturing technique thereof |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2686027Y (en) * | 2004-01-17 | 2005-03-16 | 东元奈米应材股份有限公司 | Field transmitting display panel feed back circuit with uniform distribution brightness |
| TWI272870B (en) * | 2005-11-18 | 2007-02-01 | Tatung Co | Field emission display device |
| TW200829074A (en) * | 2006-12-29 | 2008-07-01 | Tatung Co Ltd | Field emitting display apparatus |
-
2011
- 2011-08-11 TW TW100128741A patent/TWI475925B/en not_active IP Right Cessation
- 2011-11-29 CN CN201110394220.3A patent/CN102436998B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1109205A (en) * | 1993-11-29 | 1995-09-27 | 双叶电子工业株式会社 | Field emission type electron source |
| CN1722341A (en) * | 2004-06-29 | 2006-01-18 | 三星Sdi株式会社 | Electron emission device and electron emission display using the same |
| US20060192492A1 (en) * | 2005-02-28 | 2006-08-31 | Nobuyuki Ushifusa | Display panel |
| CN1953130A (en) * | 2005-10-18 | 2007-04-25 | 中原工学院 | Flat active display with goniometric ballast structure and manufacturing technique thereof |
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| Publication number | Publication date |
|---|---|
| TW201309087A (en) | 2013-02-16 |
| TWI475925B (en) | 2015-03-01 |
| CN102436998A (en) | 2012-05-02 |
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