CN102413322A - Avionics digital video bus (ADVB) framing system and method based on line synchronization - Google Patents
Avionics digital video bus (ADVB) framing system and method based on line synchronization Download PDFInfo
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Abstract
The invention discloses an avionics digital video bus (ADVB) framing system and method based on line synchronization. The system comprises an ADVB container, a frame header control protocol and an ADVB framing state machine, wherein the ADVB container can map various digital video formats into a fiber channel (FC) frame structure for transmission; the frame header control protocol is a data transmission control method based on the structure of the ADVB container, and the ADVB container uses frame header control parameters to control the transmission of video data; and the ADVB framing state machine is an ADVB framing transmission implementation method provided in accordance with the structure defined by the ADVB container and the requirements of the frame header control protocol. By using the line synchronization mechanism, FPGA (field programmable gate array) resources are saved, and the transmission delay is reduced.
Description
Technical field
The present invention relates to field of video transmission, particularly relate to a kind of based on the row synchronous aviation electronics digital video bus become frame system and framing method.
Background technology
Along with the avionics develop rapidly; Avionic device and digital information sharply increase; Particularly in order to tackle urgent day by day high-performance digital video transmission demand, need in avionics system, set up a high bandwidth between the video source and target, lowly postpone, remote, safe and reliable transmission channel.Optical-fibre channel (FC) is as the representative of bussing technique of new generation; Has very significantly technical advantage with respect to conventional bus; Demand to the aviation electronics video transmission; Agreement FC-AV (ANSIINCITS 356-2002) optical-fibre channel---the audio frequency and video agreement that a kind of FC of utilization of American National Standard Committee (ANSI) in 2002 formulation carries out video transmission; FCAV be a kind ofly support to compress, the real-time Transmission FC agreement of incompressible audio/video signal, the FC-AV agreement has been applied in the video system of F18 and C130AMP at present.
Aviation electronics digital video bus (ADVB; ARINC818); Be for high bandwidth, low postpone, the video interface and the consensus standard of non-compressed word video transmission exploitation; Externally issue by US Airways wireless provider (ARINC) is formal in January, 2007, being applied to at present becomes the de facto standard of the military video system of high-performance in Boeing 787 and two projects of Air Passenger A400M.ADVB is based on the formulation of FC-AV agreement; Simplify to the application of high speed aviation electronic digit video in terms of content, its main feature is embodied in high bandwidth, high reliability, lowly postpones, the non-compression video transmission, resist electromagnetic interference, alleviate cable weight, aspect such as flexibility is high, compatible extensions property is strong.
ADVB possesses very strong flexibility, can adapt to polytype Video Applications, supports the video of various resolution, gray scale, pixel format and frame rate.ADVB supports the various methods of synchronization simultaneously, and is synchronous from simple asynchronous pixel to strictness.Adopt the row synchronization mechanism; Metadata cache only needs the FIFO (data buffer of first in first out) of delegation's size in transmission course; Pass through the framing of the capable field synchronization control data of vision signal simultaneously and send, need not the whole video frame is carried out buffer memory, the ADVB transmission delay is reduced to a line time from a video frame time; With the XGA video is example, and reduce to 20us below from 16.7ms time of delay.
The avionics system of a new generation has proposed new requirement for the aviation electronics video bus at aspects such as communication link reliability, transmission bandwidth, real-time property, transmission range and EMC; Modes such as main at present at home employing LVDS, DVI are transmitted the aviation electronics video, but it can not satisfy the demand of system gradually at aspects such as transmission range, EMC.Aviation electronics digital video bus (ADVB) is for high bandwidth, low postpone, video interface of non-compressed word video transmission exploitation and consensus standard, is the high-performance video transmission standard of formulating to the aviation electronics video system design specially.
Summary of the invention
To the deficiency that prior art exists, the object of the present invention is to provide a kind of based on the synchronous ADVB one-tenth frame system of row.
Another purpose of the present invention is to provide based on the synchronous ADVB framing method of row.
The present invention is primarily aimed at aviation electronics digital video bus standard; Adopt FPGA to realize based on the synchronous ADVB framing method of row; Realize the seamless encapsulation of high-speed video data to the FC frame; Uses in the aviation electronics video system for exploitation and further investigation ADVB bussing technique and to take a firm foundation, the development to video transmission in Chinese large-sized commerce and the military aviation technology simultaneously has great importance.
Goal of the invention of the present invention realizes through following technical scheme.
A kind of based on the row synchronous aviation electronics digital video bus become frame system; Its content comprises: ADVB container, frame head control protocol and ADVB framing state machine; Said ADVB container can shine upon various video formats and in the FC frame structure, transmit; The corresponding complete frame of video of ADVB container, also corresponding simultaneously FC sequence, the corresponding relation of frame of video, ADVB container and FC sequence is illustrated in fig. 1 shown below.
The ADVB container is made up of vessel head (Container Header) and 4 objects (Objects).The ADVB vessel head is represented the composition structure and the association attributes of container.Its length is fixed, and is 22 32 words.The ADVB object is represented specific data type.ADVB has stipulated following four kinds of objects, the expression data of different types.Object 0: auxiliary data; Comprise video attribute information, it and vessel head one are reinstated an independent ADVB frame (frame0) and are carried; Object 1: voice data (in the ADVB standard, not defining its application); Object 2: video data refers to all row of progressive scanned video or the odd-numbered line of interlaced scanning video; Object 3: video data refers to the even number line of interlaced scanning video.The quantity of the FC frame that object 2/ object 3 is corresponding and length are that the attribute by frame of video itself determines.
Frame head control protocol (FHCP) is the data transfer control method that a kind of expense based on the ADVB structure of container is little, delay is low, efficient is high, and ADVB adopts the frame head Control Parameter to come the transmission of control of video data.The frame structure of FC frame is as shown in Figure 2 among the ADVB.
ADVB framing state machine is to require the implementation method that provides a kind of ADVB framing to send according to the structure of ADVB container definition and frame head control protocol.
A kind of method based on the synchronous aviation electronics digital video bus framing of row comprises the steps:
1), at first with video data through pixel packing, and convert 32 bit data to;
2) by FIFO data are carried out buffer memory then, realize isolation simultaneously video clock territory and FC clock zone;
3) under the synchronous control of vision signal row, ADVB framing state machine is accomplished the reading of video data, and the form that simultaneously packing data is packaged into the FC frame is sent.
In the ADVB framing procedure, the effective video data write FIFO delegation, and ADVB framing state machine is attended school FIFO delegation; And accomplish the ADVB framing according to ADVB structure of container and the requirement of frame head control protocol and send; Write delegation and send out delegation, accomplish transmission, finish up to a frame of video with the mode of streamline; And then carry out the transmission of next frame of video, as shown in Figure 5.
The present invention realizes adopting the synchronous method of row based on the synchronous ADVB framing method of row through adopting FPGA, utilizes FC frame (being the ADVB frame) to encapsulate to video data, sends through the FC passage.Adopt capable synchronization mechanism of the present invention, the resource of not only having saved FPGA has also reduced transmission delay.
Description of drawings
Fig. 1 is the corresponding relation figure of frame of video, ADVB container and FC sequence in the system of the present invention;
Fig. 2 is the frame assumption diagram of FC frame in the system of the present invention;
Fig. 3 is that system of the present invention is based on the synchronous ADVB framing scheme figure of row;
Fig. 4 is a system ADVB framing state machine function block diagram of the present invention;
Fig. 5 sends sketch map for system video data framing of the present invention;
Fig. 6 is the contrast relationship figure of system video data of the present invention and FC frame.
Embodiment
How further specify the present invention below in conjunction with specific embodiment realizes.
Embodiment
Though ADVB can adapt to polytype Video Applications; Support the video transmission of various resolution, gray scale, pixel format and frame rate; But for convenience, be example with 2G FC transmission XGA video, describe a kind of based on the synchronous ADVB framing method of row in the present invention.
1) bandwidth evaluation
GA is shown as example with standard x; Required bandwidth is: 1024 (OK/pixel) * 768 (OK) * 8 (element gray scale/position) * 3 (element/pixel) * 60 (refresh rate; Hz) * 1.25 (8b/10b) * 1.05 (is example with typical A DVB protocol overhead)=1.486Gbps, 2.125Gbps FC (hereinafter to be referred as 2G FC) can satisfy transmission requirement.
2) 2G FC transmission XGA video format definition
| Video frame rate | 60Hz |
| Line number | 768 |
| Columns | 1024 |
| Scan mode | Line by line scan |
| Color format | RGB |
| The pixel figure place | 8:8:8:0 |
| Each frame of video comprises the FC frame number | 1536 |
| The FC frame number that every row comprises | 2 |
| The video data that each FC frame comprises | 1536 (byte)/384 (32 words) |
3) implementation
The present invention describe based on the synchronous ADVB framing scheme of row; As shown in Figure 3: 24 RGB888 video datas at first through the pixel packing, convert 32 bit data to; By FIFO data are carried out buffer memory; Realize that simultaneously ADVB framing state machine is core of the present invention, under the control of vision signal row field synchronization to the isolation of video clock territory (tx_pixel_clk) and FC clock zone (fc_clk); Completion is read video data, according to the structure and the requirement of frame head control protocol of ADVB container the form that packing data is packaged into the FC frame is sent simultaneously.
ADVB framing state machine principle once is described below; ADVB framing state machine function block diagram, as shown in Figure 4: after system reset, state and be in wait (sidle) state; After the system of receiving sends enable command; State machine gets into and sends (send_rdy) state of preparation, the video information that configuration will be sent under this state, i.e. vessel head and object 0 related content; Receiving under vsync_trig=1 (the tx_vsync trailing edge marking signal) condition; State machine sends frame0 (send_frame0) state; Under this state; Utilize the video field blanking time to send the frame0 frame, sent after the frame0 frame, state machine gets into video requency frame data preparation (send_vframe_rdy) state that sends.
State machine is being received under fifo_empty=0 (being that FIFO is a non-NULL) and hsync_trig=1 (the tx_hsync trailing edge marking signal) condition at the send_vframe_rdy state, (show and finished writing delegation's video data among the FIFO this moment); Begin to utilize the video line blanking time to send the FC frame, successively go into the send_sof state, the send_frame_header state; Accomplish the transmission of SOF and FC frame head; Then get into and send video data state (send_vdata), Yi Bian read the video data among the FIFO, Yi Bian its payload that is encapsulated into the FC frame is sent; After accomplishing the transmission of hemistich video data (payload of a FC frame); State machine is successively gone into send_crc state, send_eof state, accomplishes after the transmission of a complete FC frame, according to protocol requirement; Behind a FC frame, will send 6 IDLE (free word) at least, state machine gets into the send_aframe_over state afterwards;
State machine will send FC frame and the counting that sends video line at the send_aframe_over state, carry out to judge and state transitions:
If a) send_frame_count=1536 shows and has sent a frame of video, i.e. a video container (container), state machine gets into the send_acontainer_over state; Under this state, the arrival of the next vsync_trig=1 condition of state machine waits gets into the send_frame0 state, carries out the transmission of next frame of video.
B) if do not sent a frame of video, but sent delegation's video, state machine gets into the send_aline_over state so; Under this state, the arrival of fifo_empty=0 and hsync_trig=1 condition under the state machine waits gets into the send_sof state, carries out the transmission of next video line;
C) if only sent hemistich video data (a FC frame), state machine directly gets into the send_sof state so, the transmission of following hemistich video data.
In the process of state machine operation, accomplish the SOF/EOF of FC frame and the control of header signal according to the ADVB standard, for the ADVB receiving terminal is realized to the recovery of video data the necessary control signal being provided.
The present invention adopts capable synchronization mechanism, and metadata cache only needs the FIFO (general 8-16KByte) of delegation's size in transmission course, and need not whole frame buffer (general 4-8MByte).Simultaneously transmission delay being reduced to buffer memory one line time from video frame time of buffer memory, reduced the ADVB link transmission greatly and postponed, is example with the XGA video, and reduce to 20us below from 16.7ms time of delay.Promptly adopt capable synchronization mechanism of the present invention, the resource of not only having saved FPGA has also reduced transmission delay.
The present invention realizes adopting the synchronous method of row based on the synchronous ADVB framing method of row through adopting FPGA, utilizes FC frame (being the ADVB frame) to encapsulate to video data, sends through the FC passage.
Utilization is encapsulated into video data in the FC frame and sends based on going synchronous ADVB framing system and method, adopts the streamline form, reaches good effect.With 2G FC transmission XGA video is example, and the contrast relationship of video data and FC frame is as shown in Figure 6.
The present invention propose based on the synchronous ADVB framing method of row, can not only transmit the XGA video, to the UXGA video, even more high-resolution video can both be realized transmission from VGA.
Claims (5)
- One kind based on the row synchronous aviation electronics digital video bus become frame system, its content comprises: ADVB container, frame head control protocol and ADVB framing state machine is characterized in that:Said ADVB container can shine upon various video formats and in the FC frame structure, transmit, the corresponding complete frame of video of ADVB container, also corresponding simultaneously FC sequence;The frame head control protocol is a kind of data transfer control method based on the ADVB structure of container, and the ADVB container adopts the frame head Control Parameter to come the transmission of control of video data;The implementation method that ADVB framing state machine provides a kind of ADVB framing to send according to the requirement of the structure of ADVB container definition and frame head control protocol;Said ADVB container is made up of vessel head and 4 objects, and 4 objects are respectively: object 0: auxiliary data, comprise video attribute information, and it and vessel head one are reinstated an independent ADVB frame and are carried; Object 1: voice data; Object 2: video data refers to all row of progressive scanned video or the odd-numbered line of interlaced scanning video; Object 3: video data refers to the even number line of interlaced scanning video.
- 2. become frame system according to one kind of claim 1 based on the synchronous aviation electronics digital video bus of row, it is characterized in that: said ADVB vessel head is represented the composition structure and the association attributes of container, and its length is 22 32 words.
- 3. become frame system according to one kind of claim 1 based on the synchronous aviation electronics digital video bus of row, it is characterized in that: the quantity of the FC frame that object 2 and object 3 are corresponding determines with the attribute of length by frame of video itself.
- 4. the method based on the synchronous aviation electronics digital video bus framing of row comprises the steps:1) at first video data is packed through pixel, and convert 32 bit data to;2) by FIFO data are carried out buffer memory then, realize isolation simultaneously video clock territory and FC clock zone;3) under the synchronous control of vision signal row, the completion of ADVB framing state machine is read video data, according to the requirement of ADVB structure of container the form that the video data packing is packaged into the FC frame is sent simultaneously.
- 5. a kind of method according to claim 4 based on the synchronous aviation electronics digital video bus framing of row, it is characterized in that: the effective video data write FIFO delegation, and ADVB framing state machine is attended school FIFO delegation, and accomplishes the ADVB framing and send.
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| CN104735299A (en) * | 2013-12-24 | 2015-06-24 | 中国航空工业集团公司第六三一研究所 | ARINC818 receiving control circuit and method |
| CN104735386A (en) * | 2013-12-24 | 2015-06-24 | 中国航空工业集团公司第六三一研究所 | ADVB sending control circuit and implementation method |
| CN104735551A (en) * | 2013-12-24 | 2015-06-24 | 中国航空工业集团公司第六三一研究所 | ADVB fault tolerance receiving and processing method |
| CN104735448A (en) * | 2013-12-24 | 2015-06-24 | 中国航空工业集团公司第六三一研究所 | ARINC818 sending node data acquisition and control method |
| CN105357070A (en) * | 2015-11-05 | 2016-02-24 | 天津津航计算技术研究所 | FPGA-based ARINC818 bus analysis and test apparatus |
| CN105812365A (en) * | 2016-03-12 | 2016-07-27 | 武汉芯泰科技有限公司 | Programmable and reconfigurable frame processor |
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| CN107509046A (en) * | 2017-07-12 | 2017-12-22 | 西安中飞航空测试技术发展有限公司 | Multichannel DVI integrated video distributing equipments |
| CN107800976A (en) * | 2017-12-14 | 2018-03-13 | 中国航空无线电电子研究所 | Aviation Digital video bus switching matrix based on ADVB |
| CN107947900A (en) * | 2017-11-24 | 2018-04-20 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of port state machine control circuit for ADVB agreements |
| CN107948188A (en) * | 2017-12-19 | 2018-04-20 | 中国航空工业集团公司洛阳电光设备研究所 | A kind of ARINC818 DVI method for converting protocol |
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| CN110830743A (en) * | 2018-08-10 | 2020-02-21 | 上海埃威航空电子有限公司 | DVI-ARINC818 signal converter |
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| CN114257558A (en) * | 2021-12-20 | 2022-03-29 | 中国航空工业集团公司洛阳电光设备研究所 | ARINC 818-based video and communication data transmission method and device |
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| CN117095628B (en) * | 2023-10-17 | 2023-12-26 | 北京数字光芯集成电路设计有限公司 | Progressive and bitwise scanning method and system based on digital pulse width modulation display |
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Application publication date: 20120411 |