CN102395084B - Headset circuit - Google Patents
Headset circuit Download PDFInfo
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- CN102395084B CN102395084B CN201110357600.XA CN201110357600A CN102395084B CN 102395084 B CN102395084 B CN 102395084B CN 201110357600 A CN201110357600 A CN 201110357600A CN 102395084 B CN102395084 B CN 102395084B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R5/00—Stereophonic arrangements
- H04R5/033—Headphones for stereophonic communication
Abstract
The invention discloses a headset circuit. The headset circuit comprises: a headset interface circuit, an audio codec/ a baseband processor and a control software module. The headset interface circuit comprises: a voltage conversion module, a clock shaping and generation circuit and a function switching module. In the invention, through adding the voltage conversion module, the clock shaping and generation circuit and the function switching module in the headset interface circuit, five control signals are used to control states of seven switches of the function switching module and simultaneously the control software module is used to control the working state in the audio codec/ a baseband processor. Therefore, based on a traditional headset and a traditional headset interface, without changing hardware, such as the audio codec/ the baseband processor and the like, by using the headset circuit, electric energy and the clock can be extracted through the headset interface circuit and an external connection circuit under the condition of changing the control software. Power supply and the clock can be provided for a plurality of peripheral equipment and the functions of the headset can be expanded.
Description
Technical field
The present invention relates to a kind of audio devices, particularly relate to a kind of headset circuit.
Background technology
Headset, as its name suggests, is the integrate body of earphone and microphone, current, and along with the development of audio frequency apparatus, the application of headset is very extensive, game, music, video, and it is omnipresent.
Current, headset circuit of the prior art generally comprises audio codec/baseband processor and headset excuse, and wherein audio codec/baseband processor, by earphone microphone interface, drives external earphone and microphone, realizes input and the output of voice signal.But the headset circuit of prior art often only has traditional earphone function, cannot expand the function of headset, limit the use of headset.
In sum, in known prior art there is the problem that cannot expand earphone function in headset circuit, therefore, is necessary to propose improved technological means in fact, solves this problem.
Summary of the invention
There is for overcoming headset circuit in above-mentioned prior art the problem that cannot expand earphone function, main purpose of the present invention is to provide a kind of headset circuit, it can be on the basis of traditional headset and earphone microphone interface, do not change the hardware such as any audio codec/baseband processor, only change and control software, extract electric energy and clock by earphone microphone interface, external circuits, power supply and clock are provided can to a large amount of peripheral hardwares, expanded the function of headset.
For reaching above-mentioned and other object, the present invention proposes a kind of headset circuit, comprises earphone microphone interface circuit, audio codec/baseband processor and software model, and this earphone microphone interface circuit at least comprises:
Voltage transformation module, be connected in a function handover module, this software model is produced and is converted to a direct voltage output through the clock signal of this audio codec/baseband processor under this function handover module control, wherein, in the time that this clock signal frequency is zero, this clock signal is a direct current high level;
Clock shaping and generation circuit, be connected in this function handover module, this software model is produced and to be processed through the clock signal of this audio codec/baseband processor under this function handover module control, produces new clock signal output; And
Function handover module, is connected with external earphone and microphone, and is connected with audio codec/baseband processor by a headset modular plug, switch for realizing state,
Wherein, this headset circuit is switched and utilized simultaneously this this control audio codec/baseband processor of control software control operating state by the state of this function handover module, realizes the switching between difference in functionality.
Further, this headset circuit is realized traditional earphone function, earphone mouth both-end mode produces the independent single-ended input generation power supply of function, earphone mouth of power supply and clock and independent single-ended input produces the function of clock and the independent mode of earphone mouth produces power supply and clock retains the switching between mono headset function simultaneously.
Further, the voltage transformation module that this voltage transformation module is AC-to DC.
Further, this function handover module is realized state switching by the break-make of multiple control switchs.
Further, this function handover module comprises the first control switch by the first to the 5th control signal control, the second control switch, the 3rd control switch, the 4th control switch, the 5th control switch, the 6th control switch and the 7th control switch, this first control switch is arranged between this headset modular plug and R channel earphone, this second control switch is arranged between this headset modular plug and L channel earphone, the 5th control switch one end is connected in L channel earphone, the other end is connected in one end that this first control switch is connected with this headset modular plug, the 3rd control switch one end is connected in one end that this first control switch is connected with this headset modular plug, the other end is connected in this voltage transformation module and this clock shaping and produces circuit, and by the 6th control switch ground connection, the 4th control switch one end is connected in one end that this second control switch is connected with this headset modular plug, the other end is connected in this voltage transformation module and this clock shaping and produces circuit, and by the 7th control switch ground connection.
Further, this first control switch of the first control signal control and the 6th control switch, this second control signal is used for controlling the second control switch and the 7th control switch, the 3rd control signal control control the 3rd control switch, the 4th control signal control the 4th control switch, the 5th control signal control the 5th control switch.
Further, between this first control signal and the 3rd control signal, between this second control signal and the 4th control signal, be negate relation, the 5th control signal is for the 4th control signal is with the first control signal phase and form.
Further, this headset circuit is that high level, this first control signal are that high level, the 4th control signal are that low level, the 3rd control signal are that low level and the 5th control signal are the switching that low level realizes traditional earphone function by this second control signal of this software model control.
Further, this headset circuit is that low level, this first control signal are that low level, the 4th control signal are that high level, the 3rd control signal are that high level and the 5th control signal are that low level realizes the switching that earphone mouth both-end mode produces power supply and time clock feature by this second control signal of this software model control.
Further, this headset circuit is that low level, this first control signal are that low level, the 4th control signal are that high level, this second control signal are that high level, the 5th control signal are low level by this second control signal of this software model control, and negative terminal input by stipulating this voltage transformation module effectively, the anode input that do not respond and stipulate this clock shaping and produce circuit of anode input regulation effectively, negative terminal input do not respond and realizes the independent single-ended input of earphone mouth and produce the switching that power supply and independent single-ended input produce time clock feature.
Further, this headset circuit is that low level, the first control signal are that high level, the 4th control signal are that high level, the 3rd control signal are that low level, the 5th control signal are that high level is realized the independent mode of earphone mouth and produced the switching that power supply and clock retain mono headset function simultaneously by this second control signal of this software model control.
Further, this clock shaping and generation circuit are processed the clock signal of input, the new clock signal of output to input clock signal shaping and the new clock signal to input clock signal frequency multiplication.
Further, this headset circuit can be configured to use the bus communication between external equipment and the main frame of this direct voltage and new clock signal, this headset circuit the general basic input/output interface of this audio codec/baseband processor be configured to the to conform with the regulations data port of bus request, is configured to the output of L channel power amplifier and (or) R channel power amplifier by this software model clock and (or) the frequency-dividing clock of regulation bus request by this software model simultaneously.
Compared with prior art, a kind of headset circuit of the present invention by increasing voltage transformation module in earphone microphone interface circuit, clock shaping and generation circuit and function handover module, utilize the state of seven switches of five control signal control function handover modules to utilize the operating state in software model control audio codec/baseband processor simultaneously, make the present invention can be on the basis of traditional headset and earphone microphone interface, do not change the hardware such as any audio codec/baseband processor, only change and control software, by earphone microphone interface circuit, external circuits extracts electric energy and clock, power supply and clock are provided can to a large amount of peripheral hardwares, expand the function of headset.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of the preferred embodiment of a kind of headset circuit of the present invention;
Fig. 2 is traditional headset circuit that Fig. 1 forms by configuration;
Fig. 3 is the circuit that both-end mode that Fig. 1 forms by configuration produces power supply and clock;
Fig. 4 is that the single-ended input power of independence and the single-ended input clock that Fig. 3 forms by change produces circuit;
Fig. 5 is single-ended generation power supply and the clock circuit that Fig. 1 forms by configuration.
Embodiment
Below, by specific instantiation accompanying drawings embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by content disclosed in the present specification.The present invention also can be implemented or be applied by other different instantiation, and the every details in this specification also can be based on different viewpoints and application, carries out various modifications and change not deviating under spirit of the present invention.
Fig. 1 is the circuit structure diagram of the preferred embodiment of a kind of headset circuit of the present invention.As shown in Figure 2, a kind of headset circuit of the present invention, by peripheral earphone and microphone, can realize input and the output of voice signal, and can realize traditional earphone function and with the switching between earphone extracting energy, time clock feature, it at least comprises: earphone microphone interface circuit 11, audio codec/baseband processor 12 and software model 13.
Wherein, earphone microphone interface circuit 11 comprises voltage transformation module 110, clock shaping and produces circuit 111, function handover module 112 and headset modular plug 113, voltage transformation module 110 is one alternating voltage to be converted to the module of direct voltage, it is under the control in handoff functionality module 112, and the clock signal that this software model 13 is produced and process through this audio codec/baseband processor 12 is converted to direct voltage VDDL; Clock shaping and generation circuit 111 are under the control in handoff functionality module 112, and the clock signal that this software model 13 produces and processes through this audio codec/baseband processor 12 is processed, and produces new clock signal; Handoff functionality module 112 is connected in voltage transformation module 110, clock shaping and produces circuit 111, earphone, microphone, and be connected with audio codec/baseband processor 12 by headset modular plug 112, switch and utilize control software 13 to control the operating state of audio codec/baseband processor 12 simultaneously by the state of function handover module 112, can realize two kinds of switchings between function.
In preferred embodiment of the present invention, function handover module 112 comprises the first to the 7th control switch (K1-K7), first to the 7th control switch is here by five control signal controls, the first control signal CTRL_R controls the first control switch K1 and the 6th control switch K6, the second control signal CTRL_L is used for controlling the second control switch K2 and the 7th control switch K7, the 3rd control signal control CTRL_RB controls the 3rd control switch K3, the 4th control signal CTRL_LB controls the 4th control switch K4, the 5th control signal CTRL_LB & CTRL_R controls the 5th control switch K5, wherein the first control switch K1 is arranged between headset modular plug 112 and R channel earphone, the second control switch K2 is arranged between headset modular plug 112 and L channel earphone, the 5th control switch K5 one end is connected in L channel earphone, the other end is connected in one end that the first control switch K1 is connected with headset modular plug 112, the 3rd control switch K3 one end is connected in one end that the first control switch K1 is connected with headset modular plug 112, the other end is connected in voltage transformation module 110 and clock shaping and produces circuit 111, and by the 6th control switch K6 ground connection, the 4th control switch K4 one end is connected in one end that the second control switch K2 is connected with headset modular plug 112, the other end is connected in voltage transformation module 110 and clock shaping and produces circuit 111, and by the 7th control switch K7 ground connection, like this, function is switched module 112 by switching the first to the 5th control signal (CTRL_R, CTRL_L, CTRL_RB, CTRL_LB and CTRL_LB & CTRL_R) control the first to the 7th control switch (K1-K7) state, software model 13 is controlled the operating state in audio decoder/baseband processor 12 simultaneously, can realize two kinds of switchings between function.
Below will further coordinate Fig. 1 that the present invention's operation principle is described: for audio decoder/baseband processor 12 parts, amplifier (AMPB) has been realized the output of microphone bias voltage, control its operating state by internal register, Fig. 1 is abstracted into CB the control signal of AMPB internal register, for convenience of explanation, when regulation CB high level, AMPB is turned off, export MICBIAS simultaneously and be set to high-impedance state, when CB is low level, AMPB opens, outputing to MICBIAS after vdd voltage voltage stabilizing.The signal of telecommunication that programmable gain amplifier (PGA) has been realized the microphone that AIN is come amplifies, then be input to analog to digital converter (ADC), power amplifier (AMPL) has been realized the electric drive to external L channel earphone coil, control its operating state by internal register, the control signal of L channel power amplifier internal register is abstracted into CL, when regulation CL high level, the power amplifier of L channel is turned off, export HPLOUT simultaneously and be set to high-impedance state, when CL is low level, the power amplifier of L channel is opened, the signal VSIGL coming from inner L channel digital to analog converter (Left Ch DAC) is driven into output HPLOUT, power amplifier (AMPR) has been realized the electric drive to external R channel earphone coil, control its operating state by internal register, the control signal of R channel power amplifier internal register is abstracted into CR, when regulation CR high level, the power amplifier of R channel is turned off, export HPROUT simultaneously and be set to high-impedance state, when CR is low level, the power amplifier of R channel is opened, the signal VSIGR coming from inner R channel digital to analog converter (RightCh DAC) is driven into output HPROUT, in Fig. 1, RB is the resistance that biasing use is provided to microphone opening, to microphone, input provides isolated DC to use to C1, GPIO mouth is used by Mike's mouth inputoutput data, CL provides every straight use to L channel earphone output, certainly in some application, can there is no CL yet, to R channel earphone, output provides every straight use CR, in some application, can there is no CR yet, software model 13 is for controlling audio codec/baseband processor etc., to realize traditional earphone function and the switching by earphone extracting energy and time clock feature, for earphone microphone interface circuit 11 parts, by switching the first to the 5th control signal (CTRL_R, CTRL_L, CTRL_RB, CTRL_LB, CTRL_LB & CTRL_R) control the first to the 7th control switch (K1-K7) state simultaneously software model 13 control the operating state in audio codec/baseband processor 12, can realize two kinds of switchings between function, here the first to the 7th control switch can be physical switch, as electric switch, mechanical switch, also can be the switch that all equivalences form, ACDC CONV is the voltage transformation module 110 of AC-to DC, VDDL is local power supply.CLK GEN is clock shaping and produces circuit 111, CLKBUF is the shaping to input clock signal, CLKHS is the frequency multiplication to input clock signal, can certainly produce the clock of more output frequency, the clock that CLKGEN produces includes but are not limited to CLKBUF and CLKHS, wherein, VDDL, CLKBUF and CLKHS can build a lot of practical application circuit.
Fig. 2 is traditional headset circuit that Fig. 1 forms by configuration.The 12 end configurations of audio codec/baseband processor are as follows: CB low level, AMPB opens, MICBIAS port has the bias voltage of microphone, MICBIAS connects RB provides biasing to MIC point, and MIC point arrives AIN via C1 simultaneously, the audio electrical signal coming from microphone is passed to the input of PGA, then the output of PGA connects the input of ADC.CL low level AMPL opens, and inner left channel audio signal arrives VSIGL point via Left Ch DAC, then arrives HPLOUT point again via CL arrival HPL point via AMPL.CR low level AMPR opens, and inner right channel audio signal arrives VSIGR point via Right Ch DAC, then arrives HPROUT point again via CR arrival HPR point via AMPR.The 11 end configurations of earphone microphone interface circuit are as follows: first explanation, first five control signals to the 7th control switch (the first to the 5th control signal CTRL_R, CTRL_L, CTRL_RB, CTRL_LB, CTRL_LB & CTRL_R) there is a correlation, between the first control signal CTRL_R and the 3rd control signal CTRL_RB, be wherein negate relation, between the second control signal CTRL_L and the 4th control signal CTRL_LB, it is negate relation, the 5th control signal CTRL_LB & CTRL_R is the 4th control signal CTRL_LB and the first control signal CTRL_R phase and forms, for convenience of explanation, closure and the disconnection of switch are described with the low and high level of abstract switch controlling signal out, regulation high-level control signal is corresponding closed, low level control signal is corresponding to be disconnected.The second control signal CTRL_L is high level, the first control signal CTRL_R is high level, so corresponding, the 4th control signal CTRL_LB is low level, the 3rd control signal CTRL_RB is low level, and the 5th control signal CTRL_LB & CTRL_R is low level, therefore, as shown in Figure 2, Fig. 2 is the headset circuit only with traditional earphone function that the present invention forms by configuration setting to the circuit of equivalence.
Fig. 3 is the circuit that both-end mode that Fig. 1 forms by configuration produces power supply and clock.Wherein the 12 end configurations of audio codec/baseband processor are as follows: CB low level, AMPB opens, MICBIAS port has the bias voltage of microphone, MICBIAS connects RB provides biasing to MIC point, and MIC point arrives AIN via C1 simultaneously, the audio electrical signal coming from microphone is passed to the input of PGA, then the output of PGA connects the input of ADC.CL low level AMPL opens, inner L channel is not walked audio signal, produce interchange clock signal by controlling software, this signal arrives VSIGL point via Left Ch DAC, then arrives HPLOUT point again via CL arrival HPL point via AMPL, and CR low level AMPR opens, inner R channel is not walked audio signal, produce interchange clock signal by controlling software, this signal arrives VSIGR point via RightCh DAC, then arrives HPROUT point again via CR arrival HPR point via AMPR.Earphone microphone interface 11 end configurations are as follows: the second control signal CTRL_L is low level, the first control signal CTRG_R is low level, so corresponding, the 4th control signal CTRL_LB is high level, the 3rd control signal CTRL_RB is high level, the 5th control signal CTRL_LB & CTRL_R is low level, ACDCCONV is that both-end exchanges the voltage transformation module that is input to direct current output, VDDL is local power supply, CLKGEN is clock shaping and produces circuit, CLKBUF is the shaping to both-end input clock signal, CLKHS is the frequency multiplication to input clock signal, therefore, the circuit of equivalence as shown in Figure 3.That is: Fig. 3 is the equivalent electric circuit that earphone mouth both-end mode produces power vd DL and clock CLKBUF, CLKHS, and the benefit that both-end mode is powered is to obtain stronger driving force than single-ended.
Fig. 4 is that the single-ended input power of independence and the single-ended input clock that Fig. 3 forms by change produces circuit.It is identical that audio codec/baseband processor 12 ends configure the Circnit Layout corresponding with Fig. 3, it is also identical that earphone microphone interface 11 ends configure the Circnit Layout corresponding with Fig. 3, that different is the ACDC CONV that the ACDCCONV of both-end input in Fig. 3 is changed into single-ended input, link ACDC CONV although there are two lines, only allow an onset wherein, the CLK GEN simultaneously both-end in Fig. 3 being inputted changes the CLKGEN of single-ended input into.Use specifically an earphone cord instead and independently produce power supply, another root earphone cord independently produces clock.The 12 end configurations of audio codec/baseband processor are as follows: CB low level, AMPB opens, MICBIAS port has the bias voltage of microphone, MICBIAS connects RB provides biasing to MIC point, and MIC point arrives AIN via C1 simultaneously, the audio electrical signal coming from microphone is passed to the input of PGA, then the output of PGA connects the input of ADC.CL low level AMPL opens, and inner L channel is not walked audio signal, produces interchange clock signal by controlling software, and this signal arrives VSIGL point via Left Ch DAC, then arrives HPL point via CL again via AMPL arrival HPLOUT point.CR low level AMPR opens, and inner R channel is not walked audio signal, produces interchange clock signal by software model 13, and this signal arrives VSIGR point via Right Ch DAC, then arrives HPROUT point again via CR arrival HPR point via AMPR.It should be noted that at this, in the time that clock signal frequency is 0, clock signal is a direct current high level, now arranges corresponding capacitance CR short circuit, and ACDC CONV module only need be converted to direct voltage output direct voltage.Earphone microphone interface 11 end configurations are as follows: the second control signal CTRL_L and the first control signal CTRL_R are low level, so corresponding, the 4th control signal CTRL_LB is high level, the second control signal CTRL_RB is high level, the 5th control signal CTRL_LB & CTRL_R is low level, the negative terminal input regulation of ACDC CONV effectively, the anode input regulation ACDC CONV of ACDC CONV does not respond, the line and the internal circuit that concerning ACDC CONV, are connected to anode from outside disconnect, in like manner, the anode input regulation of CLK GEN effectively, negative terminal input does not respond, therefore, the circuit of equivalence as shown in Figure 4.Fig. 4 is the equivalent electric circuit that the independent single-ended input HPR generation power vd DL of earphone mouth and independent single-ended input HPL produce clock CLKBUF, CLKHS.(note, HPR and HPL can exchange at this, and Fig. 4 is two kinds of one in realization) benefit independently-powered and generation clock is to obtain higher-quality clock and power supply.
Fig. 5 is single-ended generation power supply and the clock circuit that Fig. 1 forms by configuration, also retains mono headset function simultaneously.The 12 end configurations of audio codec/baseband processor are as follows: CB low level, AMPB opens, MICBIAS port has the bias voltage of microphone, MICBIAS connects RB provides biasing to MIC point, and MIC point arrives AIN via C1 simultaneously, the audio electrical signal coming from microphone is passed to the input of PGA, the output of PGA connects the input of ADC again, CL low level AMPL opens, inner L channel is not walked audio signal, produce interchange clock signal by software model 13, this signal arrives VSIGL point via Left ChDAC, arrive HPLOUT point via AMPL again and arrive HPL point via CL again.CR low level AMPR opens, the inner R channel audio signal that remains unchanged away, this signal arrives VSIGR point via Right ChDAC, via CR arrival HPR point, (left and right acoustic channels can exchange herein again to arrive HPROUT point via AMPR again, for convenience of explanation, chosen a kind of possible mode).The 11 end configurations of earphone microphone interface circuit are as follows: the second control signal CTRL_L is low level, the first control signal CTRL_R is high level, so corresponding, the 4th control signal CTRL_LB is high level, the 3rd control signal CTRL_RB is low level, the 5th control signal CTRL_LB & CTRL_R is high level, and therefore, the circuit of equivalence as shown in Figure 5.Fig. 5 is the equivalent electric circuit that the independent mode of earphone mouth produces power vd DL and clock CLKBUF, CLKHS, retains mono headset function simultaneously.
At this, it should be noted that, the functional circuit that Fig. 3, Fig. 4 and Fig. 5 are corresponding can be configured to utilize the bus communication between external equipment and the main frame of VDDL, CLKBUF, CLKHS.Specifically, by software model 13 the GPIO mouth of audio codec/baseband processor 12 be configured to the to conform with the regulations data port of bus request, by software model 13, HPLOUT and (or) HPROUT are configured to clock and (or) the frequency-dividing clock of regulation bus request simultaneously, so just possesses the physical basis of bus communication, there is synchronised clock, there is power supply, have the bidirectional data line of input and output.Can be configured to and the bus of I2C compatibility, also can be configured to and the bus of two-wire bus compatibility, can also be configured to some other bus.
In sum, a kind of headset circuit of the present invention by increasing voltage transformation module in earphone microphone interface circuit, clock shaping and generation circuit and function handover module, utilize the state of seven switches of five control signal control function handover modules to utilize the operating state in software model control audio codec/baseband processor simultaneously, make the present invention can be on the basis of traditional headset and earphone microphone interface, do not change the hardware such as any audio codec/baseband processor, only change and control software, by earphone microphone interface circuit, external circuits extracts electric energy and clock, power supply and clock are provided can to a large amount of peripheral hardwares, expand the function of headset.Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any those skilled in the art all can, under spirit of the present invention and category, modify and change above-described embodiment.Therefore, the scope of the present invention, should be as listed in claims.
Claims (12)
1. a headset circuit, comprises earphone microphone interface circuit, audio codec/baseband processor and software model, it is characterized in that, this earphone microphone interface circuit at least comprises:
Voltage transformation module, be connected in a function handover module, this software model is produced and is converted to a direct voltage output through the clock signal of this audio codec/baseband processor under this function handover module control, wherein, in the time that this clock signal frequency is zero, this clock signal is a direct current high level;
Clock shaping and generation circuit, be connected in this function handover module, this software model is produced and to be processed through the clock signal of this audio codec/baseband processor under this function handover module control, produces new clock signal output; And
Function handover module, is connected with external earphone and microphone, and is connected with audio codec/baseband processor by a headset modular plug, switch for realizing state,
Wherein, this headset circuit is switched and utilized simultaneously this this audio codec/baseband processor of software model control operating state by the state of this function handover module, realizes the switching between difference in functionality;
This headset circuit is realized traditional earphone function, earphone mouth both-end mode produces the independent single-ended input generation power supply of function, earphone mouth of power supply and clock and independent single-ended input produces the function of clock and the independent mode of earphone mouth produces power supply and clock retains the switching between mono headset function simultaneously.
2. headset circuit as claimed in claim 1, is characterized in that: the voltage transformation module that this voltage transformation module is AC-to DC.
3. headset circuit as claimed in claim 1, is characterized in that: this function handover module is realized state by the break-make of multiple control switchs and switched.
4. headset circuit as claimed in claim 3, it is characterized in that: this function handover module comprises the first control switch by the first to the 5th control signal control, the second control switch, the 3rd control switch, the 4th control switch, the 5th control switch, the 6th control switch and the 7th control switch, this first control switch is arranged between this headset modular plug and R channel earphone, this second control switch is arranged between this headset modular plug and L channel earphone, the 5th control switch one end is connected in L channel earphone, the other end is connected in one end that this first control switch is connected with this headset modular plug, the 3rd control switch one end is connected in one end that this first control switch is connected with this headset modular plug, the other end is connected in this voltage transformation module and this clock shaping and produces circuit, and by the 6th control switch ground connection, the 4th control switch one end is connected in one end that this second control switch is connected with this headset modular plug, the other end is connected in this voltage transformation module and this clock shaping and produces circuit, and by the 7th control switch ground connection.
5. headset circuit as claimed in claim 4, it is characterized in that: this first control switch of the first control signal control and the 6th control switch, this second control signal is used for controlling the second control switch and the 7th control switch, the 3rd control signal control control the 3rd control switch, the 4th control signal control the 4th control switch, the 5th control signal control the 5th control switch.
6. headset circuit as claimed in claim 5, it is characterized in that: between this first control signal and the 3rd control signal, between this second control signal and the 4th control signal, be negate relation, the 5th control signal is for the 4th control signal is with the first control signal phase and form.
7. headset circuit as claimed in claim 6, is characterized in that: this headset circuit is that high level, this first control signal are that high level, the 4th control signal are that low level, the 3rd control signal are that low level and the 5th control signal are the switching that low level realizes traditional earphone function by this second control signal of this software model control.
8. headset circuit as claimed in claim 6, is characterized in that: this headset circuit is that low level, this first control signal are that low level, the 4th control signal are that high level, the 3rd control signal are that high level and the 5th control signal are that low level realizes the switching that earphone mouth both-end mode produces power supply and time clock feature by this second control signal of this software model control.
9. headset circuit as claimed in claim 6, it is characterized in that: this headset circuit is low level by this second control signal of this software model control, this first control signal is low level, the 4th control signal is high level, this second control signal is high level, the 5th control signal is low level, and effective by stipulating the negative terminal input of this voltage transformation module, anode input regulation does not respond and stipulates that the anode input of this clock shaping and generation circuit is effective, negative terminal input does not respond the switching that realizes the independent single-ended input generation power supply of earphone mouth and independent single-ended input generation time clock feature.
10. headset circuit as claimed in claim 6, is characterized in that: this headset circuit is that low level, the first control signal are that high level, the 4th control signal are that high level, the 3rd control signal are that low level, the 5th control signal are that high level is realized the independent mode of earphone mouth and produced the switching that power supply and clock retain mono headset function simultaneously by this second control signal of this software model control.
11. headset circuits as claimed in claim 1, is characterized in that: this clock shaping and generation circuit are processed the clock signal of input, the new clock signal of output to input clock signal shaping and the new clock signal to input clock signal frequency multiplication.
12. headset circuits as claimed in claim 1, it is characterized in that: this headset circuit can be configured to use the bus communication between external equipment and the main frame of this direct voltage and new clock signal, this headset circuit by this software model the general basic input/output interface of this audio codec/baseband processor be configured to the to conform with the regulations data port of bus request, simultaneously by this software model the output of L channel power amplifier and/or R channel power amplifier be configured to conform with the regulations clock and/or the frequency-dividing clock of bus request.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110357600.XA CN102395084B (en) | 2011-11-11 | 2011-11-11 | Headset circuit |
| PCT/CN2012/084362 WO2013067958A1 (en) | 2011-11-11 | 2012-11-09 | Headset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110357600.XA CN102395084B (en) | 2011-11-11 | 2011-11-11 | Headset circuit |
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| Publication Number | Publication Date |
|---|---|
| CN102395084A CN102395084A (en) | 2012-03-28 |
| CN102395084B true CN102395084B (en) | 2014-05-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110357600.XA Active CN102395084B (en) | 2011-11-11 | 2011-11-11 | Headset circuit |
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| CN (1) | CN102395084B (en) |
| WO (1) | WO2013067958A1 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102395084B (en) * | 2011-11-11 | 2014-05-14 | 杭州硅星科技有限公司 | Headset circuit |
| CN102427569A (en) * | 2011-12-20 | 2012-04-25 | 杭州硅星科技有限公司 | Headset interface and GPIO (General Purpose Input/Output) interface multiplex circuit structure |
| CN102983756A (en) * | 2012-11-28 | 2013-03-20 | 孙本彤 | Intelligent external device power supply method and intelligent external device power supply device |
| CN105282639B (en) * | 2014-07-04 | 2019-07-23 | 杭州硅星科技有限公司 | Earphone microphone interface control system and earphone microphone interface control method |
| CN105554606B (en) * | 2015-12-15 | 2019-03-12 | 广州三星通信技术研究有限公司 | Digital earphone and electronic equipment |
| CN106101903B (en) * | 2016-08-09 | 2022-07-01 | 杭州纳雄科技有限公司 | Digital headset, headset system and control method thereof |
| CN111698590A (en) * | 2020-07-22 | 2020-09-22 | 安徽信息工程学院 | Intelligence earphone of running based on wireless charging |
| CN113035215B (en) * | 2021-02-02 | 2022-12-13 | 昆山海菲曼科技集团有限公司 | Audio signal processing chip and earphone |
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| EP0999721A2 (en) * | 1998-11-07 | 2000-05-10 | Samsung Electronics Co., Ltd. | Device for controlling connection of built-in type ear-microphone for portable radio terminal |
| CN201188444Y (en) * | 2008-04-24 | 2009-01-28 | 中兴通讯股份有限公司 | Data line capable of implementing electrification and earphone function |
| CN201359725Y (en) * | 2009-01-21 | 2009-12-09 | 青岛海信移动通信技术股份有限公司 | USB interface circuit and portable hand-held device provided with the circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN2759090Y (en) * | 2004-12-07 | 2006-02-15 | 联想(北京)有限公司 | Loudspeaker box device |
| TWI405990B (en) * | 2009-10-21 | 2013-08-21 | Htc Corp | Electronic device and method thereof for identifying electronic accessory |
| EP2333957B1 (en) * | 2009-12-04 | 2015-01-28 | Nxp B.V. | A clock signal generator |
| CN101894562A (en) * | 2010-07-02 | 2010-11-24 | 中兴通讯股份有限公司 | Method and terminal for reducing influence of environment noise on video |
| CN102395084B (en) * | 2011-11-11 | 2014-05-14 | 杭州硅星科技有限公司 | Headset circuit |
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2011
- 2011-11-11 CN CN201110357600.XA patent/CN102395084B/en active Active
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0999721A2 (en) * | 1998-11-07 | 2000-05-10 | Samsung Electronics Co., Ltd. | Device for controlling connection of built-in type ear-microphone for portable radio terminal |
| CN201188444Y (en) * | 2008-04-24 | 2009-01-28 | 中兴通讯股份有限公司 | Data line capable of implementing electrification and earphone function |
| CN201359725Y (en) * | 2009-01-21 | 2009-12-09 | 青岛海信移动通信技术股份有限公司 | USB interface circuit and portable hand-held device provided with the circuit |
Also Published As
| Publication number | Publication date |
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| WO2013067958A1 (en) | 2013-05-16 |
| CN102395084A (en) | 2012-03-28 |
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