CN102375328B - Testing photo mask template and application thereof - Google Patents
Testing photo mask template and application thereof Download PDFInfo
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- CN102375328B CN102375328B CN 201110355639 CN201110355639A CN102375328B CN 102375328 B CN102375328 B CN 102375328B CN 201110355639 CN201110355639 CN 201110355639 CN 201110355639 A CN201110355639 A CN 201110355639A CN 102375328 B CN102375328 B CN 102375328B
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Abstract
The invention relates to a testing photo mask template and application thereof. The testing photo mask template is used for testing a current metal layer; the layout of the testing photo mask template consists of n*m regions with different pattern densities; each region comprises a dense line array and a redundancy pattern array; n is an integer which is more than or equal to 1; and m is an integer which is more than or equal to 1. By adopting the testing photo mask template which has a metal layer redundancy metal filling application function and a photo-etching process defect monitoring function, the efficiencies of metal layer redundancy metal filling design and metal layer chemical-mechanical grinding process development are increased effectively, the predicting efficiency of the flatness of a metal layer which is ground chemically and mechanically and the required pattern density regulating efficiency are increased effectively, and the cost of a testing photo mask used in a photo-etching process module can be reduced simultaneously.
Description
Technical field
The present invention relates to semiconductor applications, particularly a kind of test light mask plate and application thereof.
Background technology
Along with the integrated level of semi-conductor chip improves constantly, transistorized characteristic dimension is constantly dwindled.After entering into 130 nm technology node, be subject to the restriction of the high-ohmic of aluminium, copper-connection substitution of Al interconnection gradually becomes metal interconnected main flow.Realize because the dry etch process of copper is difficult, the method for making of copper conductor can not obtain by etching sheet metal as aluminum conductor.The method for making of the copper conductor that extensively adopts now is the embedding technique that is called Damascus technics.This technique low k value dielectric layer of deposition at first on silicon chip then by photoetching be etched in and form metallic channel in dielectric layer, continues that follow-up metal level deposits and the metal level cmp is made plain conductor.
Surface flatness after cmp and metallic pattern density relationship are close.In order to reach uniform grinding effect, require the metallic pattern density on silicon chip even as far as possible.And the metallic pattern density of product design usually can not satisfy the requirement of cmp uniformity coefficient.Solution is to fill redundancy metal at the white space of domain to make domain pattern density homogenising.
Traditional method is to utilize the artificial uniformity coefficient that redundancy metal improves the domain pattern density of filling.This method efficient is not high.Advanced method is to utilize simulation softward to improve the efficient of filling the redundancy metal graphic designs.But existing method is aspect the efficient of development of metallic stratification mechanical milling tech, and aspect the flatness after prediction metal level cmp in fast-changing client's product pattern density situation, cost is higher, and efficient also can satisfy the demand of design and development not to the utmost.
Summary of the invention
The purpose of this invention is to provide a kind of test light mask plate domain and application thereof, with the efficient that the efficient of the efficient of improve filling the redundancy metal graphic designs, the exploitation of metal level chemical mechanical milling tech and prediction are adjusted through the metal level flatness after cmp and the pattern density that needs, reduce the cost of test light mask.
Technical solution of the present invention is a kind of test light mask plate, be used for testing current metal level, the domain of described test light mask plate is made of nxm zone, each described zone has different pattern densities, each zone comprises intensive line array and redundant pattern array, wherein n is the integer more than or equal to 1, and m is the integer more than or equal to 1.
As preferably: the lines live width of described intensive line array is more than or equal to the minimum distinguishable live width when layer metal level.
As preferably: described redundant pattern array is made of the redundant pattern of same size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width when layer metal level.
As preferably: described redundant pattern array is made of the redundant pattern of different size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width when layer metal level.
The present invention also provides a kind of application of described test light mask plate, comprises the following steps:
Obtain the pattern density in nxm zone in the optical mask plate domain and the pattern density gradient of adjacent area;
Deposit low dielectric constant films on substrate;
Apply photoresist on low dielectric constant films, photoetching forms the figure of test light mask plate;
The etching low dielectric constant film-shaped becomes corresponding to the metallic channel of intensive lines with corresponding to the redundancy metal groove of redundant pattern;
At said structure surface deposition metal;
Cmp forms the metal level that is comprised of wire metal and redundancy metal;
Measure the flatness through metal level after cmp, set up the process menu of metal level cmp;
Obtain the pattern density in nxm zone, the pattern density gradient of adjacent area and the flatness Relations Among after each zone process cmp.
As preferably: the lines live width of described intensive line array is more than or equal to the minimum distinguishable live width when layer metal level.
As preferably: described redundant pattern array is made of the redundant pattern of same size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width when layer metal level.
As preferably: described redundant pattern array is made of the redundant pattern of different size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width when layer metal level.
Compared with prior art, the present invention has the test light mask that produces the defective function in redundant metal filling of metal layer application function and monitoring photoetching technique by use, effectively improve the efficient of redundant metal filling of metal layer design and the exploitation of metal level chemical mechanical milling tech, effectively improve the efficient that prediction is adjusted through the metal level flatness after cmp and the pattern density that needs, can reduce the cost of institute's use test photomask in the photoetching process module simultaneously.
Description of drawings
Fig. 1 is the domain schematic diagram of test light mask plate of the present invention.
Fig. 2 is the schematic diagram of test light mask plate of the present invention.
Fig. 3 a is the redundant pattern array schematic diagram of same size of the present invention.
Fig. 3 b is the redundant pattern array schematic diagram of different size of the present invention.
Fig. 4 is the sectional view after the metal level cmp in the application of test light mask plate of the present invention.
Embodiment
The present invention is further detailed in conjunction with the accompanying drawings below:
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can be in the situation that do similar popularization without prejudice to intension of the present invention, so the present invention is not subjected to the restriction of following public concrete enforcement.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the present invention is described in detail in detail; for ease of explanation; the sectional view of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three-dimensional space that should comprise in addition, length, width and the degree of depth in actual fabrication.
See also illustrated in figures 1 and 2, in the present embodiment, a kind of test light mask plate, be used for testing current metal level, the domain of described test light mask plate is made of nxm zone (D11, D12, D21, D22...Dnm), and described each zone has different pattern densities, and each zone comprises intensive line array 1 and redundant pattern array 2, wherein n is the integer more than or equal to 1, and m is the integer more than or equal to 1.The lines live width of described intensive line array 1 is more than or equal to the minimum distinguishable live width when layer metal level.As shown in Fig. 3 a and 3b, described redundant pattern array 2 is made of same size or redundant pattern different size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width when layer metal level.
The application of above-mentioned test light mask plate comprises the following steps:
Set up in the optical mask plate domain database of the pattern density gradient of the pattern density in nxm zone and adjacent area;
Deposit low dielectric constant films on substrate;
Apply photoresist on low dielectric constant films, photoetching forms the figure of test light mask plate;
The etching low dielectric constant film-shaped becomes corresponding to the metallic channel of intensive lines with corresponding to the redundancy metal groove of redundant pattern;
At said structure surface deposition metal;
Cmp forms the metal level that is comprised of wire metal and redundancy metal; Sectional view after grinding is specially low dielectric constant films 3, wire metal 4, redundancy metal 5 as shown in Figure 4;
Measure the flatness through metal level after cmp, set up the process menu of metal level cmp;
Set up the density in nxm zone, the density gradient of adjacent area and the database of the flatness Relations Among after each zone process cmp.
According to the pattern density of client's product, and adjacent pattern density gradient, utilize above-mentioned database prediction through the flatness of the metal level after cmp and the design of the redundancy metal filling of making the pattern density adjustment.
Has the test light mask that produces the defective function in redundant metal filling of metal layer application function and monitoring photoetching technique by use, effectively improve the efficient of redundant metal filling of metal layer design and the exploitation of metal level chemical mechanical milling tech, effectively improve and predict the efficient of adjusting through the flatness after the metal level cmp and the pattern density that needs, the while can reduce the cost of institute's use test photomask in the photoetching process module.
The above is only preferred embodiment of the present invention, and all equalizations of doing according to claim scope of the present invention change and modify, and all should belong to the covering scope of claim of the present invention.
Claims (4)
1. the application of a test light mask plate, described test light mask plate is used for testing the flatness of current metal level and the relation of pattern density, the domain of described test light mask plate is made of n x m zone, each described zone has different pattern densities, each zone comprises intensive line array and redundant pattern array, and wherein n is the integer more than or equal to 1, and m is the integer more than or equal to 1, it is characterized in that, the application of described test light mask plate comprises the following steps:
Obtain the pattern density in m zone of n x in the optical mask plate domain and the pattern density gradient of adjacent area;
Deposit low dielectric constant films on substrate;
Apply photoresist on low dielectric constant films, photoetching forms the figure of test light mask plate;
The etching low dielectric constant film-shaped becomes corresponding to the metallic channel of intensive lines with corresponding to the redundancy metal groove of redundant pattern;
Surface deposition metal at described low dielectric constant films, described metallic channel and described redundancy metal groove;
Cmp forms the metal level that is comprised of wire metal and redundancy metal;
Measure the flatness through metal level after cmp, set up the process menu of metal level cmp;
Obtain the pattern density in m zone of n x, the pattern density gradient of adjacent area and the flatness Relations Among after each zone process cmp.
2. the application of test light mask plate according to claim 1 is characterized in that: the lines live width of described intensive line array is more than or equal to the minimum distinguishable live width of current metal level.
3. the application of test light mask plate according to claim 1 is characterized in that: described redundant pattern array is made of the redundant pattern of same size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width of current metal level.
4. the application of test light mask plate according to claim 1 is characterized in that: described redundant pattern array is made of the redundant pattern of different size, and the live width of redundant pattern is more than or equal to the minimum distinguishable live width of current metal level.
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CN106610564B (en) * | 2015-10-26 | 2019-12-31 | 中芯国际集成电路制造(上海)有限公司 | Inspection method and inspection system for exposure process and mask testing plate |
CN108153995B (en) * | 2018-01-19 | 2021-07-20 | 中国科学院微电子研究所 | Test pattern selection method and device and method and device for building photoetching model |
CN110231753A (en) * | 2019-07-10 | 2019-09-13 | 德淮半导体有限公司 | Mask and its configuration method, lithography system and photolithography method |
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