CN102368495A - Anti-static chip packaging structure - Google Patents
Anti-static chip packaging structure Download PDFInfo
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- CN102368495A CN102368495A CN2011103025577A CN201110302557A CN102368495A CN 102368495 A CN102368495 A CN 102368495A CN 2011103025577 A CN2011103025577 A CN 2011103025577A CN 201110302557 A CN201110302557 A CN 201110302557A CN 102368495 A CN102368495 A CN 102368495A
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- chip
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- packaging structure
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- semiconductor substrate
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- Elimination Of Static Electricity (AREA)
Abstract
The invention discloses an anti-static chip packaging structure, comprising a semiconductor substrate, a base material, a chip and a static absorption cover, wherein the semiconductor substrate is of a cuboid structure, and the upper surface of the semiconductor substrate is fixedly provided with the base material; the upper top end of the base material is provided with a through hole and welded with the chip; the positive and negative poles of the chip are respectively connected with the through hole; the semiconductor substrate is provided with the static absorption cover corresponding to the semiconductor substrate; and the static absorption cover is made of special materials and internally provided with a vacuum structure. The anti-static chip packaging structure has the beneficial effects that the structure is simple, the design is skillful, the anti-static capacity of the chip is improved greatly on the premise of not influencing the normal performances of the chip, the production cost is low, and the market promotion is worth.
Description
Technical field
The present invention relates to the Chip Packaging field, specially refer to a kind of antistatic chip-packaging structure.
Background technology
The common described chip of people is exactly IC, makes a general reference all electronic devices and components, is the circuit module of realizing certain specific function at the multiple electronic devices and components of silicon plate upper set.It is a most important parts in the electronic equipment, is bearing the function of computing and storage.The range of application of integrated circuit has covered military project, civilian nearly all electronic equipment.
Number of patent application is that 200720144306 patent application document discloses a kind of chip anti-static protection circuit, comprises a clamp diode and-N transistor npn npn, and the clamp diode negative electrode connects the external signal input of chip internal circuit, plus earth; The grid of N transistor npn npn, drain electrode are connected on the external signal input of chip internal circuit, source ground altogether; The cut-in voltage of N transistor npn npn is higher than the operating voltage of external input signal and less than the reverse breakdown voltage of clamp diode, and the puncture voltage of the grid of the puncture voltage of the grid of said N transistor npn npn and knot and chip internal circuit and knot is higher than the reverse breakdown voltage of clamp diode.Adopt this chip anti-static protection circuit can improve the ability of antistatic protection greatly.
Summary of the invention
The technical problem that the present invention mainly solves provides a kind of antistatic chip-packaging structure, can solve the not enough problem of traditional die antistatic performance.
For solving the problems of the technologies described above, the technical scheme that the present invention adopts is: a kind of antistatic chip-packaging structure is provided, comprises that semiconductor pedestal, base material, chip and static absorb cover; Said semiconductor pedestal is a rectangular structure; Its upper surface is mounted with base material; The top is provided with through hole and is welded with chip on the said base material, and the both positive and negative polarity of said chip is connected with through hole respectively, and said semiconductor pedestal is provided with static corresponding with it and absorbs cover.
In one embodiment of the invention, said static absorbs to be covered with and is equipped with under shed.
In one embodiment of the invention, said static absorbs the junction employing thermoplastic epoxy sealing of cover and semiconductor pedestal.
In one embodiment of the invention, said static absorbs cover and adopts special material to process, and its set inside has vacuum structure.
Beneficial effect of the present invention is: simple in structure, design ingeniously, and under the prerequisite that does not influence the normal performance of chip, promoted the ability of chip antistatic greatly, and production cost is not high yet, be worth marketing.
Description of drawings
Fig. 1 is the structural representation of a kind of antistatic chip-packaging structure of the present invention.
Embodiment
As shown in Figure 1, the invention discloses a kind of antistatic chip-packaging structure, comprise that semiconductor pedestal 110, base material 210, chip 310 and static absorb cover 410; Said semiconductor pedestal 110 is a rectangular structure; Its upper surface is mounted with base material 210; The top is provided with through hole and is welded with chip 310 on the said base material 210; The both positive and negative polarity of said chip 310 is connected with through hole respectively, and said semiconductor pedestal 110 is provided with static corresponding with it and absorbs cover 410, and said static absorbs cover 310 and is provided with under shed;
Said static absorbs the junction of cover 310 and semiconductor pedestal 110 and adopts the thermoplastic epoxy sealing.
Said static absorbs 410 covers and adopts special material to process, and its set inside has vacuum structure.
Beneficial effect of the present invention is: simple in structure, design ingeniously, and under the prerequisite that does not influence the normal performance of chip, promoted the ability of chip antistatic greatly, and production cost is not high yet, be worth marketing.
The above is merely embodiments of the invention; Be not so limit claim of the present invention; Every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to be done; Or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (4)
1. an antistatic chip-packaging structure is characterized in that, comprises that semiconductor pedestal, base material, chip and static absorb cover; Said semiconductor pedestal is a rectangular structure; Its upper surface is mounted with base material; The top is provided with through hole and is welded with chip on the said base material, and the both positive and negative polarity of said chip is connected with through hole respectively, and said semiconductor pedestal is provided with static corresponding with it and absorbs cover.
2. a kind of antistatic chip-packaging structure according to claim 1 is characterized in that, said static absorbs to be covered with and is equipped with under shed.
3. a kind of antistatic chip-packaging structure according to claim 1 is characterized in that, said static absorbs the junction of cover and semiconductor pedestal and adopts the thermoplastic epoxy sealing.
4. a kind of antistatic chip-packaging structure according to claim 1 is characterized in that, said static absorbs cover and adopts special material to process, and its set inside has vacuum structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103025577A CN102368495A (en) | 2011-10-09 | 2011-10-09 | Anti-static chip packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011103025577A CN102368495A (en) | 2011-10-09 | 2011-10-09 | Anti-static chip packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102368495A true CN102368495A (en) | 2012-03-07 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011103025577A Pending CN102368495A (en) | 2011-10-09 | 2011-10-09 | Anti-static chip packaging structure |
Country Status (1)
| Country | Link |
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| CN (1) | CN102368495A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102860595A (en) * | 2012-10-10 | 2013-01-09 | 红豆集团无锡远东服饰有限公司 | Down coat capable of eliminating static electricity |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2809778Y (en) * | 2005-07-01 | 2006-08-23 | 宜特科技股份有限公司 | Structure of drive IC package for LCD |
| CN101118892A (en) * | 2006-08-04 | 2008-02-06 | 探微科技股份有限公司 | Silicon substrates and optoelectronic component packaging structure having the same |
| CN101256997A (en) * | 2008-03-05 | 2008-09-03 | 日月光半导体制造股份有限公司 | Encapsulation structure capable of reducing encapsulation stress |
| CN101496168A (en) * | 2006-07-31 | 2009-07-29 | 智识投资基金27有限责任公司 | Substrate and process for semiconductor flip chip package |
-
2011
- 2011-10-09 CN CN2011103025577A patent/CN102368495A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2809778Y (en) * | 2005-07-01 | 2006-08-23 | 宜特科技股份有限公司 | Structure of drive IC package for LCD |
| CN101496168A (en) * | 2006-07-31 | 2009-07-29 | 智识投资基金27有限责任公司 | Substrate and process for semiconductor flip chip package |
| CN101118892A (en) * | 2006-08-04 | 2008-02-06 | 探微科技股份有限公司 | Silicon substrates and optoelectronic component packaging structure having the same |
| CN101256997A (en) * | 2008-03-05 | 2008-09-03 | 日月光半导体制造股份有限公司 | Encapsulation structure capable of reducing encapsulation stress |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102860595A (en) * | 2012-10-10 | 2013-01-09 | 红豆集团无锡远东服饰有限公司 | Down coat capable of eliminating static electricity |
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| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120307 |