CN102364407B - Novel low-dropout linear voltage regulator - Google Patents
Novel low-dropout linear voltage regulator Download PDFInfo
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- CN102364407B CN102364407B CN 201110279091 CN201110279091A CN102364407B CN 102364407 B CN102364407 B CN 102364407B CN 201110279091 CN201110279091 CN 201110279091 CN 201110279091 A CN201110279091 A CN 201110279091A CN 102364407 B CN102364407 B CN 102364407B
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Abstract
The invention discloses a novel low-dropout (LDO) linear voltage regulator which is constructed on the basis of a typical LDO circuit. The low-dropout linear voltage regulator comprises a modulation module, wherein the modulation module comprises field effect tubes M1 to M8, a capacitor C0, a switch S0, a switch S1 and a switch S2 arranged between a resistor R2 in the typical LDO circuit and a grounding end. For the low-dropout linear voltage regulator provided by the invention, each energy consuming device in the LDO circuit can be managed in different working states of the low-dropout linear voltage regulator by introducing the demodulation module and switching the on-off state of the switches S0 to S2 under different working states of the LDO circuit, the design of ultralow power consumption in the standby state and selectable output current size in the operating state is realized, and the power management requirement of a low-power wireless communication system is satisfied.
Description
Technical field
The present invention relates to a kind of electric power controller of low power wireless communication system, relate in particular to a kind of circuit structure design that combines the low pressure difference linear voltage regulator of High Output Current and super low energy consumption, belong to the integrated circuit (IC) design field.
Background technology
In the power management of low power wireless communication system, low pressure difference linear voltage regulator (Low dropout regulator, below just with it, write a Chinese character in simplified form LDO be called for short) is a kind of common circuit arrangement commonly used.As shown in Figure 1, be the application connection diagram of typical LDO circuit in traditional low-power wireless systems.In illustrated conventional application circuit structure, particularly, in low power wireless communication system, system-level LDO circuit in standby mode, receives or modulating data to wait within 90% time.All digital modules under standby mode all are necessary for the power supply open-circuit condition, to wait for digital interface, receive instruction or the data that come from MCU, and wherein the form of digital interface can comprise I
2c or SPI.The LDO circuit is generally used for providing voltage from external cell (lithium battery or AA battery) to digital interface.For realizing the wireless communication system of ultra low power, this LDO circuit self must work in low power consumpting state.Yet, in traditional implementation process, this LDO circuit need to provide relative high electric current (10mA～100mA) and low noise modulation voltage to digital circuit, clock circuit and radio circuit.Meeting two extreme requirements for typical LDO circuit is great challenges.
And the module architectures of typical LDO circuit as described in Figure 2, visible this typical case LDO circuit comprises for the band-gap reference circuit of reference voltage Vref is provided, for the operational amplifier A 0 to the equivalent conversion of reference voltage Vref by feedback voltage, for output voltage V out being separated into to resistance in series R1 and the resistance R 2 of feedback voltage, and make feedback signal mate series capacitance Cc and the resistance R c of different output impedance for compensation, the reference voltage Vref that wherein band-gap reference circuit provides depends on environment temperature and supply voltage, feedback signal is taken between resistance R 1 and resistance R 2, and access in the lump operational amplifier A 0 with the reference voltage Vref of band-gap reference circuit, the output of operational amplifier A 0 is connected to the grid of field effect transistor M0, described series capacitance Cc and resistance R c are connected on the grid of field effect transistor M0 between drain electrode, if the Vout that the drain electrode of this field effect transistor is electrical LDO circuit end is ignored the gain error of amplifier, can obtain output voltage:
(1).
In order to realize the low noise output Vout in wireless communication system, all devices in circuit system all must work in a good operating conditions.Therefore, the range of current that typical LDO circuit consumes is just between 50 μ A～1mA.Visible this typical case LDO circuit can not be used under the state of super low-power consumption.
Summary of the invention
Defect in view of above-mentioned prior art typical case LDO circuit exists, the objective of the invention is to propose a kind of Novel low-dropout linear voltage regulator, realize the LDO circuit under holding state super low-power consumption and under operating state than the performance that has concurrently of High-current output.
Above-mentioned purpose of the present invention will be achieved by the following technical programs:
A kind of Novel low-dropout linear voltage regulator, based on typical LDO circuits built, it is characterized in that: described low pressure difference linear voltage regulator comprises by field effect transistor M1～M8, capacitor C 0, switch S 0, switch S 1 and is located at the modulation module that the switch S 2 between typical LDO circuitous resistance R2 and earth terminal forms, in described modulation module, the source electrode of the drain electrode of an end of the source electrode of field effect transistor M1, switch S 1, the source electrode of field effect transistor M2, field effect transistor M4, the source electrode of field effect transistor M3 and field effect transistor M0 is connected to the Vdd end of typical LDO circuit; The drain electrode of the drain electrode of field effect transistor M1, the grid of field effect transistor M4 and field effect transistor M0 is connected to the Vout end of typical LDO circuit; One end of the other end of the grid of field effect transistor M1, switch S 1, the drain electrode of field effect transistor M2, capacitor C 0 and the drain and gate of field effect transistor M5 join; The source electrode of the source electrode of field effect transistor M5 and field effect transistor M6 joins; The source electrode of field effect transistor M4 joins by switch S 0 and the drain and gate of field effect transistor M7, the grid of field effect transistor M8; The grid of the grid of field effect transistor M3 and drain electrode and field effect transistor M2, the drain electrode of field effect transistor M8 are joined; And the source grounding of the other end of capacitor C 0, the grid of field effect transistor M6 and drain electrode, field effect transistor M7 and field effect transistor M8.
Further, described field effect transistor M0～M3 and field effect transistor M6 are the PMOS pipe; And described field effect transistor M4, M5, M7, M8 are the NMOS pipe.
Further, described typical LDO circuit comprises for the band-gap reference circuit of reference voltage Vref is provided, for the operational amplifier A 0 to the equivalent conversion of reference voltage Vref by feedback voltage, for output voltage V out being separated into to resistance in series R1 and the resistance R 2 of feedback voltage, and make feedback signal mate series capacitance Cc and the resistance R c of different output impedance for compensation, wherein feedback signal is taken between resistance R 1 and resistance R 2, and access in the lump operational amplifier A 0 with the reference voltage Vref of band-gap reference circuit, the output of operational amplifier A 0 is connected to the grid of field effect transistor M0, described series capacitance Cc and resistance R c are connected on the grid of field effect transistor M0 between drain electrode, the Vout end that the drain electrode of described field effect transistor is electrical LDO circuit.
Further, low, damage under standby mode and normal operation pattern, the switch S 0 of described low pressure difference linear voltage regulator is off-state, and switch S 1 and switch S 2 are closure state; Under the large electric current operating mode of relative normal operation pattern, the switch S 0 of described low pressure difference linear voltage regulator is closure state, and switch S 1 and switch S 2 are off-state.
The enforcement of Novel low-dropout linear voltage regulator of the present invention, its outstanding effect that compares to typical LDO is: by introducing modulation module, can be under the different operating state of low pressure difference linear voltage regulator each energy consumption device be wherein managed, realized the washability design of output current size under ultra low power loss under the holding state and operating state, the power management that meets low power wireless communication system is required.
Following constipation closes the embodiment accompanying drawing, the specific embodiment of the present invention is described in further detail, so that technical solution of the present invention is easier to understand, grasp.
The accompanying drawing explanation
Fig. 1 is the existing application connection diagram of typical LDO circuit in traditional low-power wireless systems;
Fig. 2 is the module architectures schematic diagram of typical LDO circuit;
Fig. 3 is the module rack composition of the novel LDO circuit of the present invention.
Embodiment
As shown in Figure 3, be the module rack composition of a kind of Novel low-dropout linear voltage regulator of proposing of the present invention.From illustrating, this Novel low-dropout linear voltage regulator is based on the typical LDO circuit shown in Fig. 2 and introduces modulation module and builds and to form.This modulation module consists of field effect transistor M1～M8, capacitor C 0, switch S 0, switch S 1 and switch S 2.Wherein this switch S 2 is located between the resistance R 2 and earth terminal of typical LDO circuit; And this field effect transistor M0～M3 and field effect transistor M6 are the PMOS pipe; And described field effect transistor M4, M5, M7, M8 are the NMOS pipe.
From the concrete syndeton that illustrates visible its circuit, be: the source electrode of the drain electrode of an end of the source electrode of field effect transistor M1, switch S 1, the source electrode of field effect transistor M2, field effect transistor M4, the source electrode of field effect transistor M3 and field effect transistor M0 is connected to the Vdd end of typical LDO circuit; The drain electrode of the drain electrode of field effect transistor M1, the grid of field effect transistor M4 and field effect transistor M0 is connected to the Vout end of typical LDO circuit; One end of the other end of the grid of field effect transistor M1, switch S 1, the drain electrode of field effect transistor M2, capacitor C 0 and the drain and gate of field effect transistor M5 join; The source electrode of the source electrode of field effect transistor M5 and field effect transistor M6 joins; The source electrode of field effect transistor M4 joins by switch S 0 and the drain and gate of field effect transistor M7, the grid of field effect transistor M8; The grid of the grid of field effect transistor M3 and drain electrode and field effect transistor M2, the drain electrode of field effect transistor M8 are joined; And the source grounding of the other end of capacitor C 0, the grid of field effect transistor M6 and drain electrode, field effect transistor M7 and field effect transistor M8.
Below from the application implementation of Novel low-dropout linear voltage regulator of the present invention, specifically introduce the High Output Current that has in its application and the outstanding effect of super low energy consumption.
Under the normal operation pattern, the switch S 0 of this low pressure difference linear voltage regulator is off-state, and switch S 1 and switch S 2 are closure state.Now, PMOS pipe M1 is in off state, and the modulation module newly added does not produce any impact to the routine running of typical LDO circuit part, and its output Vout is the form of compound formula (1) still.Just due to the NMOS pipe M5 be in series and the designed W/L of PMOS pipe M6 very little, thereby from the leakage current of NMOS pipe M5 and PMOS pipe M6 all very little (being less than 200nA).And damage under standby mode low, low pressure difference linear voltage regulator is only opened to the digital interface circuit energy supply, and this digital interface circuit should take electric current seldom.In order further to reduce power consumption, PMOS is managed to M0 for closed condition, any electric current output is not provided, band-gap reference circuit and operational amplifier A 0 also are turned off to identical electric current simultaneously.Visible after newly having added modulation module, this novel low pressure difference linear voltage regulator can be carried out the function identical with typical LDO circuit.
Under the large electric current operating mode of relative normal operation pattern, the switch S 0 of this low pressure difference linear voltage regulator is closure state on the other hand, and switch S 1 and switch S 2 are off-state.Now, field effect transistor M1～M7 works under suitable bias voltage condition of work, forms an amplifier.This amplifier makes output Vout meet
(2);
Wherein field effect transistor M4 is power supply trace equipment, field effect transistor M7 and field effect transistor M8 form the current mirror of NMOS, field effect transistor M2 and field effect transistor M3 form the current mirror of PMOS, field effect transistor M5 and field effect transistor M6 now play the effect of short-circuit resistance, and field effect transistor M1 is that gain equipment is to keep Vout to comprise V
gS(M4)+V
gS(M7), provide necessary basis for the High-current output of novel LDO thus.
By above comprehensive and detailed description for pressure stabilizer circuit structure and operating mode, technical solution of the present invention has been eliminated to the part of not knowing on understanding.The present invention is by introducing modulation module and switch S 2, can be under the different operating state of low pressure difference linear voltage regulator each energy consumption device be wherein managed, realized the washability design of output current size under ultra low power loss under the holding state and operating state, the power management that meets low power wireless communication system is required.
Claims (4)
1. a low pressure difference linear voltage regulator, based on the LDO circuits built, described LDO circuit comprises for the band-gap reference circuit of reference voltage Vref is provided, for the operational amplifier A 0 to the equivalent conversion of reference voltage Vref by feedback voltage, for output voltage V out being separated into to resistance in series R1 and the resistance R 2 of feedback voltage, and make feedback signal mate series capacitance Cc and the resistance R c of different output impedance for compensation, wherein feedback signal is taken between resistance R 1 and resistance R 2, and access in the lump operational amplifier A 0 with the reference voltage Vref of band-gap reference circuit, the output of operational amplifier A 0 is connected to the grid of field effect transistor M0, described series capacitance Cc and resistance R c are connected between the grid and drain electrode of field effect transistor M0, the Vout end that the drain electrode of described field effect transistor M0 is the LDO circuit, it is characterized in that: described low pressure difference linear voltage regulator comprises by field effect transistor M1-M8, capacitor C 0, switch S 0, switch S 1 and the modulation module of being located at switch S 2 formations between LDO circuitous resistance R2 and earth terminal, the source electrode of field effect transistor M1 in described modulation module, one end of switch S 1, the source electrode of field effect transistor M2, the drain electrode of field effect transistor M4, the source electrode of the source electrode of field effect transistor M3 and field effect transistor M0 is connected to the Vdd end of LDO circuit, the drain electrode of the drain electrode of field effect transistor M1, the grid of field effect transistor M4 and field effect transistor M0 is connected to the Vout end of LDO circuit, one end of the other end of the grid of field effect transistor M1, switch S 1, the drain electrode of field effect transistor M2, capacitor C 0 and the drain and gate of field effect transistor M5 join, the source electrode of the source electrode of field effect transistor M5 and field effect transistor M6 joins, the source electrode of field effect transistor M4 joins by switch S 0 and the drain and gate of field effect transistor M7, the grid of field effect transistor M8, the grid of the grid of field effect transistor M3 and drain electrode and field effect transistor M2, the drain electrode of field effect transistor M8 are joined, and the source electrode of the other end of capacitor C 0, the grid of field effect transistor M6 and drain electrode, field effect transistor M7 and the source grounding of field effect transistor M8.
2. a kind of low pressure difference linear voltage regulator according to claim 1 is characterized in that: described field effect transistor M0-M3 and field effect transistor M6 are the PMOS pipe; And described field effect transistor M4, M5, M7, M8 are the NMOS pipe.
3. a kind of low pressure difference linear voltage regulator according to claim 1 is characterized in that: low, damage under standby mode and normal operation pattern, the switch S 0 of described low pressure difference linear voltage regulator is off-state, and switch S 1 and switch S 2 are closure state.
4. a kind of low pressure difference linear voltage regulator according to claim 1 is characterized in that: under the large electric current operating mode of normal operation pattern relatively, the switch S 0 of described low pressure difference linear voltage regulator is closure state, and switch S 1 and switch S 2 are off-state.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI570534B (en) * | 2015-11-18 | 2017-02-11 | 世界先進積體電路股份有限公司 | Low dropout regulators |
| US9733655B2 (en) | 2016-01-07 | 2017-08-15 | Vanguard International Semiconductor Corporation | Low dropout regulators with fast response speed for mode switching |
| CN108541309A (en) * | 2016-11-22 | 2018-09-14 | 深圳市汇顶科技股份有限公司 | Low voltage difference stable-pressure device |
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| CN102609023B (en) * | 2012-03-12 | 2013-11-20 | 北京经纬恒润科技有限公司 | Built-in analog power supply circuit |
| CN103474951B (en) * | 2013-08-28 | 2016-05-04 | 北京空间飞行器总体设计部 | The controlled low voltage difference current foldback circuit of a kind of output |
| US9170591B2 (en) | 2013-09-05 | 2015-10-27 | Stmicroelectronics International N.V. | Low drop-out regulator with a current control circuit |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3071612B2 (en) * | 1993-07-15 | 2000-07-31 | 日本電気株式会社 | CMOS type semiconductor integrated circuit |
| US7449872B2 (en) * | 2005-08-31 | 2008-11-11 | Broadcom Corporation | Low-power programmable low-drop-out voltage regulator system |
| WO2009027467A1 (en) * | 2007-08-30 | 2009-03-05 | Texas Instruments Deutschland Gmbh | Ldo with large dynamic range of load current and low power consumption |
| CN101763131A (en) * | 2008-12-24 | 2010-06-30 | 东部高科股份有限公司 | Low-dropout voltage regulator and operating method of the same |
| CN101825909A (en) * | 2009-03-03 | 2010-09-08 | 旺玖科技股份有限公司 | Voltage stabilizing circuit |
-
2011
- 2011-09-20 CN CN 201110279091 patent/CN102364407B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3071612B2 (en) * | 1993-07-15 | 2000-07-31 | 日本電気株式会社 | CMOS type semiconductor integrated circuit |
| US7449872B2 (en) * | 2005-08-31 | 2008-11-11 | Broadcom Corporation | Low-power programmable low-drop-out voltage regulator system |
| WO2009027467A1 (en) * | 2007-08-30 | 2009-03-05 | Texas Instruments Deutschland Gmbh | Ldo with large dynamic range of load current and low power consumption |
| CN101763131A (en) * | 2008-12-24 | 2010-06-30 | 东部高科股份有限公司 | Low-dropout voltage regulator and operating method of the same |
| CN101825909A (en) * | 2009-03-03 | 2010-09-08 | 旺玖科技股份有限公司 | Voltage stabilizing circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI570534B (en) * | 2015-11-18 | 2017-02-11 | 世界先進積體電路股份有限公司 | Low dropout regulators |
| US9733655B2 (en) | 2016-01-07 | 2017-08-15 | Vanguard International Semiconductor Corporation | Low dropout regulators with fast response speed for mode switching |
| CN108541309A (en) * | 2016-11-22 | 2018-09-14 | 深圳市汇顶科技股份有限公司 | Low voltage difference stable-pressure device |
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| CN102364407A (en) | 2012-02-29 |
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