CN102355615B - Internal integration method for audio frequency deemphasis network - Google Patents

Internal integration method for audio frequency deemphasis network Download PDF

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CN102355615B
CN102355615B CN201110155525.9A CN201110155525A CN102355615B CN 102355615 B CN102355615 B CN 102355615B CN 201110155525 A CN201110155525 A CN 201110155525A CN 102355615 B CN102355615 B CN 102355615B
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resistance
voltage
mos
control
controlled
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CN102355615A (en
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滕龙
雍广虎
王一六
张炜
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Wuxi Jingyuan Microelectronics Co Ltd
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WUXI JINGYUAN MICROELECTRONICS CO Ltd
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Abstract

The invention discloses an internal integration method for an audio frequency deemphasis network. In the internal integration method, a module for generating a control voltage by utilizing closed-loop operational amplification of MOS (Metal Oxide Semiconductor) resistance feedback, a module for controlling MOS variable resistances by a current converted from the control voltage and ensuring a plurality of MOS variable resistances to be connected in series to form a mega-grade resistance, and a selectable capacitor module are adopted, wherein the control voltage generated by the closed-loop operational amplification of the MOS resistance feedback is converted into the current through Mne26; then the current is used for controlling a controlled MOS resistance; and after a plurality of controlled resistances are connected in series, the deemphasis network is formed by a plurality of controlled resistances and a selectable capacitor. The network can complete an audio frequency deemphasis function without an external capacitor.

Description

The method that audio frequency de-emphasis network is inner integrated
Technical field
The present invention is the resistance characteristic that a kind of CMOS of utilization has while being operated in triode region, and the inside of realizing de-emphasis network is integrated, belongs to integrated circuit (IC) design technical field.
Background technology
Voice and picture signal low-frequency range energy are large, and high frequency band signal energy is obviously little; And the power spectral density of frequency discriminator output noise with frequency square increase (low-frequency noise is little, and high-frequency noise is large), cause the low frequency signal to noise ratio of signal very large, and signal to noise in high frequency is obviously not enough, makes high-frequency transmission difficulty.In order to offset this undesirable phenomenon, in frequency modulation system the general employing of people be a kind ofly called preemphasis and the measure of postemphasising, its core concept is to utilize the difference of characteristics of signals and noise characteristic effectively signal to process.The realization of preemphasis and deaccentuator is realized by simple RC high pass and low pass filter loop.
Because audio signal frequency is lower, preemphasis and the frequency of postemphasising are a little also corresponding lower, are about 15-20K.The time constant of postemphasising is 50u/75u.In current audio system, de-emphasis network is mainly connected in series realization by the about 5K of less resistive of IC interior with external capacitive.In this structure, the postemphasis capacitance of electric capacity of outside is: C=10nF.Wanting the electric capacity at the integrated 10nF of IC interior, is being all unacceptable aspect cost and technology chip size, therefore will realize the integrated of de-emphasis network, and necessary method reduces electric capacity exactly, increases accordingly resistance to guarantee to postemphasis constant.Electric capacity in integrated circuit is pF level, and electric capacity at least will reduce 100 times, and corresponding resistance will increase 100 times.Want integrated 1,000,000 resistance, needed chip area and technical conditions all cannot be accepted.MOS resistance is to utilize the equivalent resistance of transistor under certain biasing, so that direct current pressure drop to be provided, or among a small circle, is linear small-signal AC resistance.In most situation, obtain the needed Area Ratio linearity of small-signal resistance much important.A MOS device is exactly an artifical resistance, and with polysilicon of equal value or compare across three resistance, its size is much smaller.If but directly do the MOS resistance of 1M, and its precision and linearity will be too poor, and therefore directly integrated large resistance completes the inside integration problem of de-emphasis network.In order to solve the problem of precision and the linearity, the present invention has just introduced a kind of new method.
Summary of the invention
technical problem:the resistance characteristic that the object of this invention is to provide a kind of CMOS of utilization, realize the inner integrated method of million grades of resistance, at the integrated accurate super large resistance of IC interior (about 1M), realize RC constant and the consistent RC loop of outside de-emphasis network with the little electric capacity of IC interior.
technical scheme:
In order to solve error and the linearity problems of super large MOS resistance, super large resistance of the present invention is formed by a plurality of MOS variable resistor serial connections, and the variable-resistance VG of each MOS and Id are accurately adjustable, with this, guarantee precision and the controllability of large resistance.Do on the other hand undersized its technology difficulty of MOS device and technology controlling and process and all can be very significantly improved, thereby reduced the impact of technological fluctuation on large resistance.
By the operation principle of CMOS, we know, if VDS< (VGS-VT), between ID and VDS, closing is linearity, CMOS linear zone resistance expression formula: R=KL/W, K=1/ [ μ 0c 0X(VGS-VT) ], μ 0for the surface mobility of charge carrier, C 0Xfor grid ditch capacitance density; K value is conventionally at 1000~3000 Ω/.
In this circuit, adopt MOS resistance to do reference resistance circuit, controlling mos gate voltage makes the voltage producing in resistance circuit be controlled as identical with reference voltage, then the gate voltage of the MOS in basis of reference circuit, in the variable resistance circuit of control MOS resistance, the gate voltage of MOS, completes the control of resistance.
The method that audio frequency de-emphasis network is inner integrated, comprise and utilize the closed loop amplifier of MOS resistance feedback to produce the module of controlling voltage, utilize the Current Control MOS variable resistor of controlling voltage transitions, by a plurality of MOS variable resistor serial connections, formed the module of million grades of resistance, and optional capacitance module; The control voltage that wherein utilizes the closed loop amplifier generation of MOS resistance feedback, converts electric current to through metal-oxide-semiconductor, and this electric current removes to control controlled MOS resistance again, after a plurality of controlled resistors serial connections, forms de-emphasis network again with optional electric capacity.
Utilize MOS resistance to do and feed back, make amplifier be operated in stable state, in control signal, change little in the situation that, output is controlled voltage and is substantially remained unchanged; When controlling voltage, become and cause greatly when controlling electric current and becoming large, input voltage starts first to diminish, and output voltage uprises, and the electric current of controlling feedback resistance becomes large, and feedback resistance diminishes, and input voltage raises, and output reduces, and final output is consistent with initial value; When control electric current diminishes, input voltage first uprises, output voltage step-down, and the electric current of controlling feedback resistance diminishes, and it is large that feedback resistance becomes, and inputs step-down again, and output uprises, and final output with initial value is consistent.Variable resistor size is controlled voltage control only, and is not subject to the impact of process conditions and bulk effect, has realized the accurately controlled of resistance.
Reference resistance control loop: Mpe18, Mpe19 forms differential pair, then with Te38, Te39 forms an open loop amplifier together, and Mpe19 grid meets Vref1, and Mpe18 grid joins by metal-oxide-semiconductor and Vref2, Mpe18 grid connects a drop-down current source simultaneously, and this current source is controlled by controlling voltage VC.This amplifier output connects Mne21 grid, this metal-oxide-semiconductor is for falling than pipe, gate voltage is controlled its resistance sizes, constant-current source electric current produces pressure drop on this resistance, control the resistance of Mne25, on Mne25, connect the PMOS pipe Mpe32 ,Gai road Current Control of drain-gate short circuit and the size of the MOS resistance that Mpe18 grid joins, by this loop, amplifier forms close loop negative feedback.When Mpe18 grid current source is definite value, after system stability, Mne21 grid voltage is fixed.Mne21 grid voltage and pull-down current form strict corresponding relation, and this voltage is controlled resistor and controls voltage.
MOS resistance grid voltage generation module: Fig. 1 is reference resistance control module block diagram, the voltage that control module produces is connected to the grid of Mne26, the drain electrode of Mne26 connects the emitter of Te64, Te64 base stage meets reference voltage V ref1, condition can be calculated Mne26 drain current accordingly, this electric current again after current mirror conversion as the reference current of variable resistor module, change the size that reference current can change resistance.
In Fig. 2, known according to the proportionate relationship of each pipe:
I CTe70=2I CTe66=?Iref?,I Cte66=I dMpe53,I dMpe54=?I CTe70-?I dMpe53=?I CTe70-?I Cte66=?I Cte66
Because Mpe53, the source potential of Mpe54 is identical, so Mpe53, and Mpe54 grid voltage is identical, i.e. V gMpe53=V gMpe54.The electric current I d=1/2Iref of Mpe55, so Mpe55 grid voltage VG can calculate.The grid of Mpe55 is connected with Mpe58 grid, and Mpe58 is controlled resistor (as Fig. 3).This controlled resistor is controlled by reference voltage and Mpe18 grid current source only, and is not subject to the impact of fabrication error and bulk effect, has realized the accurately controlled of resistance.Be subject to the identical module controls of module therewith with controllable resistor another controllable resistor of connecing, two parallel resistances have complementary effect, guaranteed the stable of resistance, because load that this resistance connects is electric capacity, therefore the D.C. resistance that flows through this controlled resistor is close to zero, therefore the controlled resistor that each concatenation module is controlled is identical, so total resistance value is about 6*MR mpe58.
In present networks, after circuit working is stable, variable resistor is definite value.Electric capacity is that 61.0p and 91.5p pass through selector gating, realizes the control of the constant 50u/75u that postemphasises.Fig. 4 is de-emphasis network internal wiring figure; Fig. 4 a is de-emphasis network internal wiring figure first; Fig. 4 b is de-emphasis network internal wiring figure second portion; Fig. 4 c is de-emphasis network internal wiring figure third part.
Integrated de-emphasis network, the switching of the constant that postemphasises (50u/75u) selects the size of electric capacity to realize by selector.De-emphasis network consists of IC interior resistance capacitance completely, and does not need peripheral cell.
beneficial effect: in television set and related audio treatment circuit, de-emphasis network completes by external capacitor and internal resistance at present, by controlling the variation of inner integrated resistor, complete, the selection of RC constant, in the situation that chip integration is more and more higher, this structure all produces totally unfavorable impact to the encapsulation of integrated circuit related with same and peripheral applications cost.This programme is by the method for inner integrated large resistance and optional electric capacity, and the inside of realizing de-emphasis network is integrated, not only to saving a PIN pin in this type of circuit package, and has simplified peripheral cell.For chip, user provides cost savings, and produces obvious economic benefit.
Accompanying drawing explanation
Fig. 1 is reference resistance control module block diagram;
Fig. 2 is reference resistance control circuit figure;
Fig. 3 is single controlled resistor line map;
Fig. 4 is de-emphasis network internal wiring figure;
Fig. 4 a is de-emphasis network internal wiring figure first; Fig. 4 b is de-emphasis network internal wiring figure second portion; Fig. 4 c is de-emphasis network internal wiring figure third part;
Fig. 5 is integrated de-emphasis network functional block diagram.
Embodiment
Reference resistance control loop: Mpe18, Mpe19 forms differential pair, then with Te38, Te39 forms an open loop amplifier together, and Mpe19 grid meets Vref1, and Mpe18 grid joins by metal-oxide-semiconductor and Vref2, Mpe18 grid connects a drop-down current source simultaneously, and this current source is controlled by controlling voltage VC.This amplifier output connects Mne21 grid, this metal-oxide-semiconductor is for falling than pipe, gate voltage is controlled its resistance sizes, constant-current source electric current produces pressure drop on this resistance, control the resistance of Mne25, on Mne25, connect the PMOS pipe Mpe32 ,Gai road Current Control of drain-gate short circuit and the size of the MOS resistance that Mpe18 grid joins, by this loop, amplifier forms close loop negative feedback.When Mpe18 grid current source is definite value, after system stability, Mne21 grid voltage is fixed.Mne21 grid voltage and pull-down current form strict corresponding relation, and this voltage is controlled resistor and controls voltage.
MOS resistance grid voltage generation module: Fig. 1 is reference resistance control module block diagram, the voltage that control module produces is connected to the grid of Mne26, the drain electrode of Mne26 connects the emitter of Te64, Te64 base stage meets reference voltage V ref1, condition can be calculated Mne26 drain current accordingly, this electric current again after current mirror conversion as the reference current of variable resistor module, change the size that reference current can change resistance.
In Fig. 2, known according to the proportionate relationship of each pipe:
I CTe70=2I CTe66=?Iref?,I Cte66=I dMpe53,I dMpe54=?I CTe70-?I dMpe53=?I CTe70-?I Cte66=?I Cte66
Because Mpe53, the source potential of Mpe54 is identical, so Mpe53, and Mpe54 grid voltage is identical, i.e. V gMpe53=V gMpe54.The electric current I d=1/2Iref of Mpe55, so Mpe55 grid voltage VG can calculate.The grid of Mpe55 is connected with Mpe58 grid, and Mpe58 is controlled resistor (as Fig. 3).This controlled resistor is controlled by reference voltage and Mpe18 grid current source only, and is not subject to the impact of fabrication error and bulk effect, has realized the accurately controlled of resistance.Be subject to the identical module controls of module therewith with controllable resistor another controllable resistor of connecing, two parallel resistances have complementary effect, guaranteed the stable of resistance, because load that this resistance connects is electric capacity, therefore the D.C. resistance that flows through this controlled resistor is close to zero, therefore the controlled resistor that each concatenation module is controlled is identical, so total resistance value is about 6*MR mpe58.In present networks, after circuit working is stable, variable resistor is definite value.Electric capacity is that 61.0p and 91.5p pass through selector gating, realizes the control of the constant 50u/75u that postemphasises.Fig. 5 is integrated de-emphasis network functional block diagram.

Claims (5)

1. the inner integrated method of an audio frequency de-emphasis network, it is characterized in that: comprise and utilize the closed loop amplifier of MOS resistance feedback to produce the module of controlling voltage, utilize the Current Control MOS variable resistor of controlling voltage transitions, by a plurality of MOS variable resistor serial connections, formed the module of million grades of resistance, and optional capacitance module; The control voltage that wherein utilizes the closed loop amplifier generation of MOS resistance feedback, through metal-oxide-semiconductor, Mne26 converts electric current to, and this electric current removes to control controlled MOS resistance again, after a plurality of controlled resistors serial connections, forms de-emphasis network again with optional electric capacity.
2. the inner integrated method of audio frequency de-emphasis network according to claim 1, is characterized in that: utilize MOS resistance to do and feed back, make amplifier be operated in stable state, in control signal, change little in the situation that, output is controlled voltage and substantially remained unchanged; When the change of control voltage causes greatly control electric current to become large, input voltage starts first to diminish, and output voltage uprises, and the electric current of controlling feedback resistance becomes greatly, and feedback resistance diminishes, input voltage rising, and output voltage reduction, final output voltage and initial value are consistent; When control electric current diminishes, input voltage first uprises, output voltage step-down, and the electric current of controlling feedback resistance diminishes, and it is large that feedback resistance becomes, and input voltage is step-down again, and output voltage uprises, and final output voltage and initial value are consistent.
3. the inner integrated method of audio frequency de-emphasis network according to claim 1, it is characterized in that: the variable resistor that utilizes the Current Control of controlling voltage transitions, it is characterized in that only controlled voltage control of variable resistor size, and be not subject to the impact of process conditions and bulk effect, realized the accurately controlled of resistance.
4. the inner integrated method of audio frequency de-emphasis network according to claim 1, is characterized in that: de-emphasis network consists of IC interior resistance capacitance completely, and does not need peripheral cell.
5. the inner integrated method of audio frequency de-emphasis network according to claim 4, is characterized in that: inner de-emphasis network, the switching of the constant that postemphasises (50u/75u) selects the size of electric capacity to realize by selector.
CN201110155525.9A 2011-06-10 2011-06-10 Internal integration method for audio frequency deemphasis network Active CN102355615B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1307405A (en) * 2000-01-26 2001-08-08 华为技术有限公司 Stepped attenuation controlling circuit in digital current mode
CN1543075A (en) * 2003-04-30 2004-11-03 ���Ӱ뵼�����޹�˾ Capture range control mechanism for voltage controlled oscillators
CN1917362A (en) * 2005-07-29 2007-02-21 美国博通公司 Current-controlled cmos wideband amplifier/equalizer circuit
CN101232471A (en) * 2008-02-26 2008-07-30 上海士康射频技术有限公司 Base band signal processing chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1307405A (en) * 2000-01-26 2001-08-08 华为技术有限公司 Stepped attenuation controlling circuit in digital current mode
CN1543075A (en) * 2003-04-30 2004-11-03 ���Ӱ뵼�����޹�˾ Capture range control mechanism for voltage controlled oscillators
CN1917362A (en) * 2005-07-29 2007-02-21 美国博通公司 Current-controlled cmos wideband amplifier/equalizer circuit
CN101232471A (en) * 2008-02-26 2008-07-30 上海士康射频技术有限公司 Base band signal processing chip

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Address after: No. 5, Xijin Road, Xinwu District, Wuxi City, Jiangsu Province, 214000

Patentee after: Wuxi Jingyuan Microelectronics Co.,Ltd.

Address before: Room 209, building a, block 106-c, national high tech Industrial Development Zone, Wuxi City, Jiangsu Province, 214028

Patentee before: Wuxi Jingyuan Microelectronics Co.,Ltd.