CN102354294B - Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip - Google Patents

Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip Download PDF

Info

Publication number
CN102354294B
CN102354294B CN201110244403.7A CN201110244403A CN102354294B CN 102354294 B CN102354294 B CN 102354294B CN 201110244403 A CN201110244403 A CN 201110244403A CN 102354294 B CN102354294 B CN 102354294B
Authority
CN
China
Prior art keywords
program
dsp chip
dsp
chip
content
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110244403.7A
Other languages
Chinese (zh)
Other versions
CN102354294A (en
Inventor
王显煜
翟盛华
王宇
朱红
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Institute of Space Radio Technology
Original Assignee
Xian Institute of Space Radio Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Institute of Space Radio Technology filed Critical Xian Institute of Space Radio Technology
Priority to CN201110244403.7A priority Critical patent/CN102354294B/en
Publication of CN102354294A publication Critical patent/CN102354294A/en
Application granted granted Critical
Publication of CN102354294B publication Critical patent/CN102354294B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The invention relates to a method for detecting spatial single event upset of a space-borne DSP (Digital Signal Processor) chip. The method comprises the following steps of: performing 32bits verification on a content in a DSP chip program area in sections, storing a verification result into a three-section data area of the DSP chip, and then solidifying the chip; after electrifying the DSP and running a program, moving the content in the DSP chip program area to the three-section data area in sections by a DMA (Direct Memory Access) controller during a running process of a CPU (Central Processing Unit), and performing 32bits verification calculation on the moved sectional data by the CPU in an idle period; and comparing a calculated result with a three-modular redundancy judging result of a verification value pre-stored in the data area, thereby confirming whether a single event upset phenomenon occurs in the content of the DSP chip program area. According to the method, a DSP program is used for realizing the self-detection of the single event upset phenomenon in a chip, the DMA controller is used for moving the data and the content in the DSP chip program area is verified in sections, thereby reducing the occupied running time of the CPU and the cost of program codes.

Description

A kind of space single-particle inversion detection method of spaceborne dsp chip
Technical field
The present invention relates to a kind of space single-particle inversion detection method of spaceborne dsp chip, be the applied research of Satellite Payloads platform reliability, belong to satellite reliability application.
Background technology
Along with the development of spacecraft function, increasing useful load product employs advanced Digital Signal Processing, in order to complete these digital processing functions, hardware design have employed a lot of large-scale digital ic.The single particle effect of these components and parts is more and more serious, especially aerospace equipment that is continuous, long-term stable operation is needed to have employed the large scale integrated circuit of these single-particle sensitivities, if do not take a series of measure to carry out single particle effect reinforcing, be cannot meet user to the demand of serviceability.
Most of time, we are whether the large-scale digital ic judged in useful load by the useful load functional status of satellite there occurs single-particle inversion phenomenon, and these have the device of embedded programming function itself and cannot know whether self there occurs single-particle inversion.The result caused like this is exactly, Satellite Payloads at work, once there occurs single particle phenomenon device itself cannot carry out function self-recoverage by the measure of self.Desirably intervention is carried out artificially to recover whole useful load function in face.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, provides a kind of space single-particle inversion detection method of spaceborne dsp chip, is completed the measuring ability of inner single-particle inversion phenomenon by the embedded program in dsp chip.
Technical solution of the present invention:
A space single-particle inversion detection method for spaceborne dsp chip, described dsp chip comprises data field, program area, CPU and dma controller, and the step of the space single-particle inversion self-sensing method of described spaceborne dsp chip is as follows:
(1) segmentation is carried out to the content that dsp chip Program district stores, then 32bits verification is carried out to each section of content; Described 32bits verification refers to that the mould 2 of 32bits adds computing;
(2) three segment data storage spaces are opened up in the data field in dsp chip, the program code of dsp chip, simultaneously stored in described three place's data spaces, is then cured in PROM or FLASH outside dsp chip by the result verified by the 32bits carried out each section of content described in step (1);
(3) after dsp chip resets, namely dsp chip is started working, and is loaded in dsp chip internal program district by dma controller by the program code of the described dsp chip in PROM or FLASH outside dsp chip;
(4) by dma controller, the content section of program area is moved in data field, move one section of program area contents at every turn;
(5) when dma controller is moved after operation completes to one section of program area contents, then 32bits verification is carried out to this section of program area contents in data field;
(6) triplication redundancy voting is carried out to three check results corresponding to one section of program area contents described in the step (5) stored in data field in step (2);
(7) the triplication redundancy voting result in the check results in step (5) and step (6) is compared, if both are unequal, then think that program area there occurs single-particle inversion.
The present invention's beneficial effect compared with prior art:
At home and abroad about in the space reliability research of dsp chip, be all adopt instruction code Redundancy Design measure or the measure of inserting control routine in code is to increase the fault-tolerant ability of chip and to detect the normality of dsp operation substantially.These two class methods are all consider a problem error detection and fault-tolerant probability between 74% ~ 96% from the Design of Reinforcement angle of program code.But the memory space that this kind of Design Method of Reinforcing brings is up to 120% ~ 500%, and the increment of program execution time is also between 33% ~ 141%.Focus of the present invention is to solve the detection that single-particle inversion phenomenon occurs in dsp chip internal processes district, the present invention's design calculates alignment programs and a bit of space for storing correct check results of opening up in data field to complete whole measuring ability only by embedding School Affairs, simultaneously owing to have employed the strategy of segmentation verification, the basis decreasing code overhead significantly reduces again work load and the program execution time expense of CPU.The present invention is complicated for program structure, and CPU work schedule requires that strict task has more advantage.
Accompanying drawing explanation
Fig. 1 is dsp chip structural representation of the present invention;
Fig. 2 is detection method process flow diagram;
Fig. 3 is the process flow diagram that detection method is applied in the dsp chip course of work.
Embodiment
The sequential logical circuit that DSP is employing pipelining, degree of parallelism is not high.For dsp chip itself, RAM on the sheet that program area and data field constitute DSP, the SEU cross section of whole program area and data field is long-pending the highest, that is, the single-particle inversion fault of the easiest generating program district and data field in dsp chip, but the single-particle inversion that data field occurs may can not make a significant impact the execution result of dsp chip, or after single-particle inversion occurs, fault hides, and may showing sometime subsequently.
The single-particle inversion of the program area of DSP causes the disorder of DSP program execution flow, and this is the main forms of DSP single particle effect fault, can cause program " race flies " or " deadlock ".
The invention provides a kind of space single-particle inversion detection method of spaceborne dsp chip, dsp chip inside is divided into several part, as shown in Figure 1, on-chip memory (comprising program area and data field), CPU and Embedded peripheral hardware multi-channel DMA controller etc. respectively, detection method is made up of following key step: as shown in Figure 2
(1) segmentation is carried out to the content that dsp chip Program district stores, (in order to reduce the CPU time that DSP carries out shared by self checking, the content of program's memory space is divided into M section to verify respectively by this method, as (address 0x00000000 ~ 0x00000fff is first paragraph, 0x00001000 ~ 0x00001fff is second segment etc.), then 32bits verification is carried out to each section of content; In the present invention, 32bits verification refers to that the mould 2 of 32bits adds computing, can also use other methods of calibration, such as parity checking etc.
(2) three segment data storage spaces are opened up in the data field in dsp chip, the result verified by the 32bits carried out each section of content described in step (1) is simultaneously stored in described three place's data spaces, and the content finally stored in this three places data space is the same.Then the program code of dsp chip is cured in PROM or FLASH outside dsp chip; The program code of the object of the solidification mentioned here---dsp chip refers to: all the elements stored within the program area of dsp chip and data field, comprise the task program that DSP self will perform, and also comprises and detects the relevant program of single-particle inversion.
(3) after dsp chip resets, namely dsp chip is started working, and is loaded in dsp chip internal program district by dma controller by the program code of the described dsp chip in PROM or FLASH outside dsp chip;
(4) by dma controller, the content section of program area is moved in data field, move one section of program area contents at every turn;
The size of segmentation is run sequential by specific procedure district size and program and is determined, such as: for baroque program, the space of program area shared by program is often very large, at this moment, if only once move operation to program area contents, then need to take a large amount of spaces, data field, and need when CPU carries out verify calculation to take a large amount of working times, therefore the content of every for program area 1K byte can be divided into one section to carry out segmentation moving by we, and the holding time can either saving CPU can reduce again the storage overhead of data field.
(5) when dma controller is moved after operation completes to one section of program area contents, then carry out 32bits verification to this section of program area contents in data field, namely the mould 2 of 32bits adds computing;
(6) triplication redundancy voting is carried out to three check results corresponding to this section of program area contents moving operation described in the step (5) stored in data field in step (2);
The voting principle of triplication redundancy voting: 1) if three numbers are identical, then getting the first number is voting result.2) if wherein two identical, then getting these two identical numbers is voting result.3) if three numbers are different, then getting the first number is voting result.
(7) the triplication redundancy voting result in the check results in step (5) and step (6) is compared, if both are unequal, then think that program area there occurs single-particle inversion.
Below for TI company SMJ320C6203 dsp chip, carry out the introduction of the inventive method: as shown in Figure 3, for detection method is applied in the process flow diagram in the dsp chip course of work.
1) after completing the program design of DSP task function, 10 sections of moulds 2 carrying out 32bits are divided to add calculating to the content of program area, and 3 of result of calculation samples are kept at 3 diverse locations of data space by program code, Chk_Data_R1 [10], Chk_Data_R2 [10], Chk_Data_R3 [10].Recompility, linked code afterwards, forms load document and is cured in the sheet external memory space (FLASH, PROM) of DSP.
2), after program powers on, the program code be stored in outside sheet is moved in the ram in slice space of DSP by dma controller.
3) CPU brings into operation program, completes the initial work of each control register optimum configurations of DSP and the task of DSP own, completes the initial work of DMA1 passage simultaneously, and enable DMA1 interrupts.
4) DMA1 controller is opened, it is made to move content in address field the 1st section of 0x00000000 ~ 0x00000fff, and be stored in the int type array Chk_Data [1024] defined in data space (content-length in one piece of data district is the number of 1024 32bits), simultaneously, DMA1 control register is set, after DMA1 controller completes data-moving operation, produces the internal interrupt signal of DMA1.
5) CPU continues the program task running DSP itself.(often in satellite load application, DSP program is circular flow).
6) after DMA1 completes and moves operation, DSP responding DMA 1 produce internal interrupt (CPU do not respond other there is the interruption of higher priority time).In DMA1 interrupt routine, move complement mark flag by one and be set to 1.
7) CPU circular flow is to when judging flag program segment, judges whether flag mark is 1, if not 1 jumps to the 5th) step, if 1 proceeds to the 8th) step.
8) flag mark is set to 0, the mould 2 simultaneously data in Chk_Data [1024] being carried out 32bits adds calculating.
9) by prior stored in three School Affairs array Chk_Data_R1 [10], the 1st Elements C hk_Data R1 [0] in Chk_Data_R2 [10], Chk_Data_R3 [10], Chk_Data_R2 [0], Chk_Data_R3 [0] carry out triplication redundancy voting.
The decision method of triplication redundancy design, adopts space, three data fields to store same variant content, during use, the content of these three data fields is adjudicated to the correct value deciding variable.Program circuit is as follows:
Time in a program to a certain variable assignments, carry out 3 times operations, respectively assignment is in 3 different data fields.
As, x is assigned to data1, data2 and data3
When needs use this value, need to adjudicate three numbers
If data1 equals data2, so this value gets the value of data1, and changes the value of data3 the value of data1 into.
If else data1 equals data3, so this value gets the value of data1, and changes the value of data2 the value of data1 into.
This value of else gets the value of data1, and data2 and data3 is changed into the value of data1.
10) by the 8th) step calculate result and the 9th) step decide by vote after result compare, if come to the same thing, then continue following step (11).If not identical, then read-me district there occurs single-particle inversion phenomenon.At this moment, DSP stops the dog feeding operation of house dog, realizes reloading DSP program by watchdog reset.
11) open DMA1 controller, make its content 0x00001000 moving next section of program area ~ 0x00001fff.Forward the 5th afterwards to) step.

Claims (1)

1. a space single-particle inversion detection method for spaceborne dsp chip, is characterized in that: described dsp chip comprises data field, program area, CPU and dma controller, and the step of the space single-particle inversion detection method of described spaceborne dsp chip is as follows:
(1) segmentation is carried out to the content that dsp chip Program district stores, be divided into 10 sections, then 32bits verification is carried out to each section of content; Described 32bits verification refers to that the mould 2 of 32bits adds computing or parity checking; Described dsp chip is TI company SMJ320C6203;
(2) three place's data spaces are opened up in the data field in dsp chip, the program code of dsp chip, simultaneously stored in described three place's data spaces, is then cured in PROM or FLASH outside dsp chip by the result verified by the 32bits carried out each section of content described in step (1); The program code of dsp chip refers to: all the elements stored within the program area of dsp chip and data field, comprise the task program that DSP self will perform, and also comprises and detects the relevant program of single-particle inversion;
(3) after dsp chip resets, namely dsp chip is started working, and is loaded in dsp chip internal program district by dma controller by the program code of the described dsp chip in PROM or FLASH outside dsp chip;
(4) by dma controller, the content section of program area is moved in data field, move one section of program area contents at every turn, the content of every for program area 1K byte is divided into one section; Be specially:
A () opens dma controller, it is made to move content in address field the 1st section of 0x00000000 ~ 0x00000fff, and be stored in the int type array Chk_Data [1024] defined in data space, simultaneously, DMA control register is set, after dma controller completes data-moving operation, produces the internal interrupt signal of DMA;
B () CPU continues the program task running DSP itself;
C () DMA completes and moves operation after, the internal interrupt that DSP responding DMA produces; In the dma in disconnected program, move complement mark flag by one and be set to 1;
D () CPU circular flow, to when judging flag program segment, judges whether flag mark is 1, if not 1 jumps to step (b), if 1 proceeds to step (5);
(5) when dma controller is moved after operation completes to one section of program area contents, then 32bits verification is carried out to this section of program area contents in data field;
(6) triplication redundancy voting is carried out to three check results corresponding to one section of program area contents described in the step (5) stored in data field in step (2);
The voting principle of triplication redundancy voting: if a) three numbers are identical, then getting the first number is voting result; If b) wherein two identical, then getting these two identical numbers is voting result; If c) three numbers are different, then getting the first number is voting result;
(7) the triplication redundancy voting result in the check results in step (5) and step (6) is compared, if both are unequal, then think that program area there occurs single-particle inversion.
CN201110244403.7A 2011-08-23 2011-08-23 Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip Active CN102354294B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110244403.7A CN102354294B (en) 2011-08-23 2011-08-23 Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110244403.7A CN102354294B (en) 2011-08-23 2011-08-23 Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip

Publications (2)

Publication Number Publication Date
CN102354294A CN102354294A (en) 2012-02-15
CN102354294B true CN102354294B (en) 2015-04-22

Family

ID=45577861

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110244403.7A Active CN102354294B (en) 2011-08-23 2011-08-23 Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip

Country Status (1)

Country Link
CN (1) CN102354294B (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014081457A1 (en) * 2012-11-21 2014-05-30 Coherent Logix Incorporated Processing system with interspersed processors dma-fifo
CN103955411A (en) * 2014-05-21 2014-07-30 北京空间机电研究所 On-orbit transmitting and configuring method for spaceborne high-capacity FPGA (Field Programmable Gate Array) program
CN104133738B (en) * 2014-07-11 2017-04-12 中国人民解放军信息工程大学 SEU-resistant method for satellite-borne MIMO detector based on SEC-DED
CN104484238B (en) * 2014-12-16 2016-02-10 北京控制工程研究所 A kind of CRC check method refreshed for SRAM type FPGA configuration
CN106484309A (en) * 2015-08-28 2017-03-08 中兴通讯股份有限公司 A kind of bit flipping detection method and device
CN105446842B (en) * 2015-12-03 2019-01-04 南京南瑞继保电气有限公司 A kind of ADI DSP code in-service monitoring method
CN105760248A (en) * 2016-02-15 2016-07-13 上海卫星工程研究所 Efficient FPGA configuration backward-reading device and method
CN106339282B (en) * 2016-08-26 2019-02-19 哈尔滨工业大学 A kind of information storage system and program burn writing and program start-up loading method
CN106407056B (en) * 2016-09-21 2019-06-11 哈尔滨工业大学 The detection repair system and method for the programmable computing unit of Technology for Spatial Information System processing
CN107273240B (en) * 2017-05-18 2020-04-28 北京空间飞行器总体设计部 Single event upset protection method for satellite-borne phased array TR (transmitter-receiver) assembly
CN107301042B (en) * 2017-06-06 2020-07-14 北京航天自动控制研究所 SoC application program guiding method with self-checking function
CN111190772B (en) * 2020-01-02 2023-03-31 上海航天测控通信研究所 DSP secondary starting system and method for resisting space single event upset
CN112115017B (en) * 2020-08-07 2022-07-12 航天科工空间工程发展有限公司 Logic code monitoring method and device of satellite-borne software program
CN111966525B (en) * 2020-10-23 2021-03-26 中国人民解放军国防科技大学 DSP program operation method of satellite-borne navigation equipment and DSP system thereof
CN112559071A (en) * 2020-12-14 2021-03-26 上海航天控制技术研究所 Segmented dual-redundancy boot loading method for DSP

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101477480A (en) * 2009-02-05 2009-07-08 华为技术有限公司 Memory control method, apparatus and memory read-write system
CN101976212A (en) * 2010-10-27 2011-02-16 西安空间无线电技术研究所 Small amount code reloading-based DSP anti-single-event error correction method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101458638B (en) * 2007-12-13 2010-09-01 安凯(广州)微电子技术有限公司 Large scale data verification method for embedded system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101477480A (en) * 2009-02-05 2009-07-08 华为技术有限公司 Memory control method, apparatus and memory read-write system
CN101976212A (en) * 2010-10-27 2011-02-16 西安空间无线电技术研究所 Small amount code reloading-based DSP anti-single-event error correction method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
抗单粒子翻转的可重构卫星通信系统;李志刚等;《宇航学报》;20090930;第30卷(第5期);第1752-1756页 *
数字信号处理器抗辐射设计技术研究;邢克飞等;《应用基础与工程科学学报》;20061231;第14卷(第4期);第572-577页 *

Also Published As

Publication number Publication date
CN102354294A (en) 2012-02-15

Similar Documents

Publication Publication Date Title
CN102354294B (en) Method for detecting spatial single event upset of space-borne DSP (Digital Signal Processor) chip
US7472051B2 (en) Dependable microcontroller, method for designing a dependable microcontroller and computer program product therefor
US7975130B2 (en) Method and system for early instruction text based operand store compare reject avoidance
US11263081B2 (en) Checkpointing
US10062451B2 (en) Background memory test apparatus and methods
CN104035843A (en) System and Method to Increase Lockstep Core Availability
CN103218272A (en) Spaceborne digital signal processor turning reinforcing method
US9348681B2 (en) Apparatus and method for detecting fault of processor
CN103984630A (en) Single event upset fault processing method based on AT697 processor
CN109416672B (en) Reading instructions from memory without taking exceptions for defective data, processor, method and system
Alcaide et al. Software-only diverse redundancy on GPUs for autonomous driving platforms
Löfwenmark et al. Fault and timing analysis in critical multi-core systems: A survey with an avionics perspective
Wu et al. On-line soft error correction in matrix–matrix multiplication
KR102131230B1 (en) Method for self diagnosis of ram error detection logic in powertrain ecu system and apparatus thereof
Chen et al. Static data race detection for interrupt-driven embedded software
CN104951276B (en) A kind of detection method and system of the failure of chip instruction cache
US8954794B2 (en) Method and system for detection of latent faults in microcontrollers
US9417941B2 (en) Processing device and method of executing an instruction sequence
CN113742252B (en) Method and device for detecting memory disorder
CN103514071A (en) Nondestructive internal storage online testing method
Karimi et al. Workload-cognizant concurrent error detection in the scheduler of a modern microprocessor
EP3367242B1 (en) Method of error detection in a microcontroller unit
Bower et al. Applying architectural vulnerability analysis to hard faults in the microprocessor
JP2012059127A (en) Information processor, watch dog timer and abnormality detection method
US20110209006A1 (en) Microcomputer

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant