CN112115017B - Logic code monitoring method and device of satellite-borne software program - Google Patents
Logic code monitoring method and device of satellite-borne software program Download PDFInfo
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- CN112115017B CN112115017B CN202010785872.9A CN202010785872A CN112115017B CN 112115017 B CN112115017 B CN 112115017B CN 202010785872 A CN202010785872 A CN 202010785872A CN 112115017 B CN112115017 B CN 112115017B
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- G06F11/30—Monitoring
- G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
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Abstract
One embodiment of the invention discloses a method and a device for monitoring logic codes of a satellite-borne software program, wherein the method comprises the following steps: s10, the CPU bootstrap program loads the program from FLASH into RAM according to the specified address division; s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum; s15, executing the logic code segment of the monitoring logic code function, judging whether response is overtime, if yes, jumping to S18, otherwise, jumping to S17; s17, continuously and repeatedly calculating the checksum of the logic code segment realizing the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, if the checksum is changed, jumping to S18, otherwise, jumping to S15; s18: the repair logic code segment is executed, and execution proceeds to S15.
Description
Technical Field
The invention relates to the technical field of space safety and maintenance. And more particularly, to a method and apparatus for monitoring logic code of a satellite-borne software program.
Background
With the development of technology, software of various devices on the satellite is more and more complex, and a large amount of software operation logic and data are stored in various types of RAMs. Generally, RAM devices are relatively susceptible to Single Event (SEU) events, causing changes to data and logic stored within the RAM. In general, for data in the data, the influence of a single event can be eliminated by means of three-backup storage, three-two judgment and the like. However, the logic code generally cannot eliminate the influence of the single event by adopting a simple three-backup method, and once the logic code is influenced by the single event, unpredictable faults such as program runaway, logic operation abnormity and the like may be caused, thereby bringing great hidden trouble to the operation of various devices on the satellite.
In general, if the single event effect of the logic code is to be eliminated, measures such as adding EDAC (error monitoring and correction) in the RAM access process can be adopted to effectively eliminate the single event effect. However, on one hand, adding the EDAC function requires changing the hardware design and causes expensive hardware cost, and on the other hand, the EDAC function itself puts higher requirements on the read-write timing of devices such as RAM and the like, which brings certain difficulty to the system timing design. In the general software RAM monitoring algorithm, because the logic code of the monitoring algorithm is also operated in the RAM, when the RAM monitoring capability is provided, once the logic code of the RAM monitoring program is influenced by a single event, the problems of monitoring failure, large-scale rewriting of memory data and the like can occur, and the using effect is difficult to guarantee.
Disclosure of Invention
The invention aims to provide a method for monitoring logic codes by software, which can effectively monitor and repair the contents of the logic codes in an RAM (random access memory) after a single event occurs, and can effectively reduce the influence of the single event on the logic codes of an RAM monitoring algorithm.
In order to achieve the above object, a first embodiment of the present invention provides a method for monitoring logic codes of a satellite-borne software program, including:
s10, the CPU bootstrap program loads the program from FLASH into RAM according to the specified address division;
s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum;
s15, executing the logic code segment for realizing the function of monitoring the logic code, judging whether the response is overtime, if yes, jumping to S18, otherwise, jumping to S17;
s17, continuously and repeatedly calculating the checksum of the logic code segment realizing the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, jumping to S18 if the checksum is changed, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and execution proceeds to S15.
In a specific embodiment, the loading, by the CPU boot program, the program from the FLASH into the RAM according to the specified address division includes:
storing a logic code segment for realizing the original function of the program in an original program function area of the RAM;
and storing the logic code segment for realizing the function of monitoring the logic code in the monitoring function area.
In a specific embodiment, the logic code segment implementing the function of monitoring the logic code includes a logic code monitoring section and a logic code repairing section, wherein the logic code monitoring section and the logic code repairing section are respectively disposed in different areas of the monitoring function area.
In a particular embodiment, the logical code repair section includes a primary repair logic code section and a backup repair logic code section.
In a specific embodiment, the S18 includes:
s180: judging whether the master repair logic code segment is changed or not by comparing the master repair logic code segment with the checksum calculated during power-on, if not, executing the master repair logic code segment, otherwise, jumping to S183;
s183: the backup repair logic code segment is executed.
In a specific embodiment, the primary repair logic code segment and the backup repair logic code segment are separately stored in the monitor function area of the RAM.
A second embodiment of the present invention provides a device for monitoring logic codes of a program of a satellite-borne software program, including: a CPU, a FLASH, and a RAM, wherein the CPU is configured to,
s10, loading the program from FLASH into RAM according to the specified address division by the bootstrap program;
s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum;
s15, executing the logic code segment for realizing the function of monitoring the logic code, judging whether the response is overtime, if yes, jumping to S18, otherwise, jumping to S17;
s17, continuously and repeatedly calculating the checksum of the logic code segment realizing the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, jumping to S18 if the checksum is changed, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and after execution is completed, the process proceeds to S15.
In one embodiment, the RAM includes:
the original program functional area is used for storing codes for realizing original functions;
and the monitoring functional area is used for storing the logic code segment for realizing the function of monitoring the logic code.
In a specific embodiment, the logic code segment implementing the function of monitoring the logic code includes a logic code monitoring section and a logic code repairing section, wherein the logic code monitoring section and the logic code repairing section are respectively disposed in different areas of the monitoring function area.
In a particular embodiment, the logical code repair section includes a primary repair logic code section and a backup repair logic code section.
The invention has the following beneficial effects:
the invention can avoid the long-term influence of logic errors caused by single event events on the operation of programs and equipment to the maximum extent. Meanwhile, the logic code monitoring and repairing module can be prevented from being influenced by the single event to the maximum extent by a mode of function separation and redundancy backup. The method can provide certain logic code monitoring capability for the equipment to the maximum extent through software under the condition that the embedded hardware design is basically unchanged, and can effectively improve the on-orbit operation stability and reliability of the satellite-borne equipment.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 illustrates a manner of address allocation in RAM in which one embodiment of the present invention can be implemented;
FIG. 2 illustrates a flow chart of a method of software implemented logic code monitoring that can implement an embodiment of the present invention;
FIG. 3 illustrates RAM monitor implementation logic for one embodiment of the invention;
FIG. 4 shows a block diagram of an apparatus for software implemented logic code monitoring, according to an embodiment of the invention
Detailed Description
In order to make the technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The minimum system for the software operation of the common satellite-borne equipment mainly comprises a CPU, a FLASH and an RAM. The FLASH is used for storing programs, after the system is powered on, the CPU bootstrap program loads the programs into the RAM according to specified address division from the FLASH, allocates data, variables and stacks to specified positions in the RAM, then jumps to the first address of the logic code in the RAM, and starts to execute the logic code in the RAM.
Example 1-address assignment in RAM:
as shown in fig. 1, the address allocation method in RAM according to an embodiment of the present invention is applied to the system, and the system includes: CPU10, FLASH13 and RAM15, wherein the CPU10 is used for guiding the program from FLASH13 to load the program into RAM15 according to the specified address division, and the method also comprises the following steps:
storing a logic code segment for realizing the original function of the program in an original program function area of the RAM;
and storing the logic code segment for realizing the function of monitoring the logic code in the monitoring function area.
The method comprises the steps of partitioning the use condition of each code in the RAM, independently storing the program logic code segments to form a continuous monitorable RAM monitoring area, and creating physical conditions for the implementation of logic code monitoring.
And further independently storing the original program function logic codes and the logic codes for realizing the logic code monitoring function in the RAM monitoring area in a partitioning manner, wherein the original program function area is mainly used for storing the codes for realizing the original functions of the equipment, and the monitoring function area is used for storing the logic codes for realizing the logic code monitoring function.
For the monitoring function area, the logic code of the area can still be influenced by the single event, so the influence of the single event on the logic code monitoring function can be avoided to the maximum extent by adopting a mode of function separation and redundancy backup. Therefore, the logic code monitoring function needs to be divided into two independent modules of logic code monitoring and logic code repairing and stored respectively. And for the logic code repair module, the main share and the backup are respectively and independently stored.
Embodiment 2-a method for monitoring logic codes of a satellite-borne software program:
as shown in fig. 2, the present embodiment provides a method for monitoring a logic code of a satellite-borne software program, including:
and S10, after the system is powered on, driving the CPU bootstrap program to load the program from the FLASH into the RAM according to the specified address division.
In a specific example, the original program functional area is used for storing codes for realizing original functions; the monitoring function area stores a logic code segment for realizing the function of monitoring the logic code and a main backup restoration logic code segment. In order to implement the logic code monitoring function, the logic code monitoring function needs to be split into two independent functional modules, namely logic code monitoring and logic code repairing, in the implementation process.
And S13, calculating the checksum of the logic code segment realizing the original function, the logic code segment realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum.
In a specific example, for the logic code monitoring function, after the program is powered on and loaded, the function calculates the checksums of the logic code segments in the original program functional area and the logic code segments in the monitoring functional area, and stores the checksums.
And S15, executing the logic code segment of the monitoring logic code function, judging whether response is overtime, and jumping to S18 if the response is overtime, or else, jumping to S17.
In a specific example, in order to avoid that the logic code monitoring function itself is affected by a single event and fails to enter the logic code repair module, the operating state of the logic code monitoring module needs to be monitored, and the logic code repair function also needs to be started when the logic code monitoring function fails to be started or completes a single logic code monitoring for a long time.
S17, continuously and repeatedly calculating the checksum of the logic code segment realizing the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, jumping to S18 if the checksum is changed, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and execution proceeds to S15.
In a specific example, the logic code repair function is to start the logic code repair module when it is determined that an abnormal rewriting event occurs in the RAM monitoring area or the system determines that the logic code monitoring function is abnormal. The logic code repairing module directly accesses the program pair stored in the FLASH and rewrites the logic code area in the RAM, so that the logic code in the RAM is repaired correctly.
And then, continuously and repeatedly calculating the checksum of the area in the program running process, and comparing the checksum with the checksum calculated in the power-on process to realize the real-time monitoring of the RAM monitoring area. And when the calculated checksum is inconsistent with the checksum calculated during power-on, the RAM is considered to be abnormally rewritten, and at the moment, the RAM repair function needs to be started.
In order to avoid the influence of the single-particle event on the logic code repair function, the codes of the logic code repair function need to be backed up, and the main backup logic code repair function and the standby logic code repair function are all brought into the RAM monitoring range.
To this end, in a preferred embodiment, as shown in fig. 3, S18 includes:
s180: judging whether the master repair logic code segment is changed or not by comparing the master repair logic code segment with the checksum calculated during power-on, if not, executing the master repair logic code segment, otherwise, jumping to S183;
s183: the backup repair logic code segment is executed.
In the program running process, once the master repair function is judged to be influenced by the single-particle event, the backup logic code repair function is started to finish the correction of the logic codes, otherwise, the master repair logic code function is started.
Finally, through means of RAM address allocation, function separation, redundancy backup, state monitoring and the like, logic code monitoring of the satellite-borne software program is achieved, and a low-cost and easy-to-implement single-particle protection means is provided for the system.
Embodiment 3-a logic code monitoring apparatus of a satellite-borne software program:
a logic code monitoring device for a program of a satellite-borne software program, comprising: a CPU, a FLASH, and a RAM, wherein the CPU is configured to,
s10, the bootstrap program loads the program from FLASH into RAM according to the specified address division;
s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum;
s15, executing the logic code segment for realizing the function of monitoring the logic code, judging whether the response is overtime, if yes, jumping to S18, otherwise, jumping to S17;
s17, continuously and repeatedly calculating the checksum of the logic code segment realizing the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, if the checksum is changed, jumping to S18, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and execution proceeds to S15.
The RAM includes:
the original program functional area is used for storing codes for realizing original functions;
and the monitoring functional area is used for storing the logic code segment for realizing the function of monitoring the logic code.
The logic code segment for realizing the function of monitoring the logic code comprises a logic code monitoring segment and a logic code repairing segment, wherein the logic code monitoring segment and the logic code repairing segment are respectively arranged in different areas of the monitoring function area.
The logical code repair section includes a primary repair logic code section and a backup repair logic code section.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations or modifications may be made on the basis of the above description, and all embodiments may not be exhaustive, and all obvious variations or modifications may be included within the scope of the present invention.
Claims (10)
1. A method for monitoring logic codes of a satellite-borne software program is characterized by comprising the following steps:
s10, the CPU bootstrap program loads the program from FLASH into RAM according to the specified address division;
s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum;
s15, executing the logic code segment for realizing the function of monitoring the logic code, judging whether the response is overtime, if yes, jumping to S18, otherwise, jumping to S17;
s17, continuously and repeatedly calculating the checksum of the logic code segment which realizes the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, jumping to S18 if the checksum is changed, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and execution proceeds to S15.
2. The method of claim 1, wherein the CPU boot program loading the program from FLASH into RAM at specified address divisions comprises:
storing a logic code segment for realizing the original function of the program in an original program function area of the RAM;
and storing the logic code segment for realizing the function of monitoring the logic code in the monitoring function area.
3. The method according to claim 2, wherein the logic code sections implementing the function of monitoring the logic code comprise a logic code monitoring section and a logic code repairing section, wherein the logic code monitoring section and the logic code repairing section are respectively disposed in different areas of the monitoring function area.
4. The method of claim 3, wherein the logical code repair section comprises a primary repair logic code section and a backup repair logic code section.
5. The method according to claim 4, wherein the S18 includes:
s180: judging whether the master repair logic code segment is changed or not by comparing the master repair logic code segment with the checksum calculated during power-on, if not, executing the master repair logic code segment, otherwise, jumping to S183;
s183: the backup repair logic code segment is executed.
6. The method of claim 5 wherein the primary repair logic code segment and the backup repair logic code segment are each independently stored in a monitor function area of the RAM.
7. A logic code monitoring device of a satellite-borne software program, comprising: a CPU, a FLASH, and a RAM, wherein the CPU is configured to,
s10, the bootstrap program loads the program from FLASH into RAM according to the specified address division;
s13, obtaining and calculating the checksum of the logic code segment for realizing the original function of the program, the logic code segment for realizing the function of monitoring the logic code and the repair logic code segment, and storing the checksum;
s15, executing the logic code segment for realizing the function of monitoring the logic code, judging whether the response is overtime, if yes, jumping to S18, otherwise, jumping to S17;
s17, continuously and repeatedly calculating the checksum of the logic code segment which realizes the original function in the program running process, comparing the checksum with the checksum calculated in the power-on process, jumping to S18 if the checksum is changed, otherwise, jumping to S15;
s18: the repair logic code segment is executed, and execution proceeds to S15.
8. The apparatus of claim 7, wherein the RAM comprises:
the original program functional area is used for storing codes for realizing original functions;
and the monitoring functional area is used for storing the logic code segment for realizing the function of monitoring the logic code.
9. The apparatus of claim 8,
the logic code segment for realizing the function of monitoring the logic code comprises a logic code monitoring segment and a logic code repairing segment, wherein the logic code monitoring segment and the logic code repairing segment are respectively arranged in different areas of the monitoring function area.
10. The apparatus of claim 9,
the logical code repair section includes a primary repair logic code section and a backup repair logic code section.
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