CN102339876A - Solar wafer and preparation method thereof - Google Patents
Solar wafer and preparation method thereof Download PDFInfo
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- CN102339876A CN102339876A CN2010102345380A CN201010234538A CN102339876A CN 102339876 A CN102339876 A CN 102339876A CN 2010102345380 A CN2010102345380 A CN 2010102345380A CN 201010234538 A CN201010234538 A CN 201010234538A CN 102339876 A CN102339876 A CN 102339876A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a solar wafer, which comprises an N-type substrate, a P-type doped layer which is arranged on the N-type substrate, a coating layer which is arranged on the P-type doped layer and comprises a passivation layer and an anti-reflection film; and a metal electrode which is arranged on the coating layer, wherein the P-type doped layer comprises a part which is covered by the metal electrode and a part which is not covered by the metal electrode, the P-type doped layer at the part which is covered by the metal electrode is a P-type doped layer without implanted N-type ions, the P-type doped layer at the part which is not covered by the metal electrode is a P-type doped layer with implanted N-type ions, and the metal electrode and the P-type doped layer without the implanted N-type ions form an eutectic composite material. The invention additionally discloses a preparation method for the solar wafer. By using an ion implantation method, the concentration of doped ions can be enabled to be even and can be accurately controlled to be ideal and the conversion efficiency of a solar cell is enabled to be closer to a theoretic design value.
Description
Technical field
The present invention relates to a kind of solar wafer and preparation method thereof, particularly relate to solar wafer of a kind of solar cell with selective emitter and preparation method thereof.
Background technology
New forms of energy are one of five big technical fields of tool decision power in the 21st century development of world economy.Solar energy is a kind of cleaning, efficiently and never depleted new forms of energy.In the new century, national governments are all with the important content of solar energy resources utilization as the national sustainable development strategy.And that photovoltaic generation has is safe and reliable, noiseless, pollution-free, restriction less, advantages such as low, the easy maintenance of failure rate.In recent years, photovoltaic generation industry fast development in the world, supply falls short of demand for solar wafer, so the electricity conversion of raising solar wafer and the production capacity of solar wafer become important problem.
In general solar cell preparation technology mainly passes through following process, is the example explanation with the silicon chip:
1, the surface treatment of silicon chip: prepare on the surface of silicon chip is the first step main technique of making silicon solar cell, and it comprises the chemical cleaning and the surface corrosion of silicon chip.After cutting into the silicon chip of accords with production requirement to the good silicon ingot that mixes on request; At first will be to its surface treatment; Because cutting back silicon chip surface has dust, organic substances such as metal ion and other inorganic matters and grease also can produce certain mechanical damage layer when cutting.Can get rid of these pollutions and damage through sour corrosion and alkaline corrosion, make the silicon chip surface light.Afterwards, silicon chip is put into sodium hydroxide solution or other acid solution of 1.2%-1.5% and done the pyramid matte, incident light is repeatedly reflected on the surface and reflect, increased the absorption of light, improved the efficient of battery.
2, diffusion system knot: making the knot process is on a block matrix material, to generate the different diffusion layer of conduction type, and preceding surface treatment all is the critical processes in the battery manufacture process with the system knot for it.Diffusion is a kind of phenomenon of material molecule or atomic motion.The method of thermal diffusion system P-N knot is to make V family impurity infiltrate P type silicon or the impurity infiltration N of III family type silicon through high temperature.The most frequently used V family impurity of silicon solar cell is phosphorus, and what III family impurity was the most frequently used is boron.Requirement to diffusion is junction depth and the diffusion layer square resistance that obtains to be suitable for solar cell P-N knot needs.The shallow junction dead layer is little, and battery shortwave effect is good, and shallow junction causes that series resistance increases, and has only the density that improves gate electrode, could effectively improve the fill factor, curve factor of battery.So just increased technology difficulty.Junction depth is too dark, and dead layer is apparent in view.If diffusion concentration is too big, then cause heavy doping effect, the open circuit voltage of battery and short circuit current are descended.In the battery of reality is made, considered the factor of many aspects, so the junction depth of solar cell generally is controlled at 0.3～0.5 micron, 20～70 ohm of square resistance average out to.At present, the used main thermal diffusion method of silicon solar cell is liquid source diffusion, and this technology is that the method for carrying through gas is with realizing in impurity band such as the diffusion furnace.
3, trimming: in diffusion process, also formed diffusion layer at the periphery surface of silicon chip, peripheral diffusion layer can make the upper/lower electrode of battery form short-circuited conducting sleeve, must it be removed.Existing any small partial short-circuit that the battery parallel resistance is descended on the periphery, is fatal to the influence of battery.The main method of trimming has etch, extrusion and ion dry etching etc.It is now industrial that the longest what use is plasma method, feed nitrogen, oxygen and carbon tetrafluoride high pressure and produce aura down, by oxonium ion and fluorine ion alternately to the silicon effect, remove the diffusion layer periphery lead with layer.Because generated P, P in the diffusion
2O
5, S
iO
2And phosphorosilicate glass, cleaned 2 minutes with 10% HF solution now, reach the purpose of decontamination glass.
4, make antireflective coating: illumination is mapped on the silicon chip on plane, and wherein some is reflected, even the silicon face of matte also has 11% reflection loss approximately, covers one deck antireflective coating at silicon face, can reduce reflection of light greatly.The spraying process that adopts now, it is to utilize high temperature to generate titanium dioxide film at silicon face; The method that also has a kind of spraying is with PECVD (plasma chemistry gaseous phase deposition) system, and it is by computer control, and under vacuum, high-voltage radio-frequency source condition, ammonia that makes and silane gas ionization form silicon nitride film at silicon face.
5, electrode is made: electrode is exactly the electric conducting material that forms tight ohmic contact with P-N knot two ends.Such material should satisfy: can form firm contact and contact resistance is little, excellent conductivity, little, the high requirement of collection efficiency of shielded area with silicon.A large amount of adopted technologies are silver slurry or silver/aluminium paste printing in the commercialization battery production at present; And this technology moves to maturity; The ratio of width to height of grid line reduces greatly; This and battery electrode designing principle---make the output of battery maximum, promptly as far as possible little and illumination active area battery of the series resistance of battery is as far as possible greatly on all four.
6, electrode is made and is finished the next operation-sintering of having arrived.Sintering is last one production process of solar energy monolithic battery, and good temperature curve is crucial in this step, and sintering time will be got hold of, and at first wants low temperature by the eliminating of the materials such as mixing agent in the slurries, heats or is sintered to aluminium-above sintered alloy of silicon eutectic point.Through after the alloying, along with cooling, the silicon in the liquid phase will solidify again; Formation contains the recrystallized layer of a certain amount of aluminium, and it is actually a process to silicon doping, and it has compensated the donor impurity in the N+ layer of the back side; Obtain with aluminium doped P-type layer, along with the rising of alloy temperature, the increasing proportion of the aluminium in the liquid phase; Under enough aluminium amount alloy temperatures, the back side even can form the electric field identical with the place ahead becomes back of the body electric field; This technology has been used in the large batch of commercial production at present, thereby has improved open circuit voltage and short circuit current, and has reduced the electrode contact resistance.Temperature and factors such as time and temperature that can back of the body knot burn with the doping content of the resistivity of stock, reverse diffusion layer and thickness, back side thickness or printing aluminum layer thickness, sintering all have relation.The two poles of the earth of battery are burnt in the too high meeting of temperature, badly damaged battery, and the not high enough ohmic contact formedness that can not guarantee electrode of temperature is so must there be a suitable temperature to remove sintering.The solar battery sheet of monolithic has just been accomplished like this, arrives test at last, is welding and packaging technology then.
Because the concentration of dopant ion can't be precisely controlled in the thermal diffusion process, causes the conversion efficiency of solar cell to be limited to, and can't carry out opto-electronic conversion efficiently.And adopting thermal diffusion process to prepare solar wafer, its processing step is more, causes the reduction of production efficiency and the raising of cost.
Summary of the invention
The defective that the technical problem that the present invention will solve is that the prior art conversion efficiency of solar cell is low in order to overcome, the concentration of dopant ion can't be precisely controlled and processing step is complicated, cost is higher in the thermal diffusion process provides a kind of solar wafer and preparation method thereof.
The present invention solves above-mentioned technical problem through following technical proposals:
A kind of solar wafer, its characteristics are that it comprises:
One N type substrate;
One is positioned at the suprabasil P type of this N type doped layer;
One is positioned at the coating on this P type doped layer, and this coating comprises passivation layer and anti-reflection film;
Be positioned at the metal electrode on this coating,
Wherein, This P type doped layer comprises part that is covered by this metal electrode and the part that is not covered by this metal electrode; Said P type doped layer by the part of this metal electrode covering is the P type doped layer that does not have N type ion to inject; Said is not the P type doped layer that has N type ion to inject by the P type doped layer of the part of this metal electrode covering
Wherein, this metal electrode and the said P type doped layer eutectic that does not have N type ion to inject are compound,
Wherein, when described N type replaced with the P type, the P type replaced with the N type simultaneously.
Preferably, wherein, the thickness of this coating is 60-150nm.
Preferably, the square resistance of the P type doped layer of the said N of not having type ion injection is 20-50 Ω/m
2, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2, and the degree of depth that N type ion injects is 0.2-0.5 μ m.
The present invention also provides a kind of preparation method who makes aforesaid solar wafer, and its characteristics are that it may further comprise the steps:
S
1, form P type doped layer on the surface of the wafer of N type substrate;
S
2, on this P type doped layer, form a coating, this coating comprises passivation layer and anti-reflection film;
S
3, press metal electrode in the plating of this coating;
S
4, quicken N type ion and the mode injected through ion makes this this coating of N type ion penetration be injected into this P type doped layer;
S
5, with the wafer of this N type substrate sintering temperature at 850-1000 ℃, and annealing in sintering,
Wherein, when described N type replaced with the P type, the P type replaced with the N type simultaneously.
Preferably, step S
1In mode through ion injections/annealing or diffusion growth at the surface of the wafer of N type substrate formation P type doped layer, the square resistance of this P type doped layer is 20-50 Ω/m at this moment
2
Preferably, step S
2In mode through PECVD form coating, the passivation layer of this coating is SiOx, SiCx, SiNx or Al
2O
3Film.
Preferably, step S
3In plate the pressure metal electrode through the mode of printed circuit.
Preferably, step S
4In this N type ion be accelerated to 10-100keV.
Preferably, step S
4In the injection degree of depth of this N type ion be 0.2-0.5 μ m, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2
Positive progressive effect of the present invention is: use ion implantation, can make the concentration of dopant ion even, and accurately the concentration of controlled doping ion is ideal value; The transformation efficiency that so just can make solar cell is more near the Design Theory value; In addition, through with wafer 900--1000 ℃ of sintering several seconds to a few minutes, make semiconductor eutectic in metal electrode element and the wafer compound after; Make electrode and the substrate (like silicon) reach excellent contact, reduced should the zone resistance.Thus, the concentration through accurate controlled doping ion makes square resistance in desirable scope, and improves the conversion efficiency of solar cell thus.And for existing thermal diffusion process, ion implantation provides a kind of means of most economical manufacturing selective emitter solar battery.
Description of drawings
Fig. 1-5 is the decomposition step sketch map of preparation solar wafer of the present invention.
Embodiment
Providing preferred embodiment of the present invention below in conjunction with accompanying drawing, is example with the solar wafer of N type substrate 1, specifies technical scheme of the present invention.
The preparation method of solar wafer, it may further comprise the steps:
With reference to figure 1, step S
1Form P type doped layer 2 on the surface of the wafer of N type substrate; For example can form P type doped layer 2 on the surface of the wafer of N type substrate through the mode of ion injection/annealing or diffusion growth; Those skilled in the art can select the concentration of suitable dopant ion to obtain desirable square resistance according to actual needs, for example 20-50 Ω/m
2
With reference to figure 2, step S
2, on this P type doped layer 2, forming a coating 3, this coating comprises passivation layer and anti-reflection film, and the effect of coating is the passivation and formation anti-reflective film to silicon face, and passivation layer can adopt SiOx, SiCx, SiNx, Al
2O
3Deng film, anti-reflection film is used to reduce the light reflectance of solar cell surface, adopts above-mentioned coating can improve the conversion efficiency of solar cell.In addition, can adopt the method for PECVD (plasma chemistry gaseous phase deposition) to form coating, those skilled in the art can select other known approaches according to actual needs certainly;
With reference to figure 3, step S
3Metal electrode 4 is pressed in plating on this coating 3; For example adopt the mode of printed circuit to plate the pressure metal electrode, for example adopt silver slurry or silver/aluminium paste to carry out the making of metal electrode, those skilled in the art can select other known approaches and well known materials to make electrode according to actual needs;
With reference to figure 4, step S
4, acceleration N type ion and the mode of injecting through ion make this this coating 3 of N type ion penetration be injected into this P type doped layer 2, wherein; This N type ion is accelerated to 10-100keV and passes coating through the ion injection mode, be doped in the P type doped layer 2 and go, a part of P type that neutralizes electrically; Make metal electrode not have the P type carrier concentration of region covered to reduce; It is big that resistance becomes, and preferably, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2, and the degree of depth that N type ion injects is 0.2-0.5 μ m;
With reference to figure 5, step S
5, with the wafer of this N type substrate 850-1000 ℃ sintering temperature several seconds to a few minutes, make silicon eutectic in metal electrode element and the wafer compound after, make metal electrode and substrate reach excellent contact, reach the purpose that reduces this regional resistance; The temperature of sintering can make the impurity activation of the doped layer that forms through the mode that ion injects or diffusion is grown simultaneously, reaches the purpose of annealing.
Only need be in said process, the impurity material that the mode that transposing base material and ion inject or diffusion is grown is mixed, then this method is equally applicable to the making of P type solar wafer, and when promptly described N type replaced with the P type, the P type replaced with the N type simultaneously.In method of the present invention, successively inject opposite polarity ion (P type ion if the injection N of elder generation type ion then reinjects after making metal electrode; If it is then opposite to inject earlier P type ion), can reduce the concentration of the charge carrier after mixing for the first time, promptly doped regions hole and free electronic concentration have reduced having for the second time.
Make the selective emitter that is used for solar cell through this method; Not only can be applicable to the solar wafer of P type and N type simultaneously; And method is simple, and step is less, can be in the photovoltaic efficiency that improves solar cell; And reduced technology intermediate link, improved Production Line efficient.
With reference to figure 4 and Fig. 5, the present invention also provides a kind of solar wafer, and it comprises:
One N type substrate 1;
One is positioned at the P type doped layer 2 in this N type substrate 1;
One is positioned at the coating 3 on this P type doped layer 2, and this coating comprises passivation layer and anti-reflection film;
Be positioned at the metal electrode 4 on this coating 3,
Wherein, This P type doped layer 2 comprises part that is covered by this metal electrode and the part that is not covered by this metal electrode; Said P type doped layer by the part of this metal electrode covering is the P type doped layer that does not have N type ion to inject; Said is not the P type doped layer that has N type ion to inject by the P type doped layer of the part of this metal electrode covering
Wherein, this metal electrode 4 is compound with the said P type doped layer eutectic that does not have N type ion to inject.
Wherein, the thickness of this coating is 60-150nm, and the effect of coating is the passivation and formation anti-reflective film to silicon face.
Wherein, the square resistance of the P type doped layer of the said N of not having type ion injection is 20-50 Ω/m
2, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2, and the degree of depth that N type ion injects is 0.2-0.5 μ m.
Wherein, above-mentioned structure also is applicable to the solar wafer of P type substrate, and when promptly described N type replaced with the P type, the P type replaced with the N type simultaneously.
Though more than described embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited appended claims.Those skilled in the art can make numerous variations or modification to these execution modes under the prerequisite that does not deviate from principle of the present invention and essence, but these changes and modification all fall into protection scope of the present invention.
Claims (9)
1. solar wafer is characterized in that it comprises:
One N type substrate;
One is positioned at the suprabasil P type of this N type doped layer;
One is positioned at the coating on this P type doped layer, and this coating comprises passivation layer and anti-reflection film;
Be positioned at the metal electrode on this coating,
Wherein, This P type doped layer comprises part that is covered by this metal electrode and the part that is not covered by this metal electrode; Said P type doped layer by the part of this metal electrode covering is the P type doped layer that does not have N type ion to inject; Said is not the P type doped layer that has N type ion to inject by the P type doped layer of the part of this metal electrode covering
Wherein, this metal electrode and the said P type doped layer eutectic that does not have N type ion to inject are compound,
Wherein, when described N type replaced with the P type, the P type replaced with the N type simultaneously.
2. solar wafer as claimed in claim 1 is characterized in that, wherein, the thickness of this coating is 60-150nm.
3. solar wafer as claimed in claim 1 is characterized in that, the square resistance of the P type doped layer that the said N of not having type ion injects is 20-50 Ω/m
2, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2, and the degree of depth that N type ion injects is 0.2-0.5 μ m.
4. preparation method who makes solar wafer as claimed in claim 1 is characterized in that it may further comprise the steps:
S
1, form P type doped layer on the surface of the wafer of N type substrate;
S
2, on this P type doped layer, form a coating, this coating comprises passivation layer and anti-reflection film;
S
3, press metal electrode in the plating of this coating;
S
4, quicken N type ion and the mode injected through ion makes this this coating of N type ion penetration be injected into this P type doped layer;
S
5, with the wafer of this N type substrate sintering temperature at 850-1000 ℃, and annealing in sintering,
Wherein, when described N type replaced with the P type, the P type replaced with the N type simultaneously.
5. the preparation method of solar wafer as claimed in claim 4 is characterized in that, step S
1In mode through ion injections/annealing or diffusion growth at the surface of the wafer of N type substrate formation P type doped layer, the square resistance of this P type doped layer is 20-50 Ω/m at this moment
2
6. the preparation method of solar wafer as claimed in claim 4 is characterized in that, step S
2In mode through PECVD form coating, the passivation layer of this coating is SiOx, SiCx, SiNx or Al
2O
3Film.
7. the preparation method of solar wafer as claimed in claim 4 is characterized in that, step S
3In plate the pressure metal electrode through the mode of printed circuit.
8. the preparation method of solar wafer as claimed in claim 4 is characterized in that, step S
4In this N type ion be accelerated to 10-100keV.
9. the preparation method of solar wafer as claimed in claim 4 is characterized in that, step S
4In the injection degree of depth of this N type ion be 0.2-0.5 μ m, the square resistance of the P type doped layer that the said N of having type ion injects is 60-150 Ω/m
2
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103050536A (en) * | 2012-12-04 | 2013-04-17 | 上海华虹Nec电子有限公司 | Radio frequency LDMOS (laterally diffused metal oxide semiconductor) device and manufacture method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040112426A1 (en) * | 2002-12-11 | 2004-06-17 | Sharp Kabushiki Kaisha | Solar cell and method of manufacturing the same |
| JP3786809B2 (en) * | 1999-12-21 | 2006-06-14 | エア・ウォーター株式会社 | Solar cell manufacturing method |
| CN101043056A (en) * | 2005-08-22 | 2007-09-26 | 旺宏电子股份有限公司 | Nonvolatile memory device and method of forming the same |
| CN101164173A (en) * | 2005-04-26 | 2008-04-16 | 信越半导体股份有限公司 | Solar cell manufacturing method and solar cell |
| CN101901851A (en) * | 2009-06-01 | 2010-12-01 | 和舰科技(苏州)有限公司 | Method for manufacturing selective emitter solar cell |
-
2010
- 2010-07-23 CN CN201010234538.0A patent/CN102339876B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3786809B2 (en) * | 1999-12-21 | 2006-06-14 | エア・ウォーター株式会社 | Solar cell manufacturing method |
| US20040112426A1 (en) * | 2002-12-11 | 2004-06-17 | Sharp Kabushiki Kaisha | Solar cell and method of manufacturing the same |
| CN101164173A (en) * | 2005-04-26 | 2008-04-16 | 信越半导体股份有限公司 | Solar cell manufacturing method and solar cell |
| CN101043056A (en) * | 2005-08-22 | 2007-09-26 | 旺宏电子股份有限公司 | Nonvolatile memory device and method of forming the same |
| CN101901851A (en) * | 2009-06-01 | 2010-12-01 | 和舰科技(苏州)有限公司 | Method for manufacturing selective emitter solar cell |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103050536A (en) * | 2012-12-04 | 2013-04-17 | 上海华虹Nec电子有限公司 | Radio frequency LDMOS (laterally diffused metal oxide semiconductor) device and manufacture method thereof |
| CN103050536B (en) * | 2012-12-04 | 2016-02-10 | 上海华虹宏力半导体制造有限公司 | A kind of radio frequency LDMOS device and manufacture method thereof |
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Address after: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1 Patentee after: KINGSTONE SEMICONDUCTOR COMPANY LTD. Address before: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1 Patentee before: Shanghai Kaishitong Semiconductor Co., Ltd. |