CN102569498A - Solar battery and manufacture method thereof - Google Patents

Solar battery and manufacture method thereof Download PDF

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CN102569498A
CN102569498A CN2010106191837A CN201010619183A CN102569498A CN 102569498 A CN102569498 A CN 102569498A CN 2010106191837 A CN2010106191837 A CN 2010106191837A CN 201010619183 A CN201010619183 A CN 201010619183A CN 102569498 A CN102569498 A CN 102569498A
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ion
wafer
solar cell
doped layer
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陈炯
钱锋
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SHANGHAI KAISHITONG SEMICONDUCTOR CO Ltd
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SHANGHAI KAISHITONG SEMICONDUCTOR CO Ltd
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    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention discloses a manufacture method of a solar battery. The manufacture method comprises the following steps that: step S1, an N+ type doping layer is formed on the surface of a P type wafer, and an N++ type heavily doped region is formed in the N+ type doping layer; step S2, a P type doping layer is formed on the back side of the P type wafer; step 3, coatings are formed on the surface and the back side of the P type wafer, and the coatings are a passivation layer and an antireflection coating; step S4, a surface electrode is formed on the surface of the P type wafer and is positioned in a position opposite to the N++ type heavily doped region; S5, a back side electrode is formed on the back side of the P type wafer; and step S6, the P type wafer is sintered at 700 to 1100 DEG C so that metal electrode elements and wafer eutectic crystals are compounded, wherein when the P type is replaced into the N type, the N type is simultaneously replaced into the P type. The invention also discloses the solar battery. The structure of a selective emitting electrode is adopted, the contact resistance between the surface electrode and a base is reduced, and the photoelectric transformation efficiency of the solar cell is improved.

Description

Solar cell and preparation method thereof
Technical field
The present invention relates to a kind of solar cell and preparation method thereof, particularly relate to a kind of solar cell and preparation method thereof with selective emitter.
Background technology
After solar cell received illumination, battery produced electron-hole pair after absorbing the incident photon of an energy greater than band gap width, and electronics and hole are energized into the upper state of conduction band and valence band respectively.Moment after exciting, the energy of incident photon is depended in electronics and hole in the energy position of excitation state.The photo-generated carrier that is in upper state very fast with the lattice interaction, energy is given phonon and is fallen back at the bottom of the conduction band and top of valence band, this process is also referred to as the thermalization process, the thermalization process make high-energy photon energy loss a part.After the thermalization process, the transport process of photo-generated carrier will have recombination losses in (barrier region or diffusion region).Last voltage output once pressure drop again, pressure drop derive from the difference with the work function of electrode material.By above-mentioned analysis, solar battery efficiency receives material, device architecture and preparation technology's influence, comprises the light loss of battery, limited mobility, recombination losses, series resistance and the bypass resistance loss etc. of material.For certain material, battery structure and preparation technology's improvement is important to improving photoelectric conversion efficiency.
In general solar cell preparation technology mainly passes through following process, is the example explanation with the silicon chip:
1, the surface treatment of silicon chip: prepare on the surface of silicon chip is the first step main technique of making silicon solar cell, and it comprises the chemical cleaning and the surface corrosion of silicon chip.After cutting into the silicon chip of accords with production requirement to the good silicon ingot that mixes on request; At first will be to its surface treatment; Because cutting back silicon chip surface has dust, organic substances such as metal ion and other inorganic matters and grease also can produce certain mechanical damage layer when cutting.Can get rid of these pollutions and damage through sour corrosion and alkaline corrosion, make the silicon chip surface light.Afterwards, silicon chip is put into sodium hydroxide solution or other acid solution of 1.2%-1.5% and done the pyramid matte, incident light is repeatedly reflected on the surface and reflect, increased the absorption of light, improved the efficient of battery.
2, diffusion system knot: making the knot process is on a block matrix material, to generate the different diffusion layer of conduction type, and preceding surface treatment all is the critical processes in the battery manufacture process with the system knot for it.Diffusion is a kind of phenomenon of material molecule or atomic motion.The method of thermal diffusion system P-N knot is to make V family impurity infiltrate P type silicon or the impurity infiltration N of III family type silicon through high temperature.The most frequently used V family impurity of silicon solar cell is phosphorus, and what III family impurity was the most frequently used is boron.Requirement to diffusion is junction depth and the diffusion layer square resistance that obtains to be suitable for solar cell P-N knot needs.The shallow junction dead layer is little, and battery shortwave effect is good, and shallow junction causes that series resistance increases, and has only the density that improves gate electrode, could effectively improve the fill factor, curve factor of battery.So just increased technology difficulty.Junction depth is too dark, and dead layer is apparent in view.If diffusion concentration is too big, then cause heavy doping effect, the open circuit voltage of battery and short circuit current are descended.In the battery of reality is made, considered the factor of many aspects, so the junction depth of solar cell generally is controlled at 0.3～0.5 micron, 20～70 ohm of square resistance average out to.At present, the used main thermal diffusion method of silicon solar cell is liquid source diffusion, and this technology is that the method for carrying through gas is with realizing in impurity band such as the diffusion furnace.
3, trimming: in diffusion process, also formed diffusion layer at the periphery surface of silicon chip, peripheral diffusion layer can make the upper/lower electrode of battery form short-circuited conducting sleeve, must it be removed.Existing any small partial short-circuit that the battery parallel resistance is descended on the periphery, is fatal to the influence of battery.The main method of trimming has etch, extrusion and ion dry etching etc.It is now industrial that the longest what use is plasma method, feed nitrogen, oxygen and carbon tetrafluoride high pressure and produce aura down, by oxonium ion and fluorine ion alternately to the silicon effect, remove the diffusion layer periphery lead with layer.Because generated P, P in the diffusion 2O 5, S iO 2And phosphorosilicate glass, cleaned 2 minutes with 10% HF solution now, reach the purpose of decontamination glass.
4, make antireflective coating: illumination is mapped on the silicon chip on plane, and wherein some is reflected, even the silicon face of matte also has 11% reflection loss approximately, covers one deck antireflective coating at silicon face, can reduce reflection of light greatly.The spraying process that adopts now, it is to utilize high temperature to generate titanium dioxide film at silicon face; The method that also has a kind of spraying is with PECVD (plasma chemistry gaseous phase deposition) system, and it is by computer control, and under vacuum, high-voltage radio-frequency source condition, ammonia that makes and silane gas ionization form silicon nitride film at silicon face.
5, electrode is made: electrode is exactly the electric conducting material that forms tight ohmic contact with P-N knot two ends.Such material should satisfy: can form firm contact and contact resistance is little, excellent conductivity, little, the high requirement of collection efficiency of shielded area with silicon.A large amount of adopted technologies are silver slurry or silver/aluminium paste printing in the commercialization battery production at present; And this technology moves to maturity; The ratio of width to height of grid line reduces greatly; This and battery electrode designing principle---make the output of battery maximum, promptly as far as possible little and illumination active area battery of the series resistance of battery is as far as possible greatly on all four.
6, electrode is made and is finished the next operation-sintering of having arrived.Sintering is last one production process of solar energy monolithic battery, and good temperature curve is crucial in this step, and sintering time will be got hold of, and at first wants low temperature by the eliminating of the materials such as mixing agent in the slurries, heats or is sintered to aluminium-above sintered alloy of silicon eutectic point.Through after the alloying, along with cooling, the silicon in the liquid phase will solidify again; Formation contains the recrystallized layer of a certain amount of aluminium, and it is actually a process that silicon is mixed, and it has compensated the donor impurity in the N+ layer of the back side; Obtain with aluminium doped P-type layer, along with the rising of alloy temperature, the increasing proportion of the aluminium in the liquid phase; Under enough aluminium amount alloy temperatures, the back side even can form the electric field identical with the place ahead becomes back of the body electric field; This technology has been used in the large batch of commercial production at present, thereby has improved open circuit voltage and short circuit current, and has reduced the electrode contact resistance.Temperature and factors such as time and temperature that can back of the body knot burn with the doping content of the resistivity of stock, reverse diffusion layer and thickness, back side thickness or printing aluminum layer thickness, sintering all have relation.The two poles of the earth of battery are burnt in the too high meeting of temperature, badly damaged battery, and the not high enough ohmic contact formedness that can not guarantee electrode of temperature is so must there be a suitable temperature to remove sintering.The solar battery sheet of monolithic has just been accomplished like this, arrives test at last, is welding and packaging technology then.
Because the concentration of dopant ion can't be precisely controlled in the thermal diffusion process, causes the conversion efficiency of solar cell to be limited to, and can't carry out opto-electronic conversion efficiently.And adopting thermal diffusion process to prepare solar cell, its processing step is more, causes the reduction of production efficiency and the raising of cost.
Summary of the invention
The defective that the technical problem that the present invention will solve is that the prior art conversion efficiency of solar cell is low in order to overcome, the concentration of dopant ion can't be precisely controlled and processing step is complicated, cost is higher in the thermal diffusion process, what provide that a kind of processing procedure cost is low, dopant ion concentration is able to accurately control and photoelectric conversion efficiency is high has solar cell of selective emitter and preparation method thereof.
The present invention solves above-mentioned technical problem through following technical proposals:
A kind of manufacture method of solar cell, its characteristics are that it may further comprise the steps:
Step S 1, in P type wafer surface, form N+ type doped layer, have N++ type heavily doped region in this N+ type doped layer, those skilled in the art can select the technology that is fit to, the technology that for example adopts ion to inject according to actual needs;
Step S 2, in P type chip back surface, form P type doped layer, those skilled in the art can select the technology that is fit to according to actual needs, the technology that for example adopts thermal diffusion process or ion to inject forms P type doped layer;
Step S 3, form coating at P type wafer surface and the back side, this coating is passivation layer and anti-reflection film, those skilled in the art can select other suitable known approaches to form above-mentioned passivation layer according to actual needs.Surface passivation can reduce semi-conductive surface activity; The recombination rate on surface is reduced; Its main mode is the dangling bonds at saturated semiconductor surface place, reduces surface activity, increases the cleaning procedure on surface; Avoid reducing the recombination velocity of minority carrier with this owing to impurity forms the complex centre in the introducing of superficial layer.Through surface passivation, make surface recombination reduce, thereby improve effective minority carrier life time.Anti-reflection film can reduce surperficial sun reflection of light, improves the utilance of sunlight, adopts above-mentioned coating to be the effective means that improves the solar cell photoelectric conversion efficiency;
Step S 4, form surface electrode in P type wafer surface, this surface electrode is positioned at and this corresponding position of N++ type heavily doped region;
Step S 5, form backplate at P type chip back surface;
Step S 6, with P type wafer at 700--1100 ℃ of sintering, make metal electrode element and wafer eutectic compound, for example 700--1100 ℃ of sintering 30 seconds to 30 minutes, preferred sintering temperature is 850--1000 ℃,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
Preferably, step S 1The square resistance of the middle N+ type doped layer that forms is 60-120 Ω/, and preferably, the square resistance of this N+ type doped layer is 70-110 Ω/, and more preferably, the square resistance of this N+ type doped layer is 80-100 Ω/; The square resistance of N++ type heavily doped region is 10-50 Ω/, and preferably, the square resistance of this N++ type heavily doped region is 15-45 Ω/, and more preferably, the square resistance of this N++ type heavily doped region is 20-40 Ω/.
Preferably, step S 1Further comprising the steps of:
Step S 11, in this P type wafer surface mask plate is set, quicken N type ion and the mode injected through ion is injected into the P type wafer that is not covered by this mask plate with this N type ion from the surface of this P type wafer;
Step S 12, remove mask plate, quicken N type ion and the mode injected through ion is injected into this P type wafer with this N type ion from the surface of this P type wafer.
Preferably, step S 1Further comprising the steps of:
Step S 11 ', quicken N type ion and the mode injected through ion is injected into this P type wafer with this N type ion from the surface of this P type wafer;
Step S 12 ', in this P type wafer surface mask plate is set, quicken N type ion and the mode injected through ion is injected into the P type wafer that is not covered by this mask plate with this N type ion from the surface of this P type wafer.
Preferably, said N type ion is accelerated to 500eV-50keV, and wherein, preferably, said N type ion is accelerated to 1keV-40keV, and more preferably, said N type ion is accelerated to 5keV-30keV.
Preferably, step S 2In P type ion is accelerated to 500eV-50keV and the mode injected through ion is injected this P type ion with at P type chip back surface formation P type doped layer from this P type chip back surface; Wherein, Preferably; Said P type ion is accelerated to 1keV-40keV, and more preferably, said P type ion is accelerated to 5keV-30keV; The square resistance of this P type doped layer is 10-80 Ω/, and wherein, preferably, the square resistance of this P type doped layer is 20-70 Ω/; More preferably, the square resistance of this P type doped layer is 30-60 Ω/.
Preferably, step S 3In form coating through PECVD (plasma enhanced chemical vapor deposition method), the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, the anti-reflection film of this coating is a silicon nitride film.Surface passivation can reduce semi-conductive surface activity; The recombination rate on surface is reduced; Its main mode is the dangling bonds at saturated semiconductor surface place, reduces surface activity, increases the cleaning procedure on surface; Avoid reducing the recombination velocity of minority carrier with this owing to impurity forms the complex centre in the introducing of superficial layer.Through surface passivation, make surface recombination reduce, thereby improve effective minority carrier life time.Anti-reflection film can reduce surperficial sun reflection of light, improves the utilance of sunlight, adopts above-mentioned coating to be the effective means that improves the solar cell photoelectric conversion efficiency.
Preferably, step S 4In adopt the silver slurry and through silk screen print method with the corresponding position of said N++ type heavily doped region on make surface electrode.
Preferably, step S 5The middle silver-colored aluminium paste of employing also passes through the silk screen printing method for producing backplate, and the content of aluminium is greater than 3% in the said silver-colored aluminium paste, and preferably, the content of aluminium is greater than 5% in the said silver-colored aluminium paste, and said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
The solar cell that the present invention also provides a kind of manufacture method of aforesaid solar cell to make, its characteristics are that it comprises:
One P type wafer;
One is arranged in the N+ type doped layer of this P type wafer surface, has N++ type heavily doped region in this N+ type doped layer;
One is arranged in the P type doped layer of this P type chip back surface;
Lay respectively at the coating at this N+ type doped layer surface and this P type doped layer back side, this coating is passivation layer and anti-reflection film;
Be positioned at the surface electrode on this N+ type doped layer surface;
Be positioned at the backplate at this P type doped layer back side;
Wherein, metallic element in this surface electrode and the backplate and wafer eutectic are compound, and this surface electrode is positioned at and this corresponding position of N++ type heavily doped region,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
Preferably, the square resistance of this N+ type doped layer is 60-120 Ω/, and preferably, the square resistance of this N+ type doped layer is 70-110 Ω/, and more preferably, the square resistance of this N+ type doped layer is 80-100 Ω/; The square resistance of this N++ type heavily doped region is 10-50 Ω/, and preferably, the square resistance of this N++ type heavily doped region is 15-45 Ω/, and more preferably, the square resistance of this N++ type heavily doped region is 20-40 Ω/.
Preferably, the square resistance of this P type doped layer is 10-80 Ω/, and wherein, preferably, the square resistance of this P type doped layer is 20-70 Ω/; More preferably, the square resistance of this P type doped layer is 30-60 Ω/.
Preferably, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, and the anti-reflection film of this coating is a silicon nitride film.
In addition, only need be in said process, transposing base material and the impurity material that mixes with the mode that ion injects or diffusion is grown, then this method is equally applicable to the making of N type solar wafer, and when promptly described P type replaced with the N type, the N type replaced with the P type simultaneously.What but injected this moment on N type base wafer front is P type ion such as boron ion, mixes to form the P+ type.
Measuring the photovoltaic performance of solar cell and assembly, is under stable natural daylight or simulated solar irradiation, under steady temperature, depicts its output current-voltage response, measures the photoelectric conversion efficiency of the irradiance of incident light with counting cell simultaneously.Photovoltaic energy resource system technical committee for standardization (TCST) (IEC-TC82) has stipulated standard test condition.The photoelectric conversion efficiency of the solar cell that makes according to the method described above is more than 19.25%.
Positive progressive effect of the present invention is:
1, adopt the structure of selective emitter, reduced the contact resistance between surface electrode and the substrate, solar energy converting efficient can improve about 10%.Specifically, at present the photoelectric conversion efficiency of the solar cell of volume production is about 17.5% on the production line, and the conversion efficiency of solar cell of the present invention can be increased to about 19.25%.
2, the solar cell that makes of the present invention has bilateral structure; Can receive light in the two sides; Different with traditional single face battery like this, the back side of the solar cell that the present invention makes also can utilize the sunlight of scattering sunlight and reflection, and solar energy converting efficient can improve about 10% thus.
3, adopting ion to inject mixes; The concentration of dopant ion has obtained accurate control, and is more favourable to the efficient that improves opto-electronic conversion compared with the doping of thermal diffusion process, also reduced processing step simultaneously; For example remove cleaning steps such as phosphorosilicate glass, thereby reduce cost of manufacture.
Description of drawings
Fig. 1-Fig. 6 is the decomposition step sketch map of manufacturing solar cells of the present invention.
Embodiment
Provide preferred embodiment of the present invention below in conjunction with accompanying drawing, to specify technical scheme of the present invention.
Embodiment 1
With reference to figure 1 and Fig. 2, clean wafers at first, step S 1, form N+ type doped layer 2 on the surface of P type wafer 1, have N++ type heavily doped region 21 in this N+ type doped layer 2, specifically; At first mask plate 20 is set on this P type wafer 1 surface; Positive electrode chromatography mark is arranged on the mask plate 20, quicken phosphonium ion and the mode injected through ion is injected into the P type wafer 1 that is not covered by this mask plate 20 with this phosphonium ion from the surface of this P type wafer 1, shown in arrow among Fig. 1; Wherein, said phosphonium ion is accelerated to 500eV; Afterwards; Remove mask plate 20, quicken phosphonium ion and the mode injected through ion is injected into this P type wafer 1 with this phosphonium ion from the surface of this P type wafer 1, shown in arrow among Fig. 2; The ion of this moment injects to the monoblock wafer; But not the regional area after the masked plate covering, said phosphonium ion is accelerated to 500eV, and obtaining square resistance thus is the N+ type doped layer 2 of 60 Ω/ and the N++ type heavily doped region 21 that square resistance is 10 Ω/.After accomplishing the ion injection, high annealing.
With reference to figure 3, step S 2, form P type doped layer 3 at P type wafer 1 back side; Specifically; The boron ion is accelerated to 500eV also through the mode that ion injects this boron ion is injected from this P type wafer 1 back side (shown in the direction of arrow of Fig. 3) to form P type doped layer 3 at P type wafer 1 back side, the square resistance of this P type doped layer is 10 Ω/.After accomplishing the ion injection, high annealing.
With reference to figure 4, step S 3, form coating 5 at P type wafer 1 surface and the back side, this coating 5 be passivation layer and anti-reflection film, through PECVD formation coating 5, the passivation layer of this coating 5 is a silica in the present embodiment, the anti-reflection film of this coating 5 is a silicon nitride film.
With reference to figure 5, step S 4, form surface electrode 6 on P type wafer 1 surface, this surface electrode 6 is positioned at and these N++ type heavily doped region 21 corresponding positions; Step S 5, form backplate 7 at P type chip back surface.Wherein adopt the silver slurry and through silk screen print method with the corresponding position of said N++ type heavily doped region on make surface electrode; Adopt silver-colored aluminium paste and pass through the silk screen printing method for producing backplate; The content of aluminium is 3% in the said silver-colored aluminium paste, and said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
With reference to figure 6, step S 6, with P type wafer 700 ℃ of sintering 30 minutes, make the silicon eutectic in metal electrode element and the wafer compound.Thus, said solar cell completes.
Embodiment 2
With reference to figure 1 and Fig. 2, clean wafers at first, step S 1, form N+ type doped layer 2 on the surface of P type wafer 1, have N++ type heavily doped region 21 in this N+ type doped layer 2, specifically; At first, mask plate 20 is set, positive electrode chromatography mark is arranged on the mask plate 20 on this P type wafer 1 surface; The mode of quickening phosphonium ion and injecting through ion is injected into the P type wafer that is not covered by this mask plate with this phosphonium ion from the surface of this P type wafer; Shown in arrow among Fig. 1, wherein, said phosphonium ion is accelerated to 50keV; Then remove mask plate 20; The mode of quickening phosphonium ion and injecting through ion is injected into this P type wafer with this phosphonium ion from the surface of this P type wafer; Shown in arrow among Fig. 2, the ion of this moment injects to the monoblock wafer, but not the regional area after the covering of masked plate; Said phosphonium ion is accelerated to 50keV, and obtaining square resistance thus is the N+ type doped layer 2 of 120 Ω/ and the N++ type heavily doped region 21 that square resistance is 50 Ω/.After accomplishing the ion injection, high annealing.
With reference to figure 3, step S 2, form P type doped layer 3 at P type chip back surface; Specifically; The boron ion is accelerated to 50keV also to be injected this boron ion to form P type doped layer 3 at P type wafer 1 back side through the mode that ion injects from this P type wafer 1 back side (shown in the direction of arrow of Fig. 3); Wherein, the square resistance of this P type doped layer is 80 Ω/.After accomplishing the ion injection, high annealing.
With reference to figure 4, step S 3, form coating 5 at P type wafer 1 surface and the back side, this coating 5 be passivation layer and anti-reflection film, through PECVD formation coating, the passivation layer of this coating is the lamination of silica, carborundum and silicon nitride in the present embodiment, the anti-reflection film of this coating is a silicon nitride film.
With reference to figure 5, step S 4, form surface electrode 6 in P type wafer surface, this surface electrode 6 is positioned at and these N++ type heavily doped region 21 corresponding positions; Step S 5, form backplate 7 at P type chip back surface.Wherein adopt the silver slurry and through silk screen print method with the corresponding position of said N++ type heavily doped region on make surface electrode; And adopt silver-colored aluminium paste and pass through the silk screen printing method for producing backplate, the content of aluminium is 5% in the said silver-colored aluminium paste, said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
With reference to figure 6, step S 6, with P type wafer 1100 ℃ of sintering 30 seconds, make the silicon eutectic in metal electrode element and the wafer compound.Thus, said solar cell completes.
Embodiment 3
With reference to figure 1 and Fig. 2, clean wafers at first, step S 1, form N+ type doped layer 2 on the surface of P type wafer 1, have N++ type heavily doped region 21 in this N+ type doped layer 2, specifically; At first, mask plate 20 is set, positive electrode chromatography mark is arranged on the mask plate 20 on this P type wafer 1 surface; The mode of quickening phosphonium ion and injecting through ion is injected into the P type wafer that is not covered by this mask plate with this phosphonium ion from the surface of this P type wafer; Shown in arrow among Fig. 1, wherein, said phosphonium ion is accelerated to 30keV; Then; Remove mask plate 20, quicken phosphonium ion and the mode injected through ion is injected into this P type wafer with this phosphonium ion from the surface of this P type wafer, shown in arrow among Fig. 2; The ion of this moment injects to the monoblock wafer; But not the regional area after the masked plate covering, said phosphonium ion is accelerated to 30keV, and obtaining square resistance thus is the N+ type doped layer 2 of 80 Ω/ and the N++ type heavily doped region 21 that square resistance is 30 Ω/.After accomplishing the ion injection, need high annealing.
With reference to figure 3, step S 2, form P type doped layer 3 at P type chip back surface; Specifically; The boron ion is accelerated to 30keV also through the mode that ion injects this boron ion is injected from this P type wafer 1 back side (shown in the direction of arrow of Fig. 3) to form P type doped layer 3 at P type wafer 1 back side, the square resistance of this P type doped layer is 50 Ω/.After accomplishing the ion injection, need high annealing.
With reference to figure 4, step S 3, form coating 5 at P type wafer 1 surface and the back side, this coating 5 be passivation layer and anti-reflection film, through PECVD formation coating, the passivation layer of this coating is a silicon nitride in the present embodiment, the anti-reflection film of this coating is a silicon nitride film.
With reference to figure 5, step S 4, form surface electrode 6 in P type wafer surface, this surface electrode 6 is positioned at and these N++ type heavily doped region 21 corresponding positions; Step S 5, form backplate 7 at P type chip back surface.Wherein adopt the silver slurry and through silk screen print method with the corresponding position of said N++ type heavily doped region on make surface electrode; And adopt silver-colored aluminium paste and pass through the silk screen printing method for producing backplate, the content of aluminium is 4% in the said silver-colored aluminium paste, said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
With reference to figure 6, step S 6, with P type wafer 850 ℃ of sintering 10 minutes, make the silicon eutectic in metal electrode element and the wafer compound.Thus, said solar cell completes.
Embodiment 4
The principle of embodiment 4 is identical with embodiment 1; Difference only is to have changed the base material of wafer, and when promptly described P type replaced with the N type, the N type replaced with the P type simultaneously; When forming doped layer; Adopt the boron ion doping to form P type doped layer, adopt phosphonium ion to mix and form N type doped layer, all the other parameters etc. are all identical with embodiment 1.
Adopting the advantage of selective emitter is to improve the open circuit voltage Voc of solar cell, short circuit current Isc and fill factor, curve factor F.F., thus make battery obtain high photoelectric conversion efficiency.And such benefit doping content height different, the diffusion depth is different in the different zone of solar cell is just brought.
Though more than described embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited appended claims.Those skilled in the art can make numerous variations or modification to these execution modes under the prerequisite that does not deviate from principle of the present invention and essence, but these changes and modification all fall into protection scope of the present invention.

Claims (13)

1. the manufacture method of a solar cell is characterized in that, it may further comprise the steps:
Step S 1, in P type wafer surface, form N+ type doped layer, have N++ type heavily doped region in this N+ type doped layer;
Step S 2, in P type chip back surface, form P type doped layer;
Step S 3, form coating at P type wafer surface and the back side, this coating is passivation layer and anti-reflection film;
Step S 4, form surface electrode in P type wafer surface, this surface electrode is positioned at and this corresponding position of N++ type heavily doped region;
Step S 5, form backplate at P type chip back surface;
Step S 6, with P type wafer at 700--1100 ℃ of sintering, make metal electrode element and wafer eutectic compound,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
2. the manufacture method of solar cell as claimed in claim 1 is characterized in that, step S 1The square resistance of the middle N+ type doped layer that forms is 60-120 Ω/, and the square resistance of N++ type heavily doped region is 10-50 Ω/.
3. the manufacture method of solar cell as claimed in claim 1 is characterized in that, step S 1Further comprising the steps of:
Step S 11, in this P type wafer surface mask plate is set, quicken N type ion and the mode injected through ion is injected into the P type wafer that is not covered by this mask plate with this N type ion from the surface of this P type wafer;
Step S 12, remove mask plate, quicken N type ion and the mode injected through ion is injected into this P type wafer with this N type ion from the surface of this P type wafer.
4. the manufacture method of solar cell as claimed in claim 1 is characterized in that, step S 1Further comprising the steps of:
Step S 11 ', quicken N type ion and the mode injected through ion is injected into this P type wafer with this N type ion from the surface of this P type wafer;
Step S 12 ', in this P type wafer surface mask plate is set, quicken N type ion and the mode injected through ion is injected into the P type wafer that is not covered by this mask plate with this N type ion from the surface of this P type wafer.
5. like the manufacture method of claim 3 or 4 described solar cells, it is characterized in that said N type ion is accelerated to 500eV-50keV.
6. like the manufacture method of any described solar cell among the claim 1-4, it is characterized in that step S 2In P type ion is accelerated to 500eV-50keV and the mode injected through ion is injected this P type ion with at P type chip back surface formation P type doped layer from this P type chip back surface, the square resistance of this P type doped layer is 10-80 Ω/.
7. like the manufacture method of any described solar cell among the claim 1-4, it is characterized in that step S 3In form coating through PECVD, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, the anti-reflection film of this coating is a silicon nitride film.
8. like the manufacture method of any described solar cell among the claim 1-4, it is characterized in that step S 4In adopt the silver slurry and through silk screen print method with the corresponding position of said N++ type heavily doped region on make surface electrode.
9. like the manufacture method of any described solar cell among the claim 1-4, it is characterized in that step S 5The middle silver-colored aluminium paste of employing also passes through the silk screen printing method for producing backplate, and the content of aluminium is greater than 3% in the said silver-colored aluminium paste, and said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
10. the solar cell that makes of the manufacture method of a solar cell as claimed in claim 1 is characterized in that it comprises:
One P type wafer;
One is positioned at the N+ type doped layer of this P type wafer surface, has N++ type heavily doped region in this N+ type doped layer;
One is positioned at the P type doped layer of this P type chip back surface;
Lay respectively at the coating at this N+ type doped layer surface and this P type doped layer back side, this coating is passivation layer and anti-reflection film;
Be positioned at the surface electrode on this N+ type doped layer surface;
Be positioned at the backplate at this P type doped layer back side;
Wherein, metallic element in this surface electrode and the backplate and wafer eutectic are compound, and this surface electrode is positioned at and this corresponding position of N++ type heavily doped region,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
11. solar cell as claimed in claim 10 is characterized in that, the square resistance of this N+ type doped layer is 60-120 Ω/, and the square resistance of this N++ type heavily doped region is 10-50 Ω/.
12. solar cell as claimed in claim 10 is characterized in that, the square resistance of this P type doped layer is 10-80 Ω/.
13. solar cell as claimed in claim 10 is characterized in that, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, and the anti-reflection film of this coating is a silicon nitride film.
CN2010106191837A 2010-12-30 2010-12-30 Solar battery and manufacture method thereof Pending CN102569498A (en)

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Application publication date: 20120711