CN102339258B - Control device and data transmitting system and method applying same - Google Patents
Control device and data transmitting system and method applying same Download PDFInfo
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- CN102339258B CN102339258B CN201010233923.3A CN201010233923A CN102339258B CN 102339258 B CN102339258 B CN 102339258B CN 201010233923 A CN201010233923 A CN 201010233923A CN 102339258 B CN102339258 B CN 102339258B
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Abstract
The invention discloses a control device and a data transmitting system and a data transmitting method applying the same. The control device comprises a storage element for storing a byte enabling attribute compatible with at least one processing device, and a control circuit which is coupled to the storage element and is used for generating at least one byte enabling signal for transmitting to the processing device according to the byte enabling attribute of the processing device.
Description
Technical field
The present invention relates to a kind of control device and a data communication system and the correlation technique thereof of applying this control device, espespecially judge control device and the correlation technique thereof of the byte enable attribute that this subordinate end treatment circuit can receive according to the address realm assigned by a subordinate end treatment circuit.
Background technology
In a Circuits System, a bus (BUS) is used as the data transmission medium between an integrated circuit and another integrated circuit.For example, a processor can produce an instruction and via this bus, this instruction is sent to a peripheral control circuits.In general, the form of this instruction that this processor produces must be the order format of this peripheral control circuits compatibility, and so, this peripheral control circuits successfully could perform the action of received instruction.But along with the development of science and technology, the hardware update degree of this processor and this peripheral control circuits may be nonsynchronous, so produce order format that this processor produces and this peripheral control circuits the incompatible problem of receptible order format.For example, when an older peripheral control circuits is coupled to a newer processor by this bus, if this older peripheral control circuits cannot be understood from this instruction compared with new processor, the action of this instruction cannot just be performed.Thus, the application of this processor will be limited to some specific peripheral control circuits significantly.Therefore, the data layout incompatibility problem how solved between an integrated circuit and another integrated circuit has become the problem that industry needs solution badly.
Summary of the invention
Therefore, an object of the present invention is to provide the address realm assigned by a kind of foundation one subordinate end treatment circuit to judge a control device and the correlation technique thereof of the byte enable attribute that this subordinate end treatment circuit can receive.
According to one embodiment of the invention, it provides a kind of control device.This control device includes a storage unit and a control circuit.This storage unit is used for storing a byte enable attribute of at least one treating apparatus compatibility.This control circuit is coupled to this storage unit, and this byte enable attribute be used for according to this treating apparatus is to produce at least one byte enable signal to this treating apparatus.
According to one embodiment of the invention, it provides a kind of data communication system.This data communication system includes a bus, a treating apparatus and a control device.This treating apparatus is coupled to this bus.This control device is coupled to this bus, wherein when this control device judges that a byte enable attribute of this treating apparatus compatibility belongs to one first byte enable form, and originally tendency to develop send be one second byte enable form time, this control device has multiple byte enable signals of this first byte enable form to this bus, the plurality of byte enable signal is sent to this treating apparatus by this bus according to the generation of this second byte enable form.
According to one embodiment of the invention, it provides a kind of control method.This control method includes the following step: utilize a storage unit to store a byte enable attribute of at least one treating apparatus compatibility; And produce at least one byte enable signal to this treating apparatus according to this byte enable attribute of this treating apparatus.
Accompanying drawing explanation
Figure 1A is an embodiment schematic diagram of a kind of data communication system of the present invention.
Figure 1B is an embodiment schematic diagram of the control device in data communication system of the present invention.
Fig. 2 is an embodiment process flow diagram of a kind of control method of the present invention.
Fig. 3 is an embodiment schematic diagram of the present invention one byte enable attribute table of comparisons.
Fig. 4 is an embodiment schematic diagram of the present invention one data-signal and a byte enable signal.
[main element symbol description]
100 data communication system 102 buses
104 control device 106 first treating apparatus
The 108 second treating apparatus 300 byte enable attribute tables of comparisons
402 data-signal 404 byte enable signals
1042 storage unit 1044 control circuits
1046 configurable bus interface 1048 central processing units
1050 demoder 1052 state machines
1062 first interface circuit
1082 second interface circuits
4022,4024,4026,4028 byte datas
4042,4044,4046,4048 bit data
Embodiment
Some vocabulary is employed to censure specific element in the middle of instructions and follow-up claim.Those of ordinary skill in affiliated field should be understood, and hardware manufacturer may call same element with different nouns.This instructions and follow-up claim are not used as the mode of distinguish one element from another with the difference of title, but are used as the criterion of differentiation with element difference functionally." comprising " mentioned in the middle of instructions and follow-up claims is in the whole text an open term, therefore should be construed to " comprise but be not limited to ".In addition, " couple " word comprise directly any at this and be indirectly electrically connected means, therefore, if describe a first device in literary composition to be coupled to one second device, then represent this first device and directly can be electrically connected in this second device, or be indirectly electrically connected to this second device by other device or connection means.
Please refer to Figure 1A.It is the embodiment schematic diagram according to a kind of data communication system 100 of the present invention shown in Figure 1A.Data communication system 100 includes bus 102, control device 104,1 first treating apparatus 106 and one second treating apparatus 108.Control device 104 includes storage unit 1042 and a control circuit 1044, and wherein storage unit 1042 and control circuit 1044 form a configurable bus interface (Configurable BusInterface) 1046.In other words, configurable bus interface 1046 is integrated in control device 104.First treating apparatus 106 and the second treating apparatus 108 are coupled to bus 102 respectively by a first interface circuit 1062 and one second interface circuit 1082.Configurable bus interface 1046 is also coupled to bus 102.Storage unit 1042 is used for storing the compatible attribute of each device being coupled to bus 102, and this compatible attribute kit contains the information of the instruction (command) that can receive which kind of form about each device.In this embodiment, include the first treating apparatus 106 and the second treating apparatus 108 by being coupled to bus 102 with each device of instruction receiving self-control device 104, the storage unit 1042 in configurable bus interface 1046 store the first treating apparatus 106 and the second treating apparatus 108 distinguish a receptible byte enable (Byte Enable) attribute.Control circuit 1044 is coupled to storage unit 1042, is used for producing one first byte enable signal and one second byte enable signal to the first treating apparatus 106 and the second treating apparatus 108 respectively according to one first byte enable attribute of the first treating apparatus 106 and one second byte enable attribute of the second treating apparatus 108.Note that the present invention does not limit and only has two treating apparatus, the treating apparatus that those of ordinary skill in the art should understand any number all belongs to category place of the present invention.
In order to further illustrate spiritual place of the present invention, the present embodiment separately provides more detailed control device 104 schematic diagram, as shown in Figure 1B.It is an embodiment schematic diagram of the control device 104 in data communication system 100 of the present invention shown in Figure 1B.In the present embodiment, except storage unit 1042 and control circuit 1044, control device 104 also includes central processing unit 1048, demoder 1050 and a state machine 1052.Central processing unit 1048 is used for generation first treating apparatus 106 and the information needed for the second treating apparatus 108 or the information that processes from the first treating apparatus 106 and the second treating apparatus 108.Demoder 1050 be used for the information that produces according to central processing unit 1048 to decode bus 102 institute energy compatible one predeterminedly export data, this makes a reservation for byte enable (ByteEnable) signal that output packet contains the first treating apparatus 106 or the information needed for the second treating apparatus 108 and a correspondence.State machine 1052 is arranged in one embodiment within control circuit 1044 and (maybe can be coupled in another embodiment outside control circuit 1044), and it is used for predetermined exporting object treating apparatus that the tendency to develop of data institute send to control a mode of operation of control circuit 1044 according to this.
When data communication system 100 is when operating, control device 104 can be considered a main control end (Master) device, and the first treating apparatus 106 and the second treating apparatus 108 then can be considered subordinate end (Slave) device.Please note, in subsequent paragraph, the bus 102 of the data communication system 100 of the present embodiment can be illustrated with open core transmission protocol (Open CoreProtocol) bus, and with clearer description spiritual place of the present invention, so this is not as restriction of the present invention.Note that in the specification of this opening core transmission protocol bus, its mechanism separately defining byte enable is to improve its transmission usefulness.But, because this byte enable attribute is at least divided into the first byte enable form and the second byte enable form, for example, this the first byte enable form is simplification byte enable (Simple-byte-enable) form, and this second byte enable form is complicated byte enable (Complex-byte-enable) form, and the first treating apparatus 106 of subordinate and the second treating apparatus 108 might not receive the signal (such as an instruction) of above-mentioned two kinds of byte enable forms, therefore present invention provides control circuit 1044 produces corresponding byte enable form respectively signal to the first treating apparatus 106 and the second treating apparatus 108 according to the first treating apparatus 106 and respective this byte enable attribute of the second treating apparatus 108, as shown in Figure 2.Be the embodiment process flow diagram according to a kind of control method 200 of the present invention shown in Fig. 2, and control method 200 can be implemented by control device 104 of the present invention.The sequence of steps that scope of the present invention is not limited in the flow process shown in Fig. 2 is carried out, and the step shown in Fig. 2 not necessarily will be carried out continuously, and other step also can be interted wherein.Control method 200 includes the following step:
Step 202: utilize storage unit 1042 to store a byte enable attribute of at least one treating apparatus compatibility, when this byte enable attribute of this treating apparatus compatibility belongs to this complicated byte enable form, and originally tendency to develop send be this complicated byte enable form time, skip to step 204, when this byte enable attribute of this treating apparatus compatibility belongs to this simplification byte enable form, and originally tendency to develop send be this simplification byte enable form time, skip to step 206, when this byte enable attribute of this treating apparatus compatibility belongs to this complicated byte enable form, and originally tendency to develop send be this simplification byte enable form time, skip to step 208, when this byte enable attribute of this treating apparatus compatibility belongs to this simplification byte enable form, and originally tendency to develop send be this complicated byte enable form time, skip to step 210,
Step 204: generation has this byte enable signal of this complicated byte enable form to this treating apparatus;
Step 206: generation has this byte enable signal of this simplification byte enable form to this treating apparatus;
Step 208: generation has this byte enable signal of this simplification byte enable form to this treating apparatus;
Step 210: according to this complicated byte enable form produce there is this simplification byte enable form multiple byte enable signals to this treating apparatus.
Furthermore, in the present embodiment, when control device 104 judges that this byte enable attribute of a treating apparatus (such as the first treating apparatus 106) compatibility belongs to this simplification byte enable form, and the signal that originally tendency to develop is sent is when being this complicated byte enable form, control device 104 has multiple byte enable signals of this simplification byte enable form to bus 102, the plurality of byte enable signal is sent to the first treating apparatus 106 by bus 102 according to this complicated byte enable form generation.On the other hand, when control device 104 judges that this byte enable attribute of a treating apparatus (such as the second treating apparatus 108) compatibility belongs to this complicated byte enable form, and the signal that originally tendency to develop is sent is when being this simplification byte enable form, because the treating apparatus that can receive the instruction of complicated byte enable form also can receive the instruction simplifying byte enable form, so the direct generation of control device 104 has the byte enable signal of this simplification byte enable form to bus 102, this simplification byte enable signal is sent to the second treating apparatus 108 by bus 102.When control device 104 judges that this byte enable attribute of a treating apparatus compatibility belongs to this complicated byte enable form, and the signal that originally tendency to develop is sent is when being this complicated byte enable form, control device 104 directly generation has the byte enable signal of this complicated byte enable form to bus 102, this complicated byte enable signal is sent to this treating apparatus by bus 102.In addition, when control device 104 judges that this byte enable attribute of a treating apparatus compatibility belongs to this simplification byte enable form, and the signal that originally tendency to develop is sent is when being this simplification byte enable form, because the treating apparatus being merely able to receive the instruction simplifying byte enable form cannot receive the instruction of complicated byte enable form, so the direct generation of control device 104 has the byte enable signal of this simplification byte enable form to bus 102, this simplification byte enable signal is sent to this treating apparatus by bus 102.
Therefore, in order to reach above-mentioned feature, a byte enable attribute table of comparisons can be stored in storage unit 1042 of the present invention, as shown in Figure 3.The embodiment schematic diagram according to a byte enable attribute table of comparisons 300 of the present invention, the wherein treating apparatus of the first hurdle record subordinate shown in Fig. 3, the address realm corresponding to treating apparatus of the second hurdle record subordinate.When the first treating apparatus 106 and the second treating apparatus 108 are coupled to bus 102, the byte enable attribute table of comparisons 300 can record the first treating apparatus 106 and the respective address realm of the second treating apparatus 108.Generally speaking, the control circuit of one main control end can distribute an address realm to the treating apparatus of this subordinate end according to the byte enable attribute of the treating apparatus of a subordinate end, and the address realm be therefore assigned to from the treating apparatus of this subordinate end just can infer the byte enable attribute of the treating apparatus of this subordinate end.In other words, control circuit 1044 has also possessed the function judging the byte enable attribute of the treating apparatus of a subordinate end according to an address realm, and so this is not as restriction place of the present invention.In an alternative embodiment of the invention, when the first treating apparatus 106 and the second treating apparatus 108 are coupled to bus 102, the byte enable attribute table of comparisons 300 also can record this byte enable attribute that the first treating apparatus 106 and the respective address realm of the second treating apparatus 108 and this address realm map respectively, thus, control circuit 1044 just can directly read a treating apparatus this byte enable attribute and need via judging that the mode of address realm is to judge this byte enable attribute of this subordinate end treating apparatus.
Therefore, in the present embodiment, when control device 104 receives this predetermined output data (or an instruction) from demoder 1050, and tendency to develop gives this predetermined when exporting data to treating apparatus, such as the first treating apparatus 106, the state machine 1052 of control circuit 1044 will read out its byte enable attribute by the first address realm 00-3f of the first treating apparatus 106 from the byte enable attribute table of comparisons 300, and controls control circuit 1044 to transmit corresponding byte enable signal to the first treating apparatus 106 according to the method disclosed by above-mentioned paragraph.
In the following paragraphs, the present invention further illustrates the technical characteristic of the present embodiment.In this embodiment, the data-signal 402 that a treating apparatus is given in control device 104 tendencies to develop is signals of one 32, and institute's tendency to develop byte enable signal 404 of giving this treating apparatus is signals of one 4, as shown in Figure 4.It is the embodiment schematic diagram according to data-signal 402 of the present invention and byte enable signal 404 shown in Fig. 4.Data-signal 402 is made up of 4 byte data 4022-4028, byte enable signal 404 is made up of 4 bit data 4042-4048, wherein bit data 4042-4048 corresponds respectively to byte data 4022-4028, byte data 4022 comprises the 0 to 7 position, byte data 4024 comprises the 8 to 15 position, byte data 4026 comprises the 16 to 23 position, and byte data 4028 comprises the 24 to 31 position.When the place value of a data is 1, represent that the byte data of position corresponding to it will be received by this treating apparatus, and when the place value of a data is 0, represent that the byte data of position corresponding to it is not received by this treating apparatus, but, meaning representated by above-mentioned 0 and 1 is only an embodiment, and scope of the present invention is not limited to this.On the other hand, this simplification byte enable form that above-mentioned paragraph is mentioned represents that the setting of the place value of 4 bit data 4042-4048 of byte enable signal 404 only can correspond to a byte of data-signal 402, half character (being also two bytes) or a character (being also four bytes), and this complicated byte enable form represents that the setting of the place value of 4 bit data 4042-4048 of byte enable signal 404 can correspond to any byte of data-signal 402.For example, the byte enable signal 404 of this simplification can be [0,0,0,1], [0,0,1,1], [1, etc., and the byte enable signal 404 of this complexity can be [0,1,1,1], [1,01,1,1], 1,1], [1,1,0,1], [1,1,1,0] etc.In addition, in order to more clearly demonstrate spiritual place of the present invention, subsequent paragraph is this simplification byte enable form with this byte enable attribute of the first treating apparatus 106 compatibility, and this byte enable attribute of the second treating apparatus 108 compatibility explains for this complicated byte enable form.
When control device 104 receives these the predetermined output data produced from demoder 1050, and during for producing the data-signal 402 shown in Fig. 4 and byte enable signal 404 to the second treating apparatus 108, the state machine 1052 of control circuit 1044 can read the second address realm 40-ff of corresponding second treating apparatus 108 from this byte enable attribute table of comparisons storage unit 1042, and judges this byte enable attribute of the second treating apparatus 108 according to the second address realm 40-ff.In this example, because byte enable signal 404 is the byte enable signal of a complexity and this byte enable attribute of the second treating apparatus 108 compatibility is also this complicated byte enable form, therefore, after state machine 1052 judges the attribute of the second treating apparatus 108, just control control circuit 1044 and directly produce following data to bus 102:
OC_MADDR：0x40
OC_MDATA：32-bit
OC_MADATABYTEEN：4’b1101
Wherein OC_MADDR:0x40 representative data signal 402 for store address, the bit length of OC_MDATA:32-bit representative data signal 402, OC_MADATABYTEEN:4 ' b1101 represents the byte enable signal 404 of corresponding data signal 402.
But, when receiving these the predetermined output data produced from demoder 1050, and when control device 104 is for producing the data-signal 402 shown in Fig. 4 and byte enable signal 404 to the first treating apparatus 106, the state machine 1052 of control circuit 1044 also can read the first address realm 00-3f of corresponding first treating apparatus 106 from this byte enable attribute table of comparisons storage unit 1042, and judges this byte enable attribute of the first treating apparatus 106 according to the first address realm 00-3f.In this example, because byte enable signal 404 is the byte enable signal of a complexity, this byte enable attribute of the first treating apparatus 106 compatibility is this simplification byte enable form, therefore after state machine 1052 judges the attribute of the first treating apparatus 106, just controlling control circuit 1044 is that one first transmission data and one second transmit data by the Data Segmentation that institute's tendency to develop is sent, and respectively this first is transmitted data and this second transmits data and be sent to bus 102 in different time points, wherein this first transmit data and this second transmit data institute respectively correspondence one first byte enable signal and one second byte enable signal all belong to this simplification byte enable form, as follows:
These the first transmission data time point t1 transmits:
OC_MADDR：0x00
OC_MDATA：32-bit
OC_MADATABYTEEN：4’b0001
These the second transmission data time point t2 transmits:
OC_MADDR：0x02
OC_MDATA：32-bit
OC_MADATABYTEEN：4’b1100
Wherein OC_MADDR:0x00 represent this first transmit data institute for storage address, 0C_MDATA:32-bit represents this and first transmits the bit length of data, and OC_MADATABYTEEN:4 ' b0001 represents should the first the first byte enable signal transmitting data; OC_MADDR:0x02 represents this and second transmits the address of data institute for storing, and OC_MDATA:32-bit represents this and second transmits the bit length of data, and OC_MADATABYTEEN:4 ' b1100 represents should this second byte enable signals of the second transmission data.Therefore, when the first treating apparatus 106 is after time point t1 and t2 receives these first transmission data and this second transmission data, first treating apparatus 106 will according to this first byte enable signal by the data storing of a position, the 0 to 7 in data-signal 402 in address 0x00, and according to this second byte enable signal, the bit data of the 16 to 31 in data-signal 402 is stored in address 0x02.Thus, by control circuit 1044 of the present invention and storage unit 1042 and correlation technique thereof, control device 104 just can send the data-signal 402 with the byte enable signal of a complexity to can only receive this simplification byte enable signal the first treating apparatus 106 by bus 102.Note that a technical characteristic of the present invention is automatically produce at the control device 104 of main control end the byte enable signal meeting the first treating apparatus 106 compatibility of subordinate end.Thus, solution proposed by the invention just need separately not arrange a change-over circuit at the first treating apparatus 106 of subordinate end and solve the problem of this case institute for solving, and then the hardware cost of significantly saving subordinate end.Note that the present invention does not limit can only be two transmission data by the Data Segmentation that institute's tendency to develop is sent, and those of ordinary skill in the art should understand the transmission data that different byte enable signals can be partitioned into different number, and this is also category place of the present invention.
In sum, the control circuit of main control end of the present invention according to its subordinate end treatment circuit assigned by address realm judge the byte enable attribute that this subordinate end treatment circuit can receive, and produce corresponding byte enable attribute signal to this subordinate end treatment circuit.Thus, this subordinate end treatment circuit separately arranges a change-over circuit to carry out the conversion of byte enable signal with regard to not needing, and therefore data communication system of the present invention has possessed high integration, saves area, and dynamical characteristic.
The foregoing is only embodiments of the invention, all equalizations done according to the claims in the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (17)
1. a control device, includes:
One storage unit, be used for the byte enable attribute table of comparisons of byte enable attribute that the address realm of at least one treating apparatus of store recording and address realm map, described byte enable attribute is the first byte enable form or the second byte enable form being different from described first byte enable form; And
One control circuit, be coupled to described storage unit, for the address realm utilizing described at least one treating apparatus to distribute, the described byte enable attribute of described treating apparatus compatibility is read from the described byte enable attribute table of comparisons, when described control circuit judges that the described byte enable attribute of described treating apparatus compatibility is described first byte enable form, and originally tendency to develop send be described second byte enable form time, described control circuit produces multiple byte enable signals extremely described treating apparatus with described first byte enable form according to described second byte enable form.
2. control device according to claim 1, wherein, described control device is a master controlling terminal device, and described treating apparatus is a subordinate end device.
3. control device according to claim 1, wherein, described byte enable attribute kit contains a complicated byte enable form and and simplifies byte enable form.
4. control device according to claim 3, wherein, when described control circuit judges that the described byte enable attribute of described treating apparatus compatibility belongs to described complicated byte enable form, and originally tendency to develop send be described complicated byte enable form time, then produce there is described complicated byte enable form described byte enable signal to described treating apparatus.
5. control device according to claim 3, wherein, when described control circuit judges that the described byte enable attribute of described treating apparatus compatibility belongs to described simplification byte enable form, and originally tendency to develop send be described simplification byte enable form time, then produce there is described simplification byte enable form described byte enable signal to described treating apparatus.
6. control device according to claim 3, wherein, when described control circuit judges that the described byte enable attribute of described treating apparatus compatibility belongs to described complicated byte enable form, and originally tendency to develop send be described simplification byte enable form time, then produce there is described simplification byte enable form described byte enable signal to described treating apparatus.
7. control device according to claim 3, wherein, when described control circuit judges that the described byte enable attribute of described treating apparatus compatibility belongs to described simplification byte enable form, and originally tendency to develop send be described complicated byte enable form time, then produce according to described complicated byte enable form there is described simplification byte enable form multiple byte enable signals to described treating apparatus.
8. control device according to claim 7, wherein, described control circuit exports described multiple byte enable signals with described simplification byte enable form respectively at different time points.
9. a data communication system, includes:
One bus;
One treating apparatus, is coupled to described bus; And
One control device, be coupled to described bus, wherein, described control device comprises a storage unit and is coupled to the control circuit of described storage unit, described storage unit is used for the byte enable attribute table of comparisons of byte enable attribute that the address realm of at least one described treating apparatus of store recording and address realm map, the address realm that described control circuit distributes for utilizing at least one described treating apparatus, the described byte enable attribute of described treating apparatus compatibility is read from the described byte enable attribute table of comparisons, when described control device judges that the described byte enable attribute of described treating apparatus compatibility belongs to one first byte enable form, and originally tendency to develop send be one second byte enable form time, described control device produces multiple byte enable signals extremely described bus with described first byte enable form according to described second byte enable form, described multiple byte enable signal is sent to described treating apparatus by described bus, wherein, described second byte enable form is different from described first byte enable form.
10. data communication system according to claim 9, wherein, described multiple byte enable signals with described first byte enable form are sent to described bus at different time points by described control device respectively.
11. 1 kinds of control methods, include:
Utilize a storage unit to carry out the byte enable attribute table of comparisons of the byte enable attribute that the address realm of at least one treating apparatus of store recording and address realm map, described byte enable attribute is the first byte enable form or the second byte enable form being different from described first byte enable form; And
Utilize the address realm that described at least one treating apparatus distributes, the described byte enable attribute of described treating apparatus compatibility is read from the described byte enable attribute table of comparisons, when judging that the described byte enable attribute of described treating apparatus compatibility is described first byte enable form, and originally tendency to develop send be described second byte enable form time, produce according to described second byte enable form there is described first byte enable form multiple byte enable signals to described treating apparatus.
12. control methods according to claim 11, wherein, described byte enable attribute kit contains a complicated byte enable form and and simplifies byte enable form.
13. control methods according to claim 12, wherein, when the described byte enable attribute of described treating apparatus compatibility belongs to described complicated byte enable form, and originally tendency to develop send be described complicated byte enable form time, then produce described byte enable signal to the step of described treating apparatus according to the described byte enable attribute of described treating apparatus and include:
Produce the described byte enable signal extremely described treating apparatus with described complicated byte enable form.
14. control methods according to claim 12, wherein, when the described byte enable attribute of described treating apparatus compatibility belongs to described simplification byte enable form, and originally tendency to develop send be described simplification byte enable form time, then produce described byte enable signal to the step of described treating apparatus according to the described byte enable attribute of described treating apparatus and include:
Produce the described byte enable signal extremely described treating apparatus with described simplification byte enable form.
15. control methods according to claim 12, wherein, when the described byte enable attribute of described treating apparatus compatibility belongs to described complicated byte enable form, and originally tendency to develop send be described simplification byte enable form time, then produce described byte enable signal to the step of described treating apparatus according to the described byte enable attribute of described treating apparatus and include:
Produce the described byte enable signal extremely described treating apparatus with described simplification byte enable form.
16. control methods according to claim 12, wherein, when the described byte enable attribute of described treating apparatus compatibility belongs to described simplification byte enable form, and originally tendency to develop send be described complicated byte enable form time, then produce described byte enable signal to the step of described treating apparatus according to the described byte enable attribute of described treating apparatus and include:
Multiple byte enable signals extremely described treating apparatus with described simplification byte enable form is produced according to described complicated byte enable form.
17. control methods according to claim 16, wherein, produce the multiple byte enable signals with described simplification byte enable form to the step of described treating apparatus according to described complicated byte enable form and also include:
Described multiple byte enable signals with described simplification byte enable form are exported respectively at different time points.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6233632B1 (en) * | 1999-01-07 | 2001-05-15 | Vlsi Technology, Inc. | Optimizing peripheral component interconnect transactions in a mixed 32/64-bit environment by eliminating unnecessary data transfers |
| US7000045B2 (en) * | 2002-08-28 | 2006-02-14 | Lsi Logic Corporation | Byte-enabled transfer for a data bus having fixed-byte data transfer |
| CN1819554A (en) * | 2005-02-03 | 2006-08-16 | 三星电子株式会社 | Data processing system and data interfacing method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6233632B1 (en) * | 1999-01-07 | 2001-05-15 | Vlsi Technology, Inc. | Optimizing peripheral component interconnect transactions in a mixed 32/64-bit environment by eliminating unnecessary data transfers |
| US7000045B2 (en) * | 2002-08-28 | 2006-02-14 | Lsi Logic Corporation | Byte-enabled transfer for a data bus having fixed-byte data transfer |
| CN1819554A (en) * | 2005-02-03 | 2006-08-16 | 三星电子株式会社 | Data processing system and data interfacing method thereof |
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