CN102331919A - Maximum complete subgraph-based embedded system register allocation method - Google Patents

Maximum complete subgraph-based embedded system register allocation method Download PDF

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CN102331919A
CN102331919A CN201110268061A CN201110268061A CN102331919A CN 102331919 A CN102331919 A CN 102331919A CN 201110268061 A CN201110268061 A CN 201110268061A CN 201110268061 A CN201110268061 A CN 201110268061A CN 102331919 A CN102331919 A CN 102331919A
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register
node
individual
offspring
ind
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CN102331919B (en
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吴建设
焦李成
畅志艳
陈为胜
钟桦
王爽
侯彪
吴家骥
公茂果
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Xidian University
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Abstract

The invention provides a maximum complete subgraph-based embedded system register allocation method, which mainly solves the problems that a heuristic algorithm has poor allocation effect and overflow cost is too high due to no consideration of the overflow cost in a crossover operator part in an evolutionary algorithm. The method is implemented by the following steps of: (1) taking a complement from an intermediate variable mutual interference graph to obtain the complement G; (2) randomly dividing all nodes into two classes, respectively putting the nodes into a set A or a set B, and completing initialization of population; (3) crossing an individual in the population by using an overflow cost-based maximum complete subgraph crossover operator SC-MCX to generate a subgeneration individual; and (4) optimizing the subgeneration individual by using a local search operator LSP, replacing an individual having the maximum fitness function value in parent individuals by using the optimized subgeneration individual, and continuously participating in population evolution. By the method, the population evolution speed is improved, the overflow cost and the overflow variable number of the individual are reduced, and the method can be used for embedded system register allocation.

Description

Embedded system register allocation method based on maximum complete subgraph
Technical field
The invention belongs to field of computer technology, relate to embedded system, particularly a kind of embedded system register allocation method based on maximum complete subgraph; This method is used for the embedded system its registers; Can be efficiently with the intermediate variable that produces in the program compilation process, as much as possible depositing in the register overflowed cost and overflowed the variable number thereby reduce; Improve the utilization factor of register, and then improve the compile efficiency of program in the embedded system.
Background technology
In embedded system, program normally for realizing what certain fixing function was write, so require written program after compiling, can produce high-quality code, has higher execution efficient.Storer and register all are used to the intermediate variable that produces in the stored routine compilation process.With respect to storer, what the access speed of register will be fast is many, but quantity seldom.In the program compilation process, if register can not be stored all intermediate variables, will be saved in the storer by some intermediate variable so, this situation is called overflows.The embedded system time that the access intermediate variable is spent from storer is referred to as the cost of overflowing of this intermediate variable.Therefore, can program obtain high-quality code and depend on to a great extent and more intermediate variable is saved in the register after through compiling, with the number that intermediate variable is overflowed in minimizing, and the assignment problem of Here it is embedded system register.
Up to the present; Most of its registers problems all are that modeling becomes the graph coloring model and describes; The embedded system register allocation algorithm based on the graph coloring model early is the optimization graph coloring heuritic approach OCH that is proposed by people such as Briggs; Designing simply relatively, is a kind of improvement of graph coloring heuritic approach that chaitin is proposed, and distribution effects is relatively poor.A lot of afterwards scholars are devoted to solve embedded system its registers problem with HYBRID EVOLUTIONARY ALGORITHMS HEA; Make full use of the thought of genetic algorithm; At first population is carried out initialization; Utilize crossover operator from two parents, to produce a new its registers scheme then; To filial generation, crossover operator commonly used has greediness to cut apart crossover operator GPX and exempts to conflict crossover operator CFPX with its heredity, thus at last through Local Search LSP let adjust between the register of variable in single individuality reduce this individuality total overflow cost Spill Cost.Write down the optimum individual that produces in the iterative process each time, and then obtain final optimum individual, also just obtained its registers way.In two crossover operators mentioning in the above; Just simple from parent, the selection of GPX comprises the maximum register heredity of intermediate variable in filial generation; Do not consider the conflict relationship between the intermediate variable that this register stores, do not make corresponding adjustment yet.Though be superior to GPX in the CFPX design; Taken into full account the conflict relationship between the intermediate variable that heritable register stores; But it has only considered the number of intermediate variable, does not consider the cost of overflowing of each variable, so can not be called a perfect crossover operator; Its registers scheme that obtains still has more intermediate variable to be spilt in the storer, has reduced the efficient of its registers.
Summary of the invention
The objective of the invention is to overcome the deficiency of above-mentioned prior art; A kind of embedded system register allocation method based on maximum complete subgraph has been proposed; With with the intermediate variable that produces in the program compilation process; As much as possible depositing in the register reduced and overflowed cost and overflow the variable number, improves its registers efficient.
For realizing above-mentioned purpose, technical scheme of the present invention comprises the steps:
(1) initialization population step
The mutual interference figure H of the intermediate variable that 1a) produces in the drawing program compilation process; In interference figure H; Each node is represented an intermediate variable; Two node phases mutual interference that each bar limit is connected, and provide the cost of overflowing of each intermediate variable, overflowing cost is the embedded system time that the access intermediate variable is spent from storer;
1b) the complement G={N of the mutual interference figure H of taking-up, S, V, E}, wherein, N represents the intermediate variable sum, and S represents register quantity, and each register is used R i, i=1 ... S representes that V represents the nodal set of all intermediate variables; Node is labeled as 0,1,2 respectively; ..., N-1, E represent the set of all nonoriented edges; In complement G, two nodes that each bar limit is connected are placed in the same register, make to overflow cost and to overflow the variable number as much as possible little;
1c) with N node among the nodal set V of intermediate variable at random be divided into two types, represent with A and B respectively;
1d) draw the syntople G between all nodes in the set A according to complement G A=(V A, E A) V wherein A=A,
Figure BDA0000090474400000021
For V AIn two node v arbitrarily i, v j, work as v iAnd v jIn the time of being placed in the same register, with v iWith v jLink to each other;
1e) seek adjacent map G AA maximum complete subgraph, with the node v that comprises in this maximum complete subgraph kPut into the minimum dummy register of subscript;
1f) from G AIn deletion step 1e) put into the node v of register k, obtain G ASubgraph G after the renewal A';
1g) to subgraph G A' repeating step 1e)-1f) till S register all is used, then with subgraph G ANode in ' middle residue node and the set B is put in the register according to the minimum principle of conflict;
1h) given population scale is M, and M is set at any even number, with step 1c)-1g) repeat M time to produce the M individuals, use Ind respectively i, i=1...M representes each individuality, accomplishes the initialization of population;
(2) use crossover operator to produce a new offspring individual step
2a) use based on the maximum complete subgraph crossover operator SC-MCX that overflows cost the individual Ind in the population pAnd Ind P+1Intersect and produce a new offspring individual, use offspring pExpression, p=1 wherein, 3,5 ... and p<M;
2b) draw two parent individualities according to complement G Ind p = { R 1 p , . . . , R S p } With Ind p + 1 = { R 1 p + 1 , . . . , R S p + 1 } In the syntople figure that constitutes of node that each register comprised, use respectively
Figure BDA0000090474400000033
With
Figure BDA0000090474400000034
Expression;
2c) find out the maximum complete subgraph of each syntople figure, use respectively
Figure BDA0000090474400000035
With
Figure BDA0000090474400000036
Expression is therefrom selected and is overflowed the maximum maximum complete subgraph of cost Wherein t ∈ p, p+1}, l ∈ 1 ..., S}, will
Figure BDA0000090474400000038
The node that comprises takes the lead in putting into offspring individual Offspring p = { R 1 Os , . . . R S Os } First register
Figure BDA00000904744000000310
In;
2d) from all nodes, choose with
Figure BDA00000904744000000311
The middle not afoul node of node is put into register In, accomplish the individual offspring of filial generation pFirst register
Figure BDA00000904744000000313
Structure, and will put into register In node from two all registers that parent comprised, delete;
2e) repeating step 2b)-2c) successively constructor for offspring pIn remaining register;
2f) with remaining node in the parent individuality, put into the filial generation relevant register successively according to the minimum principle of conflict, accomplish the individual Ind of parent pAnd Ind P+1Intersection, produce offspring individual offspring p
(3) optimize the offspring individual step with Local Search operator LSP
3a) to step 2f) middle each offspring individual offspring that produces p, adopt Local Search operator LSP to be optimized, replace individual Ind in the population with the individuality after optimizing pAnd Ind P+1Maximum one of fitness function value continues to participate in population and evolves;
3b) setting iterations is K, to step 2a)-3a) repeat K time, just can all nodes be assigned in the register efficiently, reach and overflow cost and overflow variable number minimum.
The present invention has the following advantages:
1) the present invention is because in the initialization of population process; Introduced the thought of complement and maximum complete subgraph; Each individuality that make to produce is preliminary has obtained a reasonable its registers scheme, has accelerated the population evolutionary rate, has improved its registers efficient.
2) crossover operator of the present invention has been considered to overflow the cost factor in two parent intersection processes owing to adopted based on the maximum complete subgraph crossover operator that overflows cost fully, has reduced total the overflowing cost and overflow the variable number of offspring individual.
Description of drawings
Fig. 1 is a process flow diagram of the present invention;
Fig. 2 is the mutual interference figure of instantiation intermediate variable of the present invention;
Fig. 3 is the complement G of the mutual interference figure of instantiation intermediate variable of the present invention;
Fig. 4 obtains the syntople figure G between all nodes in the set A according to complement G A
Fig. 5 is syntople figure G ARenewal figure G A';
Fig. 6 draws the individual Ind of two parents according to complement G pAnd Ind P+1In the syntople figure that constitutes of node that each register comprised;
Fig. 7 is the individual Ind of two parents pAnd Ind P+1Intersect and produce filial generation offspring pThe operation chart of first register node.
Embodiment
With reference to accompanying drawing 1, the concrete performing step of the present invention is described below:
Step 1. pair evolution population carries out initialization.
The mutual interference figure of this instance intermediate variable is as shown in Figure 2, and node 0-9 represents ten intermediate variables among the figure, and the intermediate variable of two node representatives of each bar limit connection can not be placed in the same register.When the intermediate variable that table 1 has provided each node representative was spilt into storer, what consumed overflowed cost.The mutual interference figure of intermediate variable shown in Figure 2 is got complement, obtain complement G, as shown in Figure 3.Any two of G have the intermediate variable of the continuous node representative in limit can be placed in the same register among Fig. 3.Set-up register quantity S is 4, and initialization produces a population individuality Ind i = { R 1 i , . . . , R 4 i } .
Each node of table 1 is consumed when spilling into storer overflows cost list
Node 0 1 2 3 4 5 6 7 8 9
Overflow cost 2 2 1 3 1 3 1 4 3 4
1.1) with ten nodes at random be divided into two types, be mapped to respectively in set A or the set B, it still is that the probability of set B equates that any node is placed into set A, supposes A={0; 5,6,8,9}; B={1,2,3; 4,7} obtains the syntople figure G between all nodes in the set A according to complement G A, as shown in Figure 4;
1.2) find G AA maximum complete subgraph { 5,8} puts it in the minimum dummy register of subscript, promptly R 1 i = { 5,8 } ;
1.3) from G ARegister has been put in middle deletion
Figure BDA0000090474400000053
In node 5 and 8, obtain G ARenewal figure G A', as shown in Figure 5;
1.4) repeated execution of steps 1.2) and 1.3) up to G AIn till all nodes all put into register or all registers and all are used, last, obtain R 1 i = { 5,8 } , R 2 i = { 0,6 } , R 3 i = { 9 } ;
1.5) with the node in the set B according to the conflict minimum principle put into register successively, for example node 1 respectively with register With
Figure BDA0000090474400000058
In node 8 and node 0 conflict, but with In node 9 do not conflict, therefore node 1 is put into register In, obtain
Figure BDA00000904744000000511
In this way successively with node 2,3,4,7 obtain after putting into register: R 1 i = { 5,8,4 } , R 2 i = { 0,6,2 } , R 3 i = { 9,1,3 } , R 4 i = { 7 } ;
1.6) set population scale M=2, repeat step 1.1 twice)-1.5) produce two individuals, accomplish the initialization of population.
Step 2. intersection produces a new offspring individual.
Employing based on the maximum complete subgraph crossover operator SC-MCX that overflows cost to individuality Ind p = { R 1 p , . . . , R 4 p } With Ind p + 1 = { R 1 p + 1 , . . . , R 4 p + 1 } Intersect and produce a new offspring individual, usefulness Offspring p = { R 1 Os , . . . R 4 Os } Expression, p=1 wherein, 3,5 ... and p<M.
2.1) individual Ind pAnd Ind P+1Be initialized as respectively by population:
Ind p={{6},{9,5,3,},{7,2,1,},{0,8,4}}
Ind p+1={{6,3},{9,8},{7,2,1,4},{0,5}};
2.2) draw the individual Ind of two parents according to complement G pAnd Ind P+1In the syntople figure that constitutes by the node that each register comprised, use respectively With
Figure BDA0000090474400000062
Expression, as shown in Figure 6;
2.3) find out the maximum complete subgraph of each syntople figure, obtain MC 1 p = { 6 } , MC 2 p = { 9,5 } , MC 3 p = { 2,1 } , MC 4 p = { 0,8,4 } With MC 1 p + 1 = { 3 } , MC 2 p + 1 = { 9 } , MC 3 p + 1 = { 2,1,4 } , MC 4 p + 1 = { 5 } , Therefrom select and overflow the maximum maximum complete subgraph of cost MC 2 p = { 9,5 } , And will
Figure BDA00000904744000000612
The node that comprises takes the lead in putting into offspring individual offspring pIn first register
Figure BDA00000904744000000613
In, at this moment promptly R 1 Os = { 9,5 } ;
2.4) from all the other all nodes, choose the node that does not all conflict with node 9 and 5; Put into
Figure BDA00000904744000000615
; Obtain
Figure BDA00000904744000000616
and accomplished structure to this, referring to shown in Figure 7 individual first register of filial generation
Figure BDA00000904744000000617
;
2.5) at the individual Ind of parent pAnd Ind P+1Offspring individual offspring has been put in middle deletion pFirst register
Figure BDA00000904744000000618
In node 9,5 and 7;
2.6) repeated execution of steps 2.2)-2.5), construct offspring individual offspring successively pIn remaining register;
2.7) with failing to be assigned to the node in the filial generation register in the parent individuality, put into offspring individual offspring successively according to the minimum principle of conflict pRegister in, obtain offspring individual offspring pFor:
offspring p={{9,5,7},{0,8,4,2},{3,1},{6}}。
Step 3 is optimized offspring individual with Local Search operator LSP.
Offspring individual offspring to step 2 generation pUse Local Search operator LSP to be optimized; With the maximum individuality of fitness function value in the offspring individual replacement parent individuality after optimizing; Continue to participate in population and evolve, the detailed process that is optimized with local optimum operator LSP is seen " the Solving the register allocator with evolutionary algorithm from embedded system " of Topcuoglu.
Effect of the present invention can further specify through following experiment:
1. simulated conditions:
At CPU is to carry out emulation with the C++ program in AMD Athlon (tm) II * 2245, dominant frequency 2.91GHZ, internal memory 2G, the WINDOWS XP system.
2. emulation content:
At experimental section, in order better to embody advantage of the present invention, the present invention is compared with HYBRID EVOLUTIONARY ALGORITHMS based on the crossover operator CFPX that exempts to conflict.The mutual interference figure of intermediate variable with producing at random experimentizes, and establishing nodal point number is n, introduces limit density α, register density β with overflow three notions of cost density γ.The quantity that the limit density meter is shown at random limit in the mutual interference figure of intermediate variable that produces is α * (n * (n-1))/2; Register density representes that register quantity is β * n, overflows cost density and representes that the cost of overflowing of any intermediate variable gets the arbitrary integer between [1...2 γ].Regulation n equals 100,300 respectively in the experiment, and α is value 0.10,0.25,0.45,0.60,0.75,0.90 respectively, and β is value 0.04,0.08,0.10,0.15,0.20 respectively, and γ equals 5.These four values of parameters are carried out combination in any; Each situation produces 30 width of cloth Random Graph and experimentizes; Corresponding five the register density of each limit density; To carry out quantity statistics as shown in table 2 to the cost of overflowing of 150 simulation results of 30 width of cloth interference figures for experimental result like this, and experiment is as shown in table 3 with the mean value statistics of overflowing variable number to overflowing cost:
150 groups of data of table 2 are overflowed the fine or not distribution table of cost
Figure BDA0000090474400000071
No matter can find out from the data of table 2, be 100 still to be 300 figure for nodal point number, and the present invention is all good than the result that the evolution algorithm based on the CFPX crossover operator obtains.Work as n=100, α=0.90 o'clock, the present invention has 49 width of cloth to be better than CFPX.Work as n=300, α=0.90 o'clock, the present invention has 102 width of cloth to be better than CFPX, and other situation are also similar.Explanation is along with the advantage of this invention of increase of nodal point number can be more and more obvious.
150 groups of data of table 3 are overflowed cost and are overflowed the mean value of variable number
Figure BDA0000090474400000081
Table 3 has contrasted two kinds of algorithms from measuring, and works as n=100, α=0.90 o'clock, and the present invention is only than having reduced by 0.742 based on the evolution algorithm of the crossover operator CFPX that exempts to conflict on the cost overflowing.And work as n=300, and α=0.90 o'clock, the present invention has reduced by 6.12 than CFPX overflowing on the cost.Confirmed the conclusion that table 2 draws more: along with the increase of nodal point number, advantage of the present invention is more and more obvious.Other situation are similar; More than analyze and prove absolutely that the present invention is better than the evolution algorithm based on CFPX, can more efficiently the intermediate variable that produces in the program compilation process be kept in the register, minimizing is overflowed; The compile efficiency of raising program obtains the code of better quality.
Above-mentioned embodiment only is an instance of the present invention, does not constitute any restriction of the present invention, can also be directed against the different nodes number like us, and different limit density and register density use the present invention to carry out its registers.

Claims (4)

1. embedded system register allocation method based on the operation of maximum complete subgraph comprises:
(1) initialization population step
The mutual interference figure H of the intermediate variable that 1a) produces in the drawing program compilation process; In interference figure H; Each node is represented an intermediate variable; Two node phases mutual interference that each bar limit is connected, and provide the cost of overflowing of each intermediate variable, overflowing cost is the embedded system time that the access intermediate variable is spent from storer;
1b) the complement G={N of the mutual interference figure H of taking-up, S, V, E}, wherein, N represents the intermediate variable sum, and S represents register quantity, and each register is used R i, i=1 ... S representes that V represents the nodal set of all intermediate variables; Node is labeled as 0,1,2 respectively; ..., N-1, E represent the set of all nonoriented edges; In complement G, two nodes that each bar limit is connected are placed in the same register, make to overflow cost and to overflow the variable number as much as possible little;
1c) with N node among the nodal set V of intermediate variable at random be divided into two types, represent with A and B respectively;
1d) draw the syntople figure G between all nodes in the set A according to complement G A=(V A, E A), V wherein A=A,
Figure FDA0000090474390000011
For V AIn two node v arbitrarily i, v j, work as v iAnd v jIn the time of being placed in the same register, with v iWith v jLink to each other;
1e) seek adjacent map G AA maximum complete subgraph, with the node v that comprises in this maximum complete subgraph kPut into the minimum dummy register of subscript;
1f) from G AIn deletion step 1e) put into the node v of register k, obtain G ASubgraph G after the renewal A';
1g) to subgraph G A' repeating step 1e)-1f) till S register all is used, then with subgraph G ANode in ' middle residue node and the set B is put in the register according to the minimum principle of conflict;
1h) given population scale is M, and M is set at any even number, with step 1c)-1g) repeat M time to produce the M individuals, use Ind respectively i, i=1...M representes each individuality, accomplishes the initialization of population;
(2) use crossover operator to produce a new offspring individual step
2a) use based on the maximum complete subgraph crossover operator SC-MCX that overflows cost the individual Ind in the population pAnd Ind P+1Intersect and produce a new offspring individual, use offspring pExpression, p=1 wherein, 3,5 ... and p<M;
2b) draw two parent individualities according to complement G Ind p = { R 1 p , . . . , R S p } With Ind p + 1 = { R 1 p + 1 , . . . , R S p + 1 } In the syntople figure that constitutes of node that each register comprised, use respectively With
Figure FDA0000090474390000024
Expression;
2c) find out the maximum complete subgraph of each syntople figure, use respectively
Figure FDA0000090474390000025
With
Figure FDA0000090474390000026
Expression is therefrom selected and is overflowed the maximum maximum complete subgraph of cost Wherein t ∈ p, p+1}, l ∈ 1 ..., S}, will
Figure FDA0000090474390000028
The node that comprises takes the lead in putting into offspring individual Offspring p = { R 1 Os , . . . R S Os } First register
Figure FDA00000904743900000210
In;
2d) from all nodes, choose with
Figure FDA00000904743900000211
The middle not afoul node of node is put into register
Figure FDA00000904743900000212
In, accomplish the individual offspring of filial generation pFirst register
Figure FDA00000904743900000213
Structure, and will put into register
Figure FDA00000904743900000214
In node from two all registers that parent comprised, delete;
2e) repeating step 2b)-2c) successively constructor for offspring pIn remaining register;
2f) with remaining node in the parent individuality, put into the filial generation relevant register successively according to the minimum principle of conflict, accomplish the individual Ind of parent pAnd Ind P+1Intersection, produce offspring individual offspring p
(3) optimize the offspring individual step with Local Search operator LSP
3a) to step 2f) middle each offspring individual offspring that produces p, adopt Local Search operator LSP to be optimized, replace individual Ind in the population with the individuality after optimizing pAnd Ind P+1Maximum one of fitness function value continues to participate in population and evolves;
3b) setting iterations is K, to step 2a)-3a) repeat K time, just can all nodes be assigned in the register efficiently, reach and overflow cost and overflow variable number minimum.
2. according to the register allocation method described in claims 1; Step 1b wherein) complement of the mutual interference figure H of described taking-up; The network topology structure that is meant node among the mutual interference figure H of maintenance is constant; With original fillet deletion between the every pair of node among the interference figure H, add non-existent fillet among the interference figure H, just obtain the complement of interference figure H.
3. according to the register allocation method described in claims 1, wherein step 1g) described in subgraph G ANode in ' middle residue node and the set B is put in the register according to the minimum principle of conflict, is meant for node w ∈ B arbitrarily, finds a register R j, wherein j ∈ { 1 ... S} makes register R jIn in interference figure H, have the number of the node that the limit is connected minimum with node w.
4. according to the register allocation method described in claims 1, wherein step 3a) described in Local Search operator LSP, the operator that adopts Topcuoglu in HYBRID EVOLUTIONARY ALGORITHMS, to provide.
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CN102902570A (en) * 2012-09-11 2013-01-30 西安电子科技大学 Embedded system register distribution method based on oscillator phase synchronization
CN113535375A (en) * 2020-04-16 2021-10-22 中标软件有限公司 Optimized allocation method of registers

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CN101330417A (en) * 2008-07-24 2008-12-24 安徽大学 Quotient space overlay model for calculating network shortest path and building method thereof
CN101799839A (en) * 2010-01-19 2010-08-11 浙江工业大学 Method for establishing public traffic network model with controllable network diameter based on random overlapping faction and public traffic network model
CN102033773A (en) * 2010-11-12 2011-04-27 西安电子科技大学 Method for distributing register in embedded system based on inverse image description

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CN101330417A (en) * 2008-07-24 2008-12-24 安徽大学 Quotient space overlay model for calculating network shortest path and building method thereof
CN101799839A (en) * 2010-01-19 2010-08-11 浙江工业大学 Method for establishing public traffic network model with controllable network diameter based on random overlapping faction and public traffic network model
CN102033773A (en) * 2010-11-12 2011-04-27 西安电子科技大学 Method for distributing register in embedded system based on inverse image description

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102902570A (en) * 2012-09-11 2013-01-30 西安电子科技大学 Embedded system register distribution method based on oscillator phase synchronization
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