CN102033773B - Method for distributing register in embedded system based on inverse image description - Google Patents

Method for distributing register in embedded system based on inverse image description Download PDF

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CN102033773B
CN102033773B CN 201010540675 CN201010540675A CN102033773B CN 102033773 B CN102033773 B CN 102033773B CN 201010540675 CN201010540675 CN 201010540675 CN 201010540675 A CN201010540675 A CN 201010540675A CN 102033773 B CN102033773 B CN 102033773B
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register
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吴建设
焦李成
畅志艳
尚荣华
缑水平
陈为胜
李阳阳
于昕
戚玉涛
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Xidian University
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Abstract

The invention provides a method for distributing a register in an embedded system based on an inverse image description, which mainly solves the problems that the conventional heuristic algorithm requires short time for distributing the register but has poor distributing effect, while a hybrid evolutionary algorithm has the good distributing effect but requires overlong time. The method comprises the following steps of: (1) taking an inverse image from a mutual interference figure of an intermediate variable to obtain an inverse figure model G; (2) distributing all nodes in the inverse figure model to a temporary register; and (3) optimizing the obtained register distribution result by using local search technology, namely a local search platform (LSP). The method has the advantages of introducing inverse figure operation, complete dividing figure operation and maximum complete sub-figure operation, utilizing the relevant knowledge of a graph theory fully, acquiring a very good method for distributing the register in the embedded system within a short time, increasing the program compilation efficiency of the embedded system, along with more actual application value.

Description

Embedded system register allocation method based on anti-figure description
Technical field
The invention belongs to field of computer technology, relate to embedded system, a kind of distribution method of embedded system register particularly, can be used for solving register negligible amounts in embedded system, intermediate variable conflicts under the more situation mutually, can in the short period of time intermediate variable be stored in the register, improve program compilation efficient.
Background technology
In embedded system, along with the requirement of stability and complicacy is more and more higher, the scale of the program that needs is also increasing.No matter be aspect cost or later maintenance for realizing with a kind of function, with software engineering always than with desirable many of hardware technology.So the technology based on software in the embedded system just has been subjected to very big welcome.But because memory capacity is limited in the embedded system, therefore, faces than the compiler on high terminal at the compiler on the embedded system and more to many problem.Want greatly to improve executing efficiency in the embedded system, a crucial step is exactly to mix at the register branch program implementation performance is optimized, so-called register distribution is assigned to the intermediate variable of program in the available register with regard to referring to, because register limited amount, can not be assigned to the variable in the register so, to have to spend more time and be saved in the external storage, thereby influence executing efficiency.How a register allocation algorithm is efficiently proposed, can improve embedded system in the short period of time fully to the utilization factor of register, reduce thisly owing to intermediate variable being forced to spill into the influence that brings in the external storage, be that a lot of scholars make great efforts and the direction of research always.Up to the present, existing embedded system register allocation algorithm, as HYBRID EVOLUTIONARY ALGORITHMS HEA, utilize the thought of genetic algorithm, after to the population scale initialization, by the crossover operator CFPX that exempts to conflict the variable in each register is not conflicted, allow adjust between the register of variable in single individuality and reduce total individual cost of overflowing thereby search technology LSP by this locality then.At any time record the optimum individual that produces in the iterative process each time, and then obtain final optimum individual, also just obtained register and distributed way.But because evolution algorithm carries out colony's search, in search procedure, introduce hereditary computing, colony can constantly be evolved.So speed is very slow, obtaining optimum register distribution way needs a large amount of time.And optimization graph coloring heuritic approach OCH early design simply relatively, is a kind of improvement to the graph coloring heuritic approach, and the time spent, seldom but the effect of register distribution also differed greatly with HEA.Its concrete operations flow process as shown in Figure 1, wherein critical step is to simplify and select.At first to set up an empty stack in the simplification process, repeat following two steps all nodes in figure then and all be assigned to till the register.
(1) if there is a node l iDegree
Figure BDA0000032020790000021
K is the quantity of register.So just from figure, delete l iWith with its all limit as an end points, and with l iDeposit in and distribute register in the stack.
(2) otherwise, select a node l iOverflow, from figure, delete l iWith with its all limit as an end points, and with l iOverflow.
Select after finishing the simplification process, from stack, withdraw from node variable successively, distribute the register different with its adjacent node to node.These two methods respectively have superiority, but go to consider from the embedded system register assignment problem of reality, because HEA needs a large amount of time, so the practical application meaning is not very big, though the OCH time spent is considerably less, the effect extreme difference does not reach the purpose of practical application yet.
Summary of the invention
The objective of the invention is to overcome above the deficiencies in the prior art, a kind of embedded system register allocation method of describing based on anti-figure is proposed, to reduce the time that register distributes in the compilation process, reduce overflowing cost and overflowing number of intermediate variable, thereby improve the service efficiency of register, reach the purpose of practical application.
Realize that the object of the invention technical scheme is: embedded system register assignment problem is at first described with map colouring problem; And then convert thereof into anti-graph model G, and in anti-graph model G, representing an intermediate variable with each node among the figure, two intermediate variables that each bar limit connects can be placed in the same register; Finally to be assigned to the N that represents an intermediate variable node in M the register, so that the intermediate variable number and the cost that spill in the external storage are as much as possible little.Concrete steps comprise as follows:
(1) draws out the mutual interference figure H of intermediate variable that embedded system produces in the program compilation process, and provide the cost of overflowing of each intermediate variable;
(2) the mutual interference figure H of middle variable is carried out anti-graphic operation, obtain anti-graph model and be: G={N, M, V, E, S}, wherein N represents the intermediate variable sum, the register quantity that the M representative is given, V represents the set of node of all intermediate variables, and node is labeled as 0 respectively, 1,2...N-1 E represents the set of all nonoriented edges, S represents the set that all intermediate variables overflow cost;
(3) M that embedded system an is given register is designated as R respectively 1, R 2..., R M, and be set with infinite a plurality of temporary register, be designated as TR respectively 1, TR 2..., TR f...;
(4) in anti-graph model G, point centered by each node in scheming G respectively, judge whether all subgraphs that have the node that is connected and limit thereof to constitute of this central point and its are complete graph, if then being defined as it, complete graph cuts apart figure fully, if cutting apart figure fully, this has and has only one, then select the empty temporary register of subscript minimum, the node of cutting apart fully among the figure is put into wherein, directly execution in step (5); If to cut apart figure fully not unique for this, then select to overflow and comprise maximum one of node number cutting apart fully of cost maximum among the figure and cut apart figure fully, its node is put into the empty temporary register of subscript minimum, directly execution in step (5); If do not exist among the anti-graph model G and cut apart figure fully, then directly anti-graph model G is regarded as one and do not comprise the subgraph G ' of cutting apart figure fully, redirect execution in step (6);
(5) deletion has been put into and has cut apart figure fully in the temporary register in anti-graph model G, and repeating step (4)~(5) do not comprise the subgraph G ' of cutting apart figure fully up to obtaining one;
(6) in not comprising the subgraph G ' of cutting apart figure fully, respectively to scheme among the G ' each node as central point, all have the subgraph P that the node that is connected and limit thereof constitute at each central point and its iIn, seek P iIn overflow the maximum complete subgraph F of cost maximum iFrom F iIn select to overflow in the maximum complete subgraph of cost maximum and comprise a maximum maximum complete subgraph F of node Max, with F MaxPut into the empty temporary register of subscript minimum, wherein i gets the node that comprises among the G ' successively;
(7) at the middle deletion F of G ' Max, obtain the renewal figure G of G ' ", " operation of repeating step (4)~(7) is all put into temporary register TR up to all nodes to G jIn, j=1...L wherein, L is for distributing the quantity of the required temporary register of all nodes fully;
(8) with temporary register TR j(j=1...L) node variable in stores embedded system register R into k(k=1...M) in; If L≤M, overflowing the variable number is zero, and overflowing cost is zero, then distributes and finishes; If L>M then has intermediate variable and spills in the external storage, according to the minimum principle of the conflict among the HYBRID EVOLUTIONARY ALGORITHMS HEA, with temporary register TR j(j=M+1...L) intermediate variable in is also put into embedded system register R k(k=1...M) in, and use local search technology LSP method that it is optimized, distribute and finish.The present invention has following advantage:
1) the present invention is owing to introduced anti-graphic operation, it is clearer and more definite to make that mutual relationship between the intermediate variable becomes, and utilizes the relevant knowledge of graph theory fully, compares traditional heuritic approach, the present invention has reduced overflowing cost and overflowing number of intermediate variable, has improved the effect that register distributes.
2) cut apart graphic operation and the operation of maximum complete subgraph fully owing to having introduced among the present invention, can disposable not conflicting nodes as much as possible be put in the same register, compare HYBRID EVOLUTIONARY ALGORITHMS, because the present invention can disposablely assign node, distribute the time so saved register, improved program compilation efficient, for application of practical project provide an embedded system register allocation algorithm preferably.
Description of drawings
Fig. 1 is the existing process flow diagram of optimizing graph coloring heuritic approach OCH;
Fig. 2 is process flow diagram of the present invention;
Fig. 3 is the mutual interference figure of instantiation intermediate variable of the present invention;
Fig. 4 is the anti-figure of the mutual interference figure of instantiation intermediate variable of the present invention;
Fig. 5 be instantiation of the present invention obtain to put into temporary register cut apart figure fully;
Fig. 6 is the renewal figure of the anti-figure of instantiation of the present invention;
Fig. 7 is instantiation of the present invention point centered by each node in renewal figure, all subgraphs that have the node that is connected and limit thereof to constitute of each central point and its;
Fig. 8 is the maximum complete subgraph in each subgraph of instantiation of the present invention;
Fig. 9 is the maximum complete subgraph that will put into temporary register that instantiation of the present invention obtains;
Figure 10 is that instantiation of the present invention is through the renewal figure of the anti-figure of the back mutual interference figure of intermediate variable that circulates for the first time.
Embodiment
With reference to accompanying drawing 2 concrete steps of the present invention, be described below in conjunction with an instantiation:
Step 1. is set up anti-graph model G according to the mutual interference figure of intermediate variable.
The mutual interference figure of this example intermediate variable as shown in Figure 3, node 0-9 among the figure has represented ten intermediate variables, and it is overlapping that two nodes that each bar limit connects represent that the life cycle of the intermediate variable of their representatives has, and can not be placed in the same register.When the intermediate variable that table 1 has provided each node representative can not be stored in the register, be forced to overflow the cost of overflowing that consumes, the cost of overflowing of for example overflowing node 0 is 1, and the cost of overflowing of overflowing node 1 is 3.
Each node of table 1 consumes when spilling into external storage overflows the cost table
The summit 0 1 2 3 4 5 6 7 8 9
Overflow cost 1 3 4 3 3 4 2 1 3 3
When setting up anti-graph model step, to intermediate node variable interference figure negate figure shown in Figure 3, namely in guaranteeing interference figure under the constant prerequisite of the network topology structure of node, with original fillet deletion between the every pair of node among the former figure, add non-existent fillet among the former figure, just obtained anti-graph model G, as shown in Figure 4, two nodes that any limit connects among the figure G are placed in the same register.
The node of step 2. in will the anti-G of figure is assigned in the temporary register.
2.1) overflow the cost maximum in will the anti-G of figure cut apart fully that node deposits in the temporary register among the figure, and upgrade anti-figure G, step is as follows:
2.1.1) in anti-figure G shown in Figure 4, seek comprise among the anti-figure G cut apart figure fully, be exactly to judge as central point whether node and limit thereof that central point is coupled constitute complete graph to scheme among the G each node successively; Obtain point centered by node 9, with it subgraph of all nodes 4,7,8 formations that are connected being arranged is to cut apart figure fully, as shown in Figure 5;
2.1.2) node of cutting apart fully among the figure shown in Figure 5 is put into the empty temporary register of a subscript minimum, i.e. TR 1={ 4,7,8,9}; And from anti-figure G, delete the node 4,7,8,9 that has been put in the temporary register, upgrade figure G;
2.1.3) circulation execution in step 2.1.1)~2.1.3) up to all cut apart figure fully and all be placed in the temporary register till, obtain temporary register TR 1=4,7,8,9}, the renewal figure G ' of figure G, as shown in Figure 6;
2.2) will scheme to overflow among the G ' that node deposits in the temporary register in the maximum complete graph of cost maximum, and upgrade figure G ', step is as follows:
2.2.1) in renewal figure G ' shown in Figure 6, respectively scheming the middle node of G ' as central point, all subgraphs that have the node that is connected and limit thereof to constitute of each central point and its are respectively P i, wherein i gets 0,1,2,3,5,6, respectively shown in Fig. 7 (a)~Fig. 7 (f); Seek P iIn the maximum complete subgraph F that overflows the cost maximum i, shown in Fig. 8 (a)~Fig. 8 (f), from F iIn select a maximum complete subgraph F who overflows the cost maximum Max, as shown in Figure 9;
2.2.2) with the maximum complete subgraph F that overflows the cost maximum shown in Figure 9 MaxPut into the empty temporary register of a subscript minimum, i.e. TR 2={ 1,2,3}; And deletion has been put into node 1,2,3 in the temporary register from figure G ', obtains the renewal figure G of G ' ", as shown in figure 10;
2.2.3) circulation execution 2.1.1)~2.2.3) till all nodes all are stored in the temporary register;
Finally obtain TR 1={ 4,7,8,9}, TR 2={ 1,2,3}, TR 3={ 5,6}, TR 4={ 0}.
The step 3. pair register allocation result that has obtained is used this locality to search technology LSP and is optimized.
For instantiation, if the register quantity M that embedded system provides more than or equal to 4, illustrates that all nodes all can be kept in the embedded system register, need not to optimize with step 3 again, distribute and finish.If the register quantity M that embedded system provides less than 4, will search technology LSP with this locality so and optimize.Set M=3 in this instantiation, it is as follows to optimize step:
3.1) the node correspondence in first three temporary register is put into three registers that embedded system provides, according to the minimum principle of the conflict of narrating in the HYBRID EVOLUTIONARY ALGORITHMS, with temporary register TR 4={ node 0 among the 0} is also put into first three embedded system register;
3.2) ten intermediate variables are overflowed factor S _ Factor value according to it sort from big to small, S_Factor (j)=S_Cost (j) * CF (j), wherein S_Cost (j) is the cost of overflowing of variable j, CF (j) is the degree of conflict of exempting from of variable j;
3.3) according to 3.2) and ranking results, successively each intermediate variable is implemented LSP operation, to optimize overflowing cost and overflowing the variable number of whole embedded system register;
Optimize three register R that the result provides for embedded system 1={ 4,7,8,9}, R 2={ 1,2,3}, R 3=5,6}, and node 0 is overflowed, and overflowing the variable number is 1, and overflowing cost is 1, distributes and finishes.
Effect of the present invention can further specify by following experiment:
1. simulated conditions:
Be that emulation is carried out with the C++ program in AMD Athlon (tm) II * 2245, dominant frequency 2.91GHZ, internal memory 2G, WINDOWS XP system at CPU.
2. emulation content:
Experimentize with the interference figure that produces intermediate variable at random, establishing the node number is n, introduces limit density α, register density β and overflows three concepts of cost density γ.The implication of limit density refers to that the quantity on limit among the figure is α * (n * (n-1)/2), and the implication of register density refers to that register quantity is n * β.The implication of overflowing cost density refer to each node overflow cost [1 ..., 2 γ] between value arbitrarily.To n=100, α=0.75, β=0.1, γ=5 and n=300, α=0.75, β=0.1, γ=5 a liang group parameter produces 30 width of cloth interference figures respectively at random and experimentizes, experimental result to overflow cost, overflowing variable number and time, to carry out quantity statistics as shown in table 2, experimental result obtains the mean value (SIG represents the present invention) as shown in table 3 that 30 width of cloth interference figures overflow cost, overflow variable number and time:
Table 230 group data are overflowed the fine or not distribution table of cost, variable number and time
Figure BDA0000032020790000071
From the data of table 2 as can be seen, be 100 still to be 300 figure for the node number no matter, SIG of the present invention overflow cost and overflow on the variable number all better than OCH, but the time that consumes is also many.SIG of the present invention compares with HEA, and the needed time is shorter, and having only the node number is 300 o'clock, and the time ratio HEA that exists a width of cloth figure SIG to need among 30 width of cloth figure is long.Overflowing on the cost, when the node number was 100, SIG had only 3 width of cloth and HEA to maintain an equal level in 30 picture groups, and other 27 width of cloth are all poor than HEA.But when the node number was 300, SIG had 6 amplitude ratio HEA to get well, and 2 width of cloth maintain an equal level.Overflowing on the variable number, when the node number was 100, SIG had 7 amplitude ratio HEA good among 30 width of cloth figure, and 14 width of cloth maintain an equal level.When the node number was 300, SIG had 15 amplitude ratio HEA good, and 5 width of cloth maintain an equal level.As can be seen, along with the increase of node number, the advantage of SIG of the present invention is more and more obvious, with the gap of HEA also can be more and more littler.
Table 330 group data are overflowed the mean value of cost, variable number and time
Figure BDA0000032020790000081
Table 3 is from measuring three kinds of algorithms of contrast.When the node number was 100, though the OCH time is very short, average needed 0.21 second, and overflowing cost and overflowing variable number of it all differs too much compared with HEA and SIG, do not have actual application value.And SIG of the present invention has only descended 2.80% than HEA on the cost overflowing, and it is suitable to overflow the variable number, has but improved 96.2% on the time.When the node number was 300, the OCH effect was very poor equally.SIG has only descended 0.91% than HEA overflowing on the cost, has improved 0.70% on the variable number and overflow, and has also improved 79.9% on the time.On data also stronger confirmation the conclusion that draws of table 2, SIG of the present invention can be more obvious along with the increase advantage of node number.Simultaneously, overflowing under the few situation of cost reduction, greatly reduced the needed time of distribution register.Actual application value is more arranged.
Above-mentioned embodiment only is an example of the present invention, does not constitute any limitation of the invention, can also be at different node numbers as us, and different limit density and register density use the present invention to carry out the register distribution.

Claims (4)

1. an embedded system register allocation method of describing based on anti-figure comprises the steps:
(1) draws out the mutual interference figure H of intermediate variable that embedded system produces in the program compilation process, and provide the cost of overflowing of each intermediate variable;
(2) the mutual interference figure H of middle variable is carried out anti-graphic operation, obtain anti-graph model and be: G={N, M, V, E, S}, wherein N represents the intermediate variable sum, the register quantity that the M representative is given, V represents the set of node of all intermediate variables, and node is labeled as 0 respectively, 1,2...N-1 E represents the set of all nonoriented edges, S represents the set that all intermediate variables overflow cost;
(3) M that embedded system an is given register is designated as R respectively 1, R 2..., R M, and be set with infinite a plurality of temporary register, be designated as TR respectively 1, TR 2..., TR f...;
(4) in anti-graph model G, point centered by each node in scheming G respectively, judge whether all subgraphs that have the node that is connected and limit thereof to constitute of this central point and its are complete graph, if then being defined as it, complete graph cuts apart figure fully, if cutting apart figure fully, this has and has only one, then select the empty temporary register of subscript minimum, the node of cutting apart fully among the figure is put into wherein, directly execution in step (5); If to cut apart figure fully not unique for this, then select to overflow and comprise maximum one of node number cutting apart fully of cost maximum among the figure and cut apart figure fully, its node is put into the empty temporary register of subscript minimum, directly execution in step (5); If do not exist among the anti-graph model G and cut apart figure fully, then directly anti-graph model G is regarded as one and do not comprise the subgraph G ' of cutting apart figure fully, redirect execution in step (6);
(5) deletion has been put into and has cut apart figure fully in the temporary register in anti-graph model G, and repeating step (4)~(5) do not comprise the subgraph G ' of cutting apart figure fully up to obtaining one;
(6) in not comprising the subgraph G ' of cutting apart figure fully, respectively to scheme among the G ' each node as central point, all have the subgraph P that the node that is connected and limit thereof constitute at each central point and its iIn, seek P iIn overflow the maximum complete subgraph F of cost maximum iFrom F iIn select to overflow in the maximum complete subgraph of cost maximum and comprise a maximum maximum complete subgraph F of node Max, with F MaxPut into the empty temporary register of subscript minimum, wherein i gets the node that comprises among the G ' successively;
(7) at the middle deletion F of G ' Max, obtain the renewal figure G ' ' of G ', to the operation of G ' ' repeating step (4)~(7), all put into temporary register TR up to all nodes jIn, j=1...L wherein, L is for distributing the quantity of the required temporary register of all nodes fully;
(8) with temporary register TR j(j=1...L) node variable in stores embedded system register R into k(k=1...M) in; If L≤M, overflowing the variable number is zero, and overflowing cost is zero, then distributes and finishes; If L〉M, then have intermediate variable and spill in the external storage, according to the minimum principle of the conflict among the HYBRID EVOLUTIONARY ALGORITHMS HEA, with temporary register TR j(j=M+1...L) intermediate variable in is also put into embedded system register R k(k=1...M) in, and use local search technology LSP method that it is optimized, establish M=3, it is as follows that it optimizes step:
8.1) the node correspondence in first three temporary register is put into three registers that embedded system provides, according to the minimum principle of the conflict of narrating in the HYBRID EVOLUTIONARY ALGORITHMS, with temporary register TR 4={ node 0 among the 0} is also put into first three embedded system register;
8.2) ten intermediate variables are overflowed factor S _ Factor value according to it sort from big to small, S_Factor (j)=S_Cost (j) * CF (j), wherein S_Cost (j) is the cost of overflowing of variable j, CF (j) is the degree of conflict of exempting from of variable j;
8.3) according to step 8.2) and ranking results, successively each intermediate variable is implemented LSP operation, to optimize overflowing cost and overflowing the variable number of whole embedded system register;
Optimize three register R that the result provides for embedded system 1={ 4,7,8,9}, R 2={ 1,2,3}, R 3=5,6}, and node 0 is overflowed, and overflowing the variable number is 1, and overflowing cost is 1, distributes and finishes.
2. the embedded system register allocation method of describing based on anti-figure according to claim 1, wherein step (2) is described carries out anti-graphic operation to the mutual interference figure of drawing of intermediate variable, be to keep the network topology structure of node among the former figure constant, with original fillet deletion between the every pair of node among the former figure, add non-existent fillet among the former figure, can obtain anti-graph model G.
3. the embedded system register allocation method of describing based on anti-figure according to claim 1, the described cost of overflowing of cutting apart figure fully of step (4) wherein, be cut apart fully comprise node among the figure overflow the cost sum.
4. the embedded system register allocation method of describing based on anti-figure according to claim 1, wherein the described maximum complete subgraph of step (6) overflow cost, be comprise node in the maximum complete subgraph overflow the cost sum.
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