CN102314075B - Composite mask and manufacturing method thereof - Google Patents
Composite mask and manufacturing method thereof Download PDFInfo
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- CN102314075B CN102314075B CN 201010223464 CN201010223464A CN102314075B CN 102314075 B CN102314075 B CN 102314075B CN 201010223464 CN201010223464 CN 201010223464 CN 201010223464 A CN201010223464 A CN 201010223464A CN 102314075 B CN102314075 B CN 102314075B
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Abstract
The invention provides a composite mask and a manufacturing method thereof, wherein the manufacturing method comprises the following steps of: providing a semiconductor substrate and forming a first mask layer with a first stripped pattern on the bottom surface of the semiconductor substrate; forming a second mask layer on the surfaces of the first mask layer and the semiconductor substrate, wherein the second mask layer is provided with a second striped pattern vertical to the first stripped pattern, and the second mask layer is made of material different from that of the first mask layer; etching the first mask layer by taking the second mask layer as a mask until the first mask layer is exposed out of the semiconductor substrate; bombarding one side surface of the second mask layer by adopting a targeted iron injection process to form a hardened side wall; and carrying out appearance correction on the second mask layer by adopting a plasma etching process to reduce the width of the second mask layer and expose the first mask layer at the bottom. Compared with the prior art, the composite mask formed by the invention avoids pattern distortion generated by an optical proximity effect and is suitable for manufacturing a dog-bone-shaped interconnection structure with small feature size.
Description
Technical field
The present invention relates to semiconductor fabrication process, relate in particular to a kind of composite mask and preparation method thereof.
Background technology
In semi-conductive interconnection structure, along with the day by day reduction of process, live width also progressively reduces, and when making contact hole in active area, aims at all the more difficulty that also seems.Therefore existing a kind of interconnection structure is referred to as dog bone shape interconnection (dog bone).
Fig. 1 is the schematic top plan view of dog bone shape interconnection structure, and as shown in Figure 1, described dog bone shape interconnection specifically refers to: the contact region 20 in the upper setting party's bulk of thinner active line 10 (such as metal interconnecting wires, grid line etc.) is used for making contact hole.The width of described square shape contact region 20 is greater than the width of active line 10, and area is larger, aims at when therefore being easier to make contact hole.
For making above-mentioned dog bone shape interconnection structure, need to form first corresponding mask, the figure of described mask is identical with described dog bone shape.In the conventional semiconductor technology, the making step of mask comprises: form mask layer and photoresist at semiconductor substrate surface, with the photoresist exposure figure, take photoresist as the mask etching mask layer, described figure is transferred on the mask layer.
There are the following problems for existing mask manufacture technique: along with the micro of semiconductor technology characteristic dimension, after entering 45nm technique, the optical proximity effect that exists in the photoetching is also more and more serious.Again as shown in Figure 1, the spacing between the active line 10 is dwindled, and can cause being positioned at adjacent contact area 20 hypotelorisms on the different active lines 10.Expose the photoetching offset plate figure that forms according to above-mentioned dog bone shape figure will be as shown in Figure 2.In Fig. 2, adjacent contact region 20 figures are because hypotelorism produces serious optical proximity effect, and the distortion of generation figure.The shape of contact region 20 figures no longer is strict square shape and be ellipticity, and the width of its width and active line 10 figures is basically identical.The mask of making according to above-mentioned photoetching offset plate figure can't form required dog bone shape interconnection structure.
Therefore, for the semiconductor technology than small-feature-size, need simple, the with low cost mask manufacture method of a kind of technological process of exploitation, solve the picture distortion problem that optical proximity effect produces.
Summary of the invention
The problem that the present invention solves provides a kind of composite mask and preparation method thereof, is used for forming as etching the mask of dog bone shape interconnection structure, the picture distortion problem that can avoid optical proximity effect to produce.
Composite mask method for making provided by the invention comprises:
Semiconductor substrate is provided, forms the first mask layer with first bar paten at described semiconductor substrate surface;
Surface in described the first mask layer and Semiconductor substrate forms the second mask layer, described the second mask layer has the second bar paten, described the second bar paten is perpendicular to described the first bar paten, and described the second mask layer is not identical with the material of the first mask layer;
Described the first mask layer is until expose Semiconductor substrate take the second mask layer as mask etching;
Adopt directed ion implantation technology to bombard a wherein side of the second mask layer, form the sclerosis sidewall;
Adopt plasma etching industrial that the second mask layer is carried out the profile correction, reduce the width of described the second mask layer, expose the first mask layer of bottom.
Optionally, described the first bar paten comprises two bargraphss that are parallel to each other at least.Described the first mask layer is hard mask.The method of described formation the first mask layer comprises: form the first mask layer in Semiconductor substrate; Form patterned photoresist on the surface of the first mask layer, described photoetching offset plate figure is bargraphs; Take described photoresist as mask, adopt plasma etching industrial to form the first mask layer, and remove described photoresist.
Optionally, described the second bar paten comprises two bargraphss that are parallel to each other at least.Described the second mask layer is photoresist.The method of the second mask layer of described formation bar shaped comprises: at the surperficial spin coating photoresist of the first mask layer and Semiconductor substrate, to described photoresist exposure figure, form the second bar paten perpendicular to the first bar paten.
Described composite mask is used for etching and forms interconnection structure, and described profile correction is decreased to the bargraphs width of the second mask layer the width of active line in the interconnection structure.
In the described ion implantation technology, the bombardment direction of ion and the angle of the second mask layer sidewall are 7～15 degree.The ionic species that described ion implantation technology adopts is Ar ion or P ion.
Based on above-mentioned method for making, composite mask provided by the present invention is formed at semiconductor substrate surface, comprising:
Be positioned at first mask layer with square shape pattern of semiconductor substrate surface; Be positioned at the first mask layer part surface and extend to second mask layer with bar paten of semiconductor substrate surface; Be positioned at the wherein sclerosis sidewall of a side of described the second mask layer, described sclerosis sidewall is mutually concordant with the corresponding side surface of the first mask layer of bottom.
Optionally, the bar paten of described the second mask layer comprises two bargraphss that are parallel to each other at least, and is positioned at the second mask layer bottom of described each bargraphs, comprises at least the first mask layer of two square shape patterns.Described the first mask layer is hard mask.Described the second mask layer is photoresist.Described composite mask is used for etching and forms interconnection structure, and described bargraphs width equals the width of active line in the interconnection structure.
The present invention makes respectively two kinds of vertically mutual and superpose bar shaped masks at semiconductor substrate surface, and the first mask layer of removing bottom being positioned at is exposed to outer part, and then adopt plasma etching that the second mask layer that is positioned at the top is carried out the profile correction, finally form the composite mask structure of dog bone shape.Said method has been avoided in the traditional masks manufacture craft, photoresist exposure is being carried out figure when shifting, the picture distortion problem that produces because of optical proximity effect.Therefore composite mask of the present invention is more suitable for for the dog bone shape interconnection structure of making small-feature-size.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose of the present invention, Characteristics and advantages will be more clear.Parts same as the prior art have used identical Reference numeral in the accompanying drawing.Accompanying drawing and not drawn on scale focus on illustrating purport of the present invention.In the accompanying drawings for clarity sake, amplified the size in layer and zone.
Fig. 1 is the synoptic diagram of dog bone shape interconnection structure;
Picture distortion synoptic diagram when Fig. 2 is existing mask manufacture technique generation optical proximity effect;
Fig. 3 is the method for making schematic flow sheet of composite mask of the present invention;
Fig. 4 to Fig. 9 is the plan structure synoptic diagram of the composite mask method for making of the embodiment of the invention;
Fig. 4 a to Fig. 9 a is the cross-sectional view of the composite mask method for making of the embodiment of the invention;
Figure 10 uses the synoptic diagram that composite mask etching of the present invention forms dog bone shape grid line;
Figure 10 a is along the diagrammatic cross-section of B-B ' line among Figure 10.
Embodiment
In existing mask manufacture technique, when the figure transfer is carried out in the photoresist exposure, be subject to the impact of optical proximity effect in the dog bone shape figure between adjacent domain, produce easily picture distortion, be tending towards bar shaped so that form dog bone shape figure, be difficult to realize required effect.For avoiding the optical proximity effect between above-mentioned adjacent domain, the present invention adopts the gradation mask manufacture, form two kinds of vertically mutual and superpose bar shaped masks in Semiconductor substrate, and the bar shaped mask of removing bottom being positioned at is exposed to outer part, and then adopt plasma etching that the bar shaped mask that is positioned at the top is carried out the profile correction, finally form the composite mask structure of dog bone shape.As shown in Figure 3, the method for making basic step of composite mask of the present invention comprises:
S101, provide Semiconductor substrate, form the first mask layer with first bar paten at described semiconductor substrate surface;
Wherein, described Semiconductor substrate is not limited to silicon substrate, also comprises the semiconductor devices or the semiconductor structure that have formed; For example when making the polysilicon grid line, the base semiconductor substrate of mask just comprises polysilicon layer to be etched and the pad oxide that plays the etching stopping effect.Described the first bar paten can be many line images that are parallel to each other, and can be for equally spaced between each bargraphs.Above-mentioned the first mask layer can be hard mask, can adopt conventional hard mask pattern metallization processes.For example form the photoresist of exposure figure at hard mask layer, take photoresist as mask hard mask layer is carried out etching, finish the transfer of figure, then remove this photoresist, form the first mask layer of above-mentioned bar paten.In addition in this step, owing to only need form bargraphs, even there is optical proximity effect in the photoetching offset plate figure that therefore adopts, also can't affect the effect of figure.Each bargraphs edge of the first mask layer is smooth.
S102, form the second mask layer on the surface of described the first mask layer and Semiconductor substrate, described the second mask layer has the second bar paten perpendicular to the first bar paten;
Wherein, described the second bar paten also can comprise many bargraphss that are parallel to each other, and can be for equally spaced between each bargraphs, and such the second mask layer and the first mask layer have just intersected to form the groined type structure.Should there be material difference in described the second mask layer and the first mask layer, so that the plasma etching industrial of following adopted different choice etching ratio divides other etching.The second mask layer can adopt photoresist, can adopt conventional exposure figure metallization processes, identical with aforementioned reason, only need form bargraphs in this step, even therefore have optical proximity effect in the described exposure figure process, also can not affect the effect of figure.Each bargraphs edge of the second mask also should be smooth.
S103, described the first mask layer is until expose Semiconductor substrate take the second mask layer as mask etching;
After wherein passing through the etching of this step, the first mask layer that originally had the first bar paten has only kept the part that is positioned at the second mask layer bottom, and this part be projected as squarely, therefore described the first mask layer will be divided into square shape pattern.
S104, the directed ion implantation technology of employing are bombarded a wherein side of the second mask layer, form the sclerosis sidewall;
Wherein adopt ion implantation technology to bombard the second mask layer, will rotten sclerosis occur so that the second mask layer is subject to a side surface of Ions Bombardment, and form the sclerosis sidewall.Described sclerosis sidewall will be protected this side surface of the second mask layer, when the following adopted plasma etching industrial carries out the profile correction, not be thinned.
S105, employing plasma etching industrial carry out the profile correction to the second mask layer, reduce the width of described the second mask layer, expose the first mask layer of bottom.
The etching gas that wherein said plasma etching industrial adopts, should have larger selective etching ratio to the second mask layer, so that described plasma etching industrial is when carrying out the profile correction to the second mask layer, only can not form a side surface that hardens sidewall and expose in attenuate the second mask layer, namely reduced the width of the second mask layer, and the first mask layer has not been exerted an influence.After the profile correction, the first mask layer that is positioned at the square shape pattern of the second mask layer bottom will be exposed.Overlook the top of Semiconductor substrate, the first mask layer and the second mask layer will consist of the mask graph of dog bone shape.The composite mask that is formed take the first mask layer and the second mask layer is as mask, and the Semiconductor substrate of etching bottom just can access required small-feature-size dog bone shape interconnection graph.
Through the description of above-mentioned method for making to composite mask of the present invention as can be known, composite mask of the present invention can't be subject to the impact of optical proximity effect, can form the mask graph of undersized dog bone shape.
Below in conjunction with specific embodiment, method for making and advantage to composite mask of the present invention are described in detail.Fig. 4 to Fig. 9 is the plan structure synoptic diagram of the composite mask method for making of the embodiment of the invention.
At first shown in Fig. 4 and Fig. 4 a, wherein Fig. 4 a be among Fig. 4 along the diagrammatic cross-section of A-A ' line, form successively the first mask layer 101, bottom anti-reflection layer 102, patterned the first photoresist layer 103 on the surface of Semiconductor substrate 100.
Concrete, described the first mask layer 101 can be hard mask, and in the present embodiment, described the first mask layer 101 adopts silicon dioxide, and by the chemical vapor deposition method deposition, thickness is 200～400
Then adopt spin coating to form described bottom anti-reflection layer 102 and the first photoresist layer 103, the thickness of described bottom anti-reflection layer 102 is 450～800
The thickness of described the first photoresist layer 103 is 1100～2000
To the first photoresist layer 103 exposure figures, form the linear photoetching offset plate figure that is parallel to each other again.
Shown in Fig. 5 and Fig. 5 a, wherein Fig. 5 a be among Fig. 5 along the diagrammatic cross-section of A-A ' line, take patterned the first photoresist layer 103 as mask, successively etching bottom anti-reflection layer 102, the first mask layer 101 are until expose Semiconductor substrate 100.
Concrete, above-mentioned etching technics can adopt conventional hard mask plasma etching industrial, and in the present embodiment, the etching gas that described etching the first mask layer 101 adopts is CF
4And He.
After above-mentioned etching is finished, also should comprise ashing the first photoresist layer 103, and clean the step of removing the first photoresist layer 103 and bottom anti-reflection layer 102.
Shown in Fig. 6 and Fig. 6 a, wherein Fig. 6 a be among Fig. 6 along the diagrammatic cross-section of B-B ' line, form patterned the second mask layer 104 on the first mask layer 101 and Semiconductor substrate 100 surfaces of bar shaped.
Concrete, described the second mask layer 104 materials can be photoresist, can adopt spin coating proceeding to be formed at the surface of described the first mask layer 101 and Semiconductor substrate 100, then have the second mask layer 104 of the bargraphs that is parallel to each other by exposure figure formation.In the present embodiment, the thickness of described the second mask layer 102 is 1100～2000
And on the surface of the second mask layer 104 also spin coating thickness is arranged is 450～800
Top anti-reflective layer (not shown), described top anti-reflective layer can keep always, and is used for composite mask take follow-up formation as the mask etching Semiconductor substrate.Described the second mask layer 104 and the first mask layer 101 are perpendicular.After graphical, from visual angle, Semiconductor substrate top, described the second mask layer 104 and the first mask layer 101 consist of the groined type shape.
Shown in Fig. 7 and Fig. 7 a, wherein Fig. 7 a be among Fig. 7 along the diagrammatic cross-section of B-B ' line, take described the second mask layer 104 as mask, etching the first mask layer 101 is until expose Semiconductor substrate 100.
Concrete, described etching technics can adopt the plasma etching industrial identical with former figuresization the first mask layer 101.Through after the above-mentioned etching, the first mask layer 101 only keeps the lap that is positioned at the second mask layer 104 bottoms because the first mask layer 101 is bargraphs and mutual vertical with the second mask layer 104, so above-mentioned lap be projected as square.Final first mask layer 101 that forms is divided into square shape pattern.
Shown in Fig. 8 and Fig. 8 a, wherein Fig. 8 a be among Fig. 8 along the diagrammatic cross-section of B-B ' line, adopt directed ion implantation technology to bombard a wherein side of the second mask layer, form sclerosis sidewall 105.
Concrete, in the described ion implantation technology, the bombardment direction of ion and the angle of the second mask layer sidewall can be 7～15 degree, the ionic species of injection can be Ar ion or P ion.In the present embodiment, described the second mask layer is photoresist, and therefore after the bombardment that is subject to above-mentioned ion, a side surface that is bombarded will form harder charring layer, and described charring layer is namely as sclerosis sidewall 105.The ionic species that adopts and implant angle will affect the thickness of described sclerosis sidewall 105.For example inject angle and be 7～15 degree, the ion energy is 50 ± 10Kev, and when adopting the Ar ion, formed sclerosis sidewall 105 thickness are about 50～60nm; And when adopting the P ion, formed sclerosis sidewall 105 thickness are about 60～80nm.The angle of common above-mentioned Implantation is larger, and formed sclerosis sidewall 105 is thicker, otherwise then thinner.
Shown in Fig. 9 and Fig. 9 a, wherein Fig. 9 a be among Fig. 9 along the diagrammatic cross-section of B-B ' line, adopt plasma etching industrial that the second mask layer 104 is carried out the profile correction, reduce the width of the second mask layer 104, expose bottom the first mask layer 101.
Concrete, described plasma etching industrial only carries out the profile correction to the second mask layer 104, and the first mask layer 101 be there is no impact, be that employed etching gas should have larger selective etching ratio to the second mask layer 104, and the first mask layer 101 is not possessed etching (etch capabilities too small and can ignore).In the present embodiment, the material of the first mask layer 101 is silicon dioxide, and the second mask layer 104 is photoresist, and in the plasma etching industrial that photoresist profile correction (PRTriming) is adopted, etching gas can be HBr, CH
2F
2And O
2Through after the above-mentioned profile correction, the side that does not form sclerosis sidewall 105 in the second mask layer 104 will be thinned, and namely the width of the second mask layer 104 reduces, and exposes the first mask layer 101 of bottom.After passing through in addition the profile correction, the width dimensions of described the second mask layer 104 each bargraphs depends on the width of required etching figure, when for example composite mask of the present invention was used for etching formation interconnection structure, the width of each bargraphs should equal the width of active line in the interconnection structure in above-mentioned the second mask layer 104.From visual angle, Semiconductor substrate top, the first mask layer 101 and the second mask layer 104 will consist of dog bone shape figure, and the first mask layer 101 wherein a side is mutually concordant with sclerosis sidewall 105 surfaces on the second mask layer 104.
Through after the above-mentioned technique, described the first mask layer 101 and the second mask layer 104 have just consisted of the composite mask structure.Below take the etch polysilicon grid line as example, introduce the use of composite mask of the present invention.Further shown in Fig. 9 and Fig. 9 a, wherein Fig. 9 a is along the diagrammatic cross-section of B-B ' line among Fig. 9, described Semiconductor substrate 100 comprises silicon substrate 110, the oxygen pad layer 120 on silicon substrate 110 surfaces and polysilicon layer 130, take described composite mask as mask, the described polysilicon layer 130 of etching is until expose oxygen pad layer 120., just can access the grid line figure of required dog bone shape.
Concrete, above-mentioned during take composite mask as mask etching Semiconductor substrate 100, can adopt plasma etching industrial, and the etching gas that uses should can not produce considerable influence to the second mask layer 104 of photoresist material and the first mask layer 101 of silicon dioxide material.
Based on above-mentioned method for making, composite mask provided by the present invention comprises:
Be positioned at first mask layer with square shape pattern of semiconductor substrate surface; Be positioned at the first mask layer part surface and extend to second mask layer with bar paten of semiconductor substrate surface; Be positioned at the wherein sclerosis sidewall of a side of described the second mask layer, described sclerosis sidewall is mutually concordant with the corresponding side surface of the first mask layer of bottom.
Further, described bar paten can comprise two bargraphss that are parallel to each other at least, and is positioned at the second mask layer bottom of described each bargraphs, comprises at least two square shape pattern the first mask layers.
Because be positioned at the second mask layer bottom of different bargraphss, and the first mask layer of adjacent square shape pattern, may be formed by the first mask layer etching of same bargraphs.Therefore in the composite mask that the present invention forms, be positioned at the second mask layer bottom of different bargraphss, the distribution trend of the first mask layer of square shape pattern (quantity, interval etc.) is basic identical.
Described the first mask layer is also different from the material of the second mask layer.The first mask layer plays certain supporting role owing to be positioned at the bottom of the second mask layer, usually adopts hard mask, materials such as silicon dioxide, silicon nitride, and the second mask layer can directly make with photoresist, with simplified manufacturing technique.For example in Figure 10 and Figure 10 a illustrated embodiment, when being used for making the polysilicon grid line, the first mask layer region forms the gate contact region of square shape with etching, and all the other second mask layer regions then etching form grid line.Wherein, shift the contact region figure that obtains by the figure of the first mask layer, the edge is comparatively clear smooth, does not have the existing picture distortion problem of conventional lithography glue mask.
Although the present invention with preferred embodiment openly as above; but it is not to limit the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement that technical solution of the present invention is made possible change and modification; therefore; every content that does not break away from technical solution of the present invention; to any simple modification, equivalent variations and modification that above embodiment does, all belong to the protection domain of technical solution of the present invention according to technical spirit of the present invention.
Claims (16)
1. the method for making of a composite mask is characterized in that, comprising:
Semiconductor substrate is provided, forms the first mask layer with first bar paten at described semiconductor substrate surface;
Surface in described the first mask layer and Semiconductor substrate forms the second mask layer, and described the second mask layer has the second bar paten perpendicular to the first bar paten, and described the second mask layer is not identical with the material of the first mask layer;
Described the first mask layer is until expose Semiconductor substrate take the second mask layer as mask etching;
Adopt directed ion implantation technology to bombard a wherein side of the second mask layer, form the sclerosis sidewall;
Adopt plasma etching industrial that the second mask layer is carried out the profile correction, reduce the width of described the second mask layer, the first mask layer that exposes the bottom, the etching gas that uses in the described plasma etching industrial has larger selective etching ratio to the second mask layer, and the first mask layer is not possessed etching.
2. method for making as claimed in claim 1 is characterized in that, described the first bar paten comprises two bargraphss that are parallel to each other at least.
3. method for making as claimed in claim 1 is characterized in that, described the first mask layer is hard mask.
4. method for making as claimed in claim 3 is characterized in that, the method for described formation the first mask layer comprises:
Form the first mask layer in Semiconductor substrate;
Form patterned photoresist on the surface of the first mask layer, described photoetching offset plate figure is bargraphs;
Take described photoresist as mask, adopt plasma etching industrial to form the first mask layer, and remove described photoresist.
5. method for making as claimed in claim 1 is characterized in that, described the second bar paten comprises two bargraphss that are parallel to each other at least.
6. method for making as claimed in claim 1 is characterized in that, described the second mask layer is photoresist.
7. method for making as claimed in claim 6 is characterized in that, the method for described formation the second mask layer comprises:
Surperficial spin coating photoresist in the first mask layer and Semiconductor substrate;
To described photoresist exposure figure, form the second bar paten perpendicular to the first bar paten.
8. method for making as claimed in claim 5 is characterized in that, described composite mask is used for etching and forms interconnection structure, and described profile correction is decreased to described bargraphs width the width of active line in the interconnection structure.
9. method for making as claimed in claim 1 is characterized in that, in the described ion implantation technology, the bombardment direction of ion and the angle of the second mask layer sidewall are 7～15 degree.
10. method for making as claimed in claim 1 is characterized in that, the ionic species that described ion implantation technology adopts is Ar ion or P ion.
11. the composite mask that the method for making of a composite mask according to claim 1 makes is formed at semiconductor substrate surface, it is characterized in that, comprising:
Be positioned at first mask layer with square shape pattern of semiconductor substrate surface;
Be positioned at the first mask layer part surface and extend to second mask layer with bar paten of semiconductor substrate surface;
Be positioned at the wherein sclerosis sidewall of a side of described the second mask layer, described sclerosis sidewall is mutually concordant with the corresponding side surface of the first mask layer of bottom.
12. composite mask as claimed in claim 11 is characterized in that, described bar paten comprises two bargraphss that are parallel to each other at least.
13. composite mask as claimed in claim 12 is characterized in that, is positioned at the second mask layer bottom of described each bargraphs, comprises at least two square shape pattern the first mask layers.
14. composite mask as claimed in claim 11 is characterized in that, described the first mask layer is hard mask.
15. composite mask as claimed in claim 11 is characterized in that, described the second mask layer is photoresist.
16. composite mask as claimed in claim 11 is characterized in that, described composite mask is used for etching and forms interconnection structure, and the width of described bargraphs equals the width of active line in the interconnection structure.
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| CN104752169B (en) * | 2013-12-30 | 2018-12-21 | 中芯国际集成电路制造(上海)有限公司 | The forming method of mask pattern |
| CN105719999B (en) * | 2014-12-02 | 2019-03-12 | 中芯国际集成电路制造(上海)有限公司 | Interconnection structure and forming method thereof |
| CN105824188B (en) * | 2016-04-29 | 2019-08-30 | 上海华力微电子有限公司 | The optics modification method of ion implanted layer domain |
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| US5126006A (en) * | 1990-10-30 | 1992-06-30 | International Business Machines Corp. | Plural level chip masking |
| CN1983024A (en) * | 2005-12-15 | 2007-06-20 | 株式会社瑞萨科技 | Pattern formation method using levenson-type mask and method of manufacturing levenson-type mask |
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| JPH0844038A (en) * | 1994-08-03 | 1996-02-16 | Matsushita Electron Corp | Master mask forming device and production of semiconductor device |
| US7694269B2 (en) * | 2007-02-26 | 2010-04-06 | Texas Instruments Incorporated | Method for positioning sub-resolution assist features |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5126006A (en) * | 1990-10-30 | 1992-06-30 | International Business Machines Corp. | Plural level chip masking |
| CN1983024A (en) * | 2005-12-15 | 2007-06-20 | 株式会社瑞萨科技 | Pattern formation method using levenson-type mask and method of manufacturing levenson-type mask |
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| JP特开平8-44038A 1996.02.16 |
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