CN102298957A - Decoupling control circuit and semiconductor circuit - Google Patents
Decoupling control circuit and semiconductor circuit Download PDFInfo
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- CN102298957A CN102298957A CN2010102179446A CN201010217944A CN102298957A CN 102298957 A CN102298957 A CN 102298957A CN 2010102179446 A CN2010102179446 A CN 2010102179446A CN 201010217944 A CN201010217944 A CN 201010217944A CN 102298957 A CN102298957 A CN 102298957A
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Abstract
The invention provides a decoupling control circuit and a semiconductor circuit. The decoupling control circuit comprises a first power supply terminal, a second power supply terminal; a control signal generating circuit is used for comparing a first power supply voltage at the first power supply terminal with a reference voltage to output a first enable signal and a second enable signal; a first decoupling capacitor is connected with a first path switch in series between the first power supply terminal and the second power supply terminal, the first path switch is controlled by the first enable signal; a second decoupling capacitor is connected with a second path switch in series between the first power supply terminal and the second power supply terminal, the second path switch is controlled by the second enable signal, and a third path switch is arranged between the first decoupling capacitor and the second decoupling capacitor and controlled by the first enable signal and the second enable signal. In the decoupling control circuit, the at least two decoupling capacitors and the multiple path switches are arranged, and the two decoupling capacitors are connected in series and/or in parallel, thus being applied to the situations with different power supply voltages, thereby ensuring the decoupling efficiency and flexibility of the decoupling control circuit.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of decoupling control circuit and semiconductor circuit.
Background technology
In recent years, follow the high speed and the multifunction of digital circuit, the high speed of SIC (semiconductor integrated circuit) and highly integrated making progress.High speed and the highly integrated power consumption increase that makes chip along with SIC (semiconductor integrated circuit), the problem that supply voltage descends appears thus, the operating frequency decline of transistorized responsiveness reduction and circuit appears because of supply voltage descends, perhaps cause along with the decline of supply voltage that the noise tolerance limit reduces and data latch failure etc., be prone to the problem of circuit maloperation.
Therefore, be the speed of raising SIC (semiconductor integrated circuit) and the stability of circuit operation, generally be in SIC (semiconductor integrated circuit) at a high speed between two power end pads at circuit (being between power supply and the ground connection) connect and put decoupling capacitor, common ground, what described decoupling capacitor generally adopted is MOS capacitor.
Please refer to Fig. 1, Fig. 1 is the block scheme that shows the decoupling control circuit 100 with decoupling capacitor 110.Decoupling capacitor 110 is to be used to protect electronic circuit 120 to avoid by the above-mentioned voltage drop of power source pad (for example VDD) generation and the influence of noise.For example, if decoupling capacitor 110 is MOS capacitors, the grid of decoupling capacitor 110 is coupled to a power source pad (for example VDD), and the source electrode of decoupling capacitor 110 all is coupled to another power source pad (for example VSS) with drain electrode.
By decoupling capacitor 110 being applied to there is voltage drop in the decoupling control circuit 100 near electronic circuit 120, decoupling capacitor 110 can compensate this unexpected voltage drop rapidly, with protection electronic circuit 120, it is immune.In addition, decoupling capacitor 110 is protection electronic circuit 120 further, makes it away from unexpected power noise (power noise).
For satisfying the reliability requirement of ceiling voltage, decoupling capacitor adopts has the thicker MOS capacitor of grid oxic horizon.Along with thickness of grid oxide layer increases, the electric capacity of unit area descends, the electric capacity entire area increases, can take the zone of more decoupling control circuit, and cause that in the decoupling control circuit bigger dynamic electric voltage falls, sensitivity is relatively poor.On the other hand, for being increased in decoupling efficient and the sensitivity under the low-voltage, adopt to have the thin MOS capacitor of grid oxic horizon, but thin grid oxic horizon, to cause unexpected leakage current excessive in the decoupling control circuit, make the circuit performance deterioration.
Summary of the invention
The problem that the present invention solves be existing decoupling control circuit adopt thickness of grid oxide layer thicker decoupling capacitor area occupied, decoupling efficient lower, cause that bigger dynamic electric voltage falls and makes sensitivity relatively poor or adopt the thin decoupling electricity of thickness of grid oxide layer easily to cause unexpected leakage current excessive in the decoupling control circuit, makes the problem of circuit performance deterioration.
For addressing the above problem, one aspect of the present invention provides a kind of decoupling control circuit, comprising: first power end and the second source end that is connected to second source voltage that are connected to first supply voltage; Control signal generation circuit, be connected with described first power end, be used for first supply voltage and the reference voltage of described first power end are compared, and according to definite first enable signal of being exported of described comparative result and the value of second enable signal, described first enable signal and described second enable signal are anti-phase each other; Isolation circuit comprises the first decoupling branch road with first decoupling capacitor and first channel selector, the second decoupling branch road with second decoupling capacitor and alternate path switch and the 3rd channel selector between described first decoupling branch road and the described second decoupling branch road; Described first decoupling capacitor and described first channel selector are series between described first power end and the described second source end, and described first channel selector is controlled by described first enable signal and realized break-make; Described second decoupling capacitor and described alternate path switch series are coupled between described first power end and the described second source end, and described alternate path switch is controlled by described second enable signal and realized break-make; Described the 3rd channel selector is connected with second electrode of described first decoupling capacitor and first electrode of described second decoupling capacitor, and described the 3rd channel selector is subjected to described first enable signal and described second enable signal to control the break-make that realizes described first decoupling capacitor and described second decoupling capacitor.
Alternatively, described decoupling control circuit also comprises filter unit, and described filter unit is used for first supply voltage of described first power end is carried out exporting described control signal generation circuit to after the filtering.
Alternatively, described filter unit is the RC filtering circuit, comprise first resistance, second resistance and electric capacity, first end of described first resistance is connected with described first power end, second end of described first resistance is connected with first end of described second resistance, second end of described second resistance is connected with described second source end, first end of described electric capacity is connected with first end of second end of described first resistance and described second resistance, second end of described electric capacity is connected with described second source end, and the junction of second end of described first resistance and first end of described second resistance is as the output terminal of filtering signal.
Alternatively, described control signal generation circuit comprises comparer, the first input end of described comparer is connected with the output terminal of described filter unit, second input end of described comparer is connected with reference voltage, first output terminal of described comparer is exported first enable signal, and second output terminal of described comparer is exported second enable signal; At the voltage of described first input end during greater than the voltage of described second input end, first enable signal of the described first output terminal output low level, second enable signal of described second output terminal output high level; When the voltage of described first input end is lower than the voltage of described second input end, first enable signal of described first output terminal output high level, second enable signal of the described second output terminal output low level.
Alternatively, described first decoupling capacitor is a metal-oxide-semiconductor electric capacity, and described first channel selector is a nmos pass transistor; Grid as the described metal-oxide-semiconductor electric capacity of first decoupling capacitor is connected with first power end, source, drain electrode as the described metal-oxide-semiconductor electric capacity of first decoupling capacitor are connected with the drain electrode of described the 3rd channel selector and described nmos pass transistor, the grid of described nmos pass transistor receives first enable signal, and the source electrode of described nmos pass transistor is connected with described second source end.
Alternatively, described alternate path switch is the PMOS transistor, and described second decoupling capacitor is a metal-oxide-semiconductor electric capacity; The transistorized grid of described PMOS receives second enable signal, the transistorized source electrode of described PMOS is connected with described first power end, described PMOS transistor drain is connected with described the 3rd channel selector with grid as the described metal-oxide-semiconductor electric capacity of second decoupling capacitor, is connected with described second source end as source, the drain electrode of the described metal-oxide-semiconductor electric capacity of second decoupling capacitor.
Alternatively, described the 3rd channel selector is a cmos transmission gate, comprises symmetrically arranged nmos pass transistor and PMOS transistor, and the two ends of described cmos transmission gate are connected with second electrode of described first decoupling capacitor and first electrode of described second decoupling capacitor respectively.
Alternatively, first supply voltage is a supply voltage, and described second source voltage is ground voltage.
The present invention also provides a kind of semiconductor circuit that comprises above-mentioned decoupling control circuit on the other hand, and described semiconductor circuit also comprises logical circuit, and described logical circuit is between described first power end and described second source end.
Compared with prior art, the present invention has the following advantages: be provided with at least two decoupling capacitors and a plurality of channel selector, so just can opening and/or turn-offing according to the big or small control path switch of supply voltage, and then realize the series connection (when supply voltage is higher) of described two decoupling capacitors or parallel connection (when supply voltage is low), make described decoupling control circuit can be applicable to the situation of different electrical power voltage, guaranteed the decoupling efficient and the sensitivity of decoupling control circuit.
Description of drawings
Fig. 1 has shown the circuit diagram of the decoupling control circuit that has decoupling capacitor in the prior art;
Fig. 2 has shown the decoupling control circuit synoptic diagram in one embodiment in the semiconductor circuit of the present invention;
Fig. 3 has shown decoupling control circuit circuit diagram in one embodiment shown in Figure 2.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
Set forth a lot of details in the following description so that fully understand the present invention, implement but the present invention can also adopt other to be different from alternate manner described here, so the present invention has not been subjected to the restriction of following public specific embodiment.
Just as described in the background section, in the prior art in the decoupling control circuit, adopt thickness of grid oxide layer thicker decoupling capacitor area occupied, decoupling efficient lower, cause that bigger dynamic electric voltage falls and makes sensitivity relatively poor; Perhaps adopt the thin decoupling capacitor of thickness of grid oxide layer can not be applicable to bigger supply voltage, easily cause unexpected leakage current excessive in the decoupling control circuit, make the problem of circuit performance deterioration.
At the problems referred to above, the invention provides a kind of semiconductor circuit, described semiconductor circuit is positioned on the semiconductor devices, the decoupling control circuit that comprises logical circuit and be used to protect described logical circuit.
With reference to figure 2, it has shown the decoupling control circuit synoptic diagram in one embodiment in the semiconductor circuit of the present invention.
As shown in Figure 2, described decoupling control circuit comprises first power end that is connected to the first supply voltage V1, the second source end that is connected to second source voltage V2, filter unit 21, control signal generation circuit 22 and isolation circuit.
Control signal generation circuit 22, be connected with filter unit 21, the filtering voltage V3 through Filtering Processing of unit 21 outputs is used to accept filter, and filtering voltage V3 and a default reference voltage REF compared, determine the value of the first enable signal EN and the second enable signal ENB of exporting according to described the two comparative result, wherein the first enable signal EN and the second enable signal ENB are anti-phase each other.
Described isolation circuit comprises the first decoupling branch road, the second decoupling branch road and the 3rd channel selector 27 between described first decoupling branch road and the described second decoupling branch road.
The described first decoupling branch road comprises first decoupling capacitor 23 and first channel selector 24 of connecting with first decoupling capacitor 23, first electrode of first decoupling capacitor 23 is connected with described first power end, and its second electrode is connected with an end of first channel selector 24, and the other end of first channel selector 24 is connected with described second source end.Especially, first channel selector 24 is controlled by the first enable signal EN and is realized break-make.In the present embodiment, when the first enable signal EN was high level, first channel selector 24 was open-minded; When the first enable signal EN was low level, first channel selector 24 turn-offed.
The described second decoupling branch road comprises alternate path switch 26 and second decoupling capacitor 25 of connecting with alternate path switch 26, one end of alternate path switch 26 is connected with described first power end, its other end is connected with first electrode of second decoupling capacitor 25, and second electrode of second decoupling capacitor 25 is connected with described second source end.Especially, alternate path switch 26 is controlled by the second enable signal ENB and is realized break-make.In the present embodiment, when the second enable signal ENB was low level, alternate path switch 26 was open-minded; When the second enable signal ENB was high level, alternate path switch 26 turn-offed.
The 3rd channel selector 27 is connected with second electrode of first decoupling capacitor 23 and first electrode of second decoupling capacitor 25.Especially, the 3rd channel selector 27 is subjected to the first enable signal EN and the second enable signal ENB to control the break-make that realizes first decoupling capacitor 23 and second decoupling capacitor 25.In the present embodiment, when the first enable signal EN is the low level and the second enable signal ENB when being high level, the 3rd channel selector 27 is open-minded; When the first enable signal EN is the high level and the second enable signal ENB when being low level, the 3rd channel selector 27 turn-offs.
With reference to figure 3, it has shown decoupling control circuit circuit diagram in one embodiment shown in Figure 2.
As shown in Figure 3, described decoupling control circuit comprises first power end that is connected to supply voltage VDD, second source end, filter unit, control signal generation circuit and the isolation circuit that is connected to ground voltage VSS.For ease of narration, follow-up, first power end that is connected to supply voltage VDD is called power voltage terminal, and the second source end that will be connected to ground voltage VSS is called ground voltage terminal.
In the present embodiment, described filter unit is a RC filtering circuit 31, comprise first resistance R 1, second resistance R 2 and the capacitor C, first end of first resistance R 1 is connected with described supply voltage, second end of first resistance R 1 is connected with first end of second resistance R 2, second end of second resistance R 2 is connected with described ground voltage terminal, and first end of capacitor C is connected with second end of first resistance R 1 and first end of second resistance R 2, and second end of capacitor C is connected with described ground voltage terminal.The ground connection effect of capacitor C is the high frequency waves that are used for the filtering corresponding frequencies; First resistance R 1 and second resistance R 2 not only play the dividing potential drop effect, reduce the amplitude of supply voltage, and second resistance R, 2 ground connection also can the filtering low frequency waves.In actual applications, the resistance of first resistance R 1 and second resistance R 2 can be identical, also can have certain size relation.Like this, but by RC filtering circuit 31 high frequency or the low frequency signal among the filter out power voltage VDD just, and the supply voltage by exporting after the Filtering Processing (follow-up, for convenience of description, the described voltage of exporting after Filtering Processing is called filtering voltage Vin) have more stable voltage, it is also littler to fluctuate.
Described control signal generation circuit comprises comparer 32, the first input end of comparer 32 (negative input end) is connected with second end of first resistance R 1 and first end of second resistance R 2, second input end (positive input terminal) of comparer 32 is connected with reference voltage REF, first output terminal of described comparer is exported the first enable signal EN, and second output terminal of described comparer is exported the second enable signal ENB.Described filtering voltage Vin and reference voltage REF that comparer 32 obtains after with RC filtering circuit 31 Filtering Processing compare, and according to definite first enable signal of being exported of described comparative result and the value of second enable signal, described first enable signal EN and the described second enable signal ENB are anti-phase each other.Specifically, at the filtering voltage Vin of described first input end during greater than the reference voltage REF of described second input end, the first enable signal EN of the described first output terminal output low level, the second enable signal ENB of described second output terminal output high level; When the filtering voltage Vin of described first input end is lower than the reference voltage REF of described second input end, the first enable signal EN of described first output terminal output high level, the second enable signal ENB of the described second output terminal output low level.
In addition, in the present embodiment, described reference voltage REF can be provided with adaptively according to the size of applied supply voltage in the semiconductor circuit.In actual applications, the proportionate relationship of first resistance R 1 in the RC filtering circuit 31 and second resistance R 2, reference voltage REF can set according to the power generation configuration environment of the applied semiconductor circuit of described decoupling control circuit.
Described isolation circuit comprises the first decoupling branch road, the second decoupling branch road and the 3rd channel selector between described first decoupling branch road and the described second decoupling branch road.
The described first decoupling branch road comprises that metal-oxide-semiconductor electric capacity 33 is connected with nmos pass transistor 34 as the metal-oxide-semiconductor electric capacity 33 of first decoupling capacitor with as the nmos pass transistor 34 of first channel selector.Particularly, the grid of metal-oxide-semiconductor electric capacity 33 is connected with described power voltage terminal, the source of metal-oxide-semiconductor electric capacity 33, drain electrode are connected with the drain electrode of nmos pass transistor 34, and the grid of nmos pass transistor 34 receives first enable signal, and the source electrode of nmos pass transistor 34 is connected with described ground voltage terminal.In the present embodiment, the thickness of grid oxide layer as the metal-oxide-semiconductor electric capacity 33 of first decoupling capacitor can have different selections according to the power generation configuration environment of the applied semiconductor circuit of described decoupling control circuit.
The described second decoupling branch road comprises that metal-oxide-semiconductor electric capacity 35 is connected with PMOS transistor 36 as the metal-oxide-semiconductor electric capacity 35 of second decoupling capacitor with as the PMOS transistor 36 of alternate path switch.Particularly, the grid of PMOS transistor 36 receives second enable signal, the source electrode of PMOS transistor 36 is connected with described power voltage terminal, and the drain electrode of PMOS transistor 36 is connected with the grid of metal-oxide-semiconductor electric capacity 35, and the source of metal-oxide-semiconductor electric capacity 35, drain electrode are connected with described ground voltage terminal.In the present embodiment, the thickness of grid oxide layer as the metal-oxide-semiconductor electric capacity 35 of second decoupling capacitor can have different selections according to the power generation configuration environment of the applied semiconductor circuit of described decoupling control circuit.
Described the 3rd channel selector is a cmos transmission gate 37, comprise symmetrically arranged nmos pass transistor 371 and PMOS transistor 372, the source electrode that is nmos pass transistor 371 is connected as an end with the source electrode of PMOS transistor 372, the drain electrode of nmos pass transistor 371 is connected as the other end with the drain electrode of PMOS transistor 372, one end of cmos transmission gate 37 is connected with source, drain electrode as the metal-oxide-semiconductor electric capacity 33 of first decoupling capacitor, and its other end then is connected with grid as the metal-oxide-semiconductor electric capacity 35 of second decoupling capacitor.In addition, cmos transmission gate 37 is controlled by the first enable signal EN and the second enable signal ENB, and particularly, the grid of nmos pass transistor 371 wherein receives the second enable signal ENB, and the grid of PMOS transistor 372 receives the first enable signal EN.
For decoupling control circuit shown in Figure 3, when supply voltage VDD is different size, can make corresponding on-off action as the metal-oxide-semiconductor and/or the cmos transmission gate of channel selector, make two decoupling capacitors 33,35 realize the circuit connecting form of serial or parallel connection.Particularly, when the supply voltage VDD of described power voltage terminal is high voltage, be transferred to the first input end of comparer 32 through the filtered filtering voltage Vin of RC filtering circuit, through relatively finding, because the filtering voltage Vin of first input end is greater than the reference voltage REF of second input end, therefore the first enable signal EN of comparer 32 outputs is a low level, and the second enable signal ENB of output is a high level; Turn-offed by the nmos pass transistor 34 of first enable signal EN control, turn-offed by the PMOS transistor 36 of second enable signal ENB control, the cmos transmission gate 37 that is subjected to first enable signal EN control PMOS transistor 372 and constituted by second enable signal ENB control nmos pass transistor 371 is open-minded; Like this, be series between described power voltage terminal and the described ground voltage terminal, can satisfy high-tension reliability requirement as the metal-oxide-semiconductor electric capacity 33 of first decoupling capacitor with as the metal-oxide-semiconductor electric capacity 35 of second decoupling capacitor.
In like manner, when the supply voltage VDD of described power voltage terminal is low-voltage, be transferred to the first input end of comparer 32 through the filtered filtering voltage Vin of RC filtering circuit, through relatively finding, because the filtering voltage Vin of first input end is less than the reference voltage REF of second input end, therefore the first enable signal EN of comparer 32 outputs is for just, and the second enable signal ENB of output is for bearing; Be subjected to the nmos pass transistor 34 of first enable signal EN control open-minded, be subjected to the PMOS transistor 36 of second enable signal ENB control open-minded, the cmos transmission gate that is subjected to first enable signal EN control PMOS transistor 372 and constituted by second enable signal ENB control nmos pass transistor 371 turn-offs; Like this, has the first decoupling branch road conducting as the metal-oxide-semiconductor electric capacity 33 of first decoupling capacitor, has the second decoupling branch road conducting as the metal-oxide-semiconductor electric capacity 35 of second decoupling capacitor, described first decoupling branch road and the described second decoupling branch road are parallel between described power voltage terminal and the described ground voltage terminal, can guarantee that isolation circuit has higher sensitivity.
Decoupling control circuit of the present invention, be provided with two decoupling capacitors and a plurality of channel selector, can control opening and/or turn-offing of described each channel selector according to the size of supply voltage, realize the series connection (when supply voltage is higher) or the parallel connection (when supply voltage is low) of described two decoupling capacitors.When the grid oxic horizon of two decoupling capacitors approached, described decoupling control circuit can not only be applicable to the situation of different electrical power voltage, has improved the decoupling efficient of decoupling control circuit, also has higher sensitivity.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize the method and the technology contents of above-mentioned announcement that technical solution of the present invention is made possible change and modification; therefore; every content that does not break away from technical solution of the present invention; to any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection domain of technical solution of the present invention according to technical spirit of the present invention.
Claims (9)
1. a decoupling control circuit is characterized in that, comprising:
Be connected to first power end and the second source end that is connected to second source voltage of first supply voltage;
Control signal generation circuit, be connected with described first power end, be used for first supply voltage and the reference voltage of described first power end are compared, and according to definite first enable signal of being exported of described comparative result and the value of second enable signal, described first enable signal and described second enable signal are anti-phase each other;
Isolation circuit comprises the first decoupling branch road with first decoupling capacitor and first channel selector, the second decoupling branch road with second decoupling capacitor and alternate path switch and the 3rd channel selector between described first decoupling branch road and the described second decoupling branch road;
Described first decoupling capacitor and described first channel selector are series between described first power end and the described second source end, and described first channel selector is controlled by described first enable signal and realized break-make;
Described second decoupling capacitor and described alternate path switch series are coupled between described first power end and the described second source end, and described alternate path switch is controlled by described second enable signal and realized break-make;
Described the 3rd channel selector is connected with second electrode of described first decoupling capacitor and first electrode of described second decoupling capacitor, and described the 3rd channel selector is subjected to described first enable signal and described second enable signal to control the break-make that realizes described first decoupling capacitor and described second decoupling capacitor.
2. decoupling control circuit as claimed in claim 1 is characterized in that, also comprises filter unit, and described filter unit is used for first supply voltage of described first power end is carried out exporting described control signal generation circuit to after the filtering.
3. decoupling control circuit as claimed in claim 2, it is characterized in that, described filter unit is the RC filtering circuit, comprise first resistance, second resistance and electric capacity, first end of described first resistance is connected with described first power end, second end of described first resistance is connected with first end of described second resistance, second end of described second resistance is connected with described second source end, first end of described electric capacity is connected with first end of second end of described first resistance and described second resistance, second end of described electric capacity is connected with described second source end, and second end of described first resistance is as the output terminal of filtering signal.
4. decoupling control circuit as claimed in claim 3, it is characterized in that, described control signal generation circuit comprises comparer, the first input end of described comparer is connected with the output terminal of described filter unit, second input end of described comparer is connected with reference voltage, first output terminal of described comparer is exported first enable signal, and second output terminal of described comparer is exported second enable signal;
At the voltage of described first input end during greater than the voltage of described second input end, first enable signal of the described first output terminal output low level, second enable signal of described second output terminal output high level;
When the voltage of described first input end is lower than the voltage of described second input end, first enable signal of described first output terminal output high level, second enable signal of the described second output terminal output low level.
5. decoupling control circuit as claimed in claim 1 is characterized in that, described first decoupling capacitor is a metal-oxide-semiconductor electric capacity, and described first channel selector is a nmos pass transistor; Grid as the described metal-oxide-semiconductor electric capacity of first decoupling capacitor is connected with first power end, source, drain electrode as the described metal-oxide-semiconductor electric capacity of first decoupling capacitor are connected with the drain electrode of described the 3rd channel selector and described nmos pass transistor, the grid of described nmos pass transistor receives first enable signal, and the source electrode of described nmos pass transistor is connected with described second source end.
6. decoupling control circuit as claimed in claim 1 is characterized in that, described alternate path switch is the PMOS transistor, and described second decoupling capacitor is a metal-oxide-semiconductor electric capacity; The transistorized grid of described PMOS receives second enable signal, the transistorized source electrode of described PMOS is connected with described first power end, described PMOS transistor drain is connected with described the 3rd channel selector with grid as the described metal-oxide-semiconductor electric capacity of second decoupling capacitor, is connected with described second source end as source, the drain electrode of the described metal-oxide-semiconductor electric capacity of second decoupling capacitor.
7. decoupling control circuit as claimed in claim 1, it is characterized in that, described the 3rd channel selector is a cmos transmission gate, comprise symmetrically arranged nmos pass transistor and PMOS transistor, the two ends of described cmos transmission gate are connected with second electrode of described first decoupling capacitor and first electrode of described second decoupling capacitor respectively.
8. decoupling control circuit as claimed in claim 1 is characterized in that, first supply voltage is a supply voltage, and described second source voltage is ground voltage.
9. one kind comprises as the semiconductor circuit of decoupling control circuit as described in arbitrary in the claim 1～8, and it is characterized in that described semiconductor circuit also comprises logical circuit, described logical circuit is between described first power end and described second source end.
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| CN111524541A (en) * | 2019-02-05 | 2020-08-11 | 美光科技公司 | Dynamic allocation of capacitive components in a memory device |
| US11599474B2 (en) | 2019-02-25 | 2023-03-07 | Micron Technology, Inc. | Stacked memory dice for combined access operations |
| CN109900987B (en) * | 2019-03-13 | 2021-08-17 | 上海市计量测试技术研究院 | Multifunctional decoupling network |
| CN109900987A (en) * | 2019-03-13 | 2019-06-18 | 上海市计量测试技术研究院 | A kind of multi-functional decoupling network |
| CN111091862A (en) * | 2019-11-13 | 2020-05-01 | 杭州电子科技大学 | Nonvolatile programmable energy storage element array management system based on magnetic tunnel junction |
| CN111091862B (en) * | 2019-11-13 | 2022-02-11 | 杭州电子科技大学 | Nonvolatile programmable energy storage element array management system based on magnetic tunnel junction |
| CN112995817A (en) * | 2019-12-17 | 2021-06-18 | 纬创资通股份有限公司 | Microphone device, telephone device and decoupling circuit |
| CN112995817B (en) * | 2019-12-17 | 2022-09-23 | 纬创资通股份有限公司 | Microphone device, telephone device and decoupling circuit |
| CN112702050A (en) * | 2020-12-28 | 2021-04-23 | 海光信息技术股份有限公司 | Integrated circuit chip and electronic device |
| CN113394213A (en) * | 2021-06-10 | 2021-09-14 | 海光信息技术股份有限公司 | Integrated circuit chip and operation method thereof |
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