CN102298891B - Method for testing signal transmission line, integrated circuit and display panel module - Google Patents
Method for testing signal transmission line, integrated circuit and display panel module Download PDFInfo
- Publication number
- CN102298891B CN102298891B CN201110212300.2A CN201110212300A CN102298891B CN 102298891 B CN102298891 B CN 102298891B CN 201110212300 A CN201110212300 A CN 201110212300A CN 102298891 B CN102298891 B CN 102298891B
- Authority
- CN
- China
- Prior art keywords
- signal
- output terminal
- logic gate
- integrated circuit
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 74
- 230000008054 signal transmission Effects 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims abstract description 14
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims 1
- 230000005540 biological transmission Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- 241001417495 Serranidae Species 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- GRPQBOKWXNIQMF-UHFFFAOYSA-N indium(3+) oxygen(2-) tin(4+) Chemical class [Sn+4].[O-2].[In+3] GRPQBOKWXNIQMF-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a method for testing a signal transmission line, an integrated circuit and a display panel module. The integrated circuit includes a plurality of contacts, a logic gate group and an output unit. The plurality of contacts are respectively connected to a plurality of external signal transmission lines; the logic gate group is provided with a plurality of input ends which are respectively coupled with the plurality of contacts under a test mode; the output unit is coupled to at least one output end of the logic gate group and used for generating at least one test result signal according to at least one output signal of the logic gate group and transmitting the at least one test result signal to an output end of the integrated circuit so as to judge the electrical connection state of the plurality of external signal transmission lines.
Description
Technical field
The present invention relates to a kind of method of the electric connection state that is used for multiple signal transmssion lines of linking on test panel, espespecially a kind of utilization is made in logic gate group in integrated circuit and comes the method for the electric connection state of multiple signal transmssion lines on test panel.
Background technology
In panel module, digital signal can be produced by control panel, and through multiple signal transmssion lines, digital signal is sent to the drive integrated circult on panel, but, on signal transmssion line, may have and open circuit or the generation of the situation of short circuit, therefore,, before panel module dispatches from the factory, need to test to judge that whether signal transmssion line is normal.In general, conventionally need to can judge on signal transmssion line whether have and open circuit or short circuit by actual operation, but, if show that the quantity of data is too huge, open circuit or short circuit is difficult to be found, therefore can really detect the problem of signal transmssion line, and make defective products flow out to client.
Summary of the invention
Therefore, one of object of the present invention is to provide a kind of method of the electric connection state that is used for testing the multiple signal transmssion lines that link on a panel and relevant integrated circuit and display module, to solve the above problems.
According to one embodiment of the invention, an integrated circuit includes multiple contacts, a logic gate group and an output unit.The plurality of contact is connected to respectively multiple external signal transmission lines; This logic gate group has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; This output unit is coupled at least one output terminal of this logic gate group, and at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of external signal transmission line.
According to another embodiment of the present invention, a display module includes a panel and an integrated circuit, wherein on this panel, is linked with multiple signal transmssion lines, and this integrated circuit includes multiple contacts, a logic gate group and an output unit.The plurality of contact is connected to respectively multiple signal transmssion lines; This logic gate group has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; This output unit is coupled at least one output terminal of this logic gate group, and at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of signal transmssion line.
According to another embodiment of the present invention, a kind of method of the electric connection state that is used for testing the multiple signal transmssion lines that link on a panel, include: an integrated circuit is provided, and wherein this integrated circuit includes: multiple contacts, are connected to respectively multiple signal transmssion lines; One logic gate group, has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; An and output unit, be coupled at least one output terminal of this logic gate group, at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of signal transmssion line; And under a test pattern: the plurality of input end of this logic gate group is respectively coupled to the plurality of contact; One first group of test signal is inputed to the plurality of signal transmssion line; After this first test signal inputs to the plurality of signal transmssion line, measure this output terminal of this integrated circuit to obtain one first test result; One second group of test signal is inputed to the plurality of signal transmssion line; After this second test signal inputs to the plurality of signal transmssion line, measure this output terminal of this integrated circuit to obtain one second test result; And according to this first test result and this second test result to judge the electric connection state of the plurality of signal transmssion line.
Beneficial effect of the present invention is to judge by being arranged at a logic gate group in drive integrated circult the electric connection state of signal transmssion line, can very simply test and only need the very short test duration, thereby be convenient to production line operation, and do not need extra checkout equipment, can reduce testing cost.
Accompanying drawing explanation
Fig. 1 is the schematic diagram according to the display module of one embodiment of the invention;
Fig. 2 is the schematic diagram according to the drive integrated circult of the present invention one first embodiment;
Fig. 3 (A) and Fig. 3 (B) open circuit and the schematic diagram of short circuit for signal transmssion line;
Fig. 4 for when signal transmssion line, occur as Fig. 3 (A) and Fig. 3 (B) open circuit and during short circuit condition, the schematic diagram of the received digital signal of drive integrated circult;
Fig. 5 is the schematic diagram according to the drive integrated circult of the present invention one second embodiment.
Wherein, Reference numeral
100 display module 120,200,500 drive integrated circults
130 flexible circuit board 210,510 multiplexers
220,520 logic gate groups
222,224,226,228,522,524,526,528 XOR gate
229 or door 230,530 output units
532,534,536,538 output subelement P1～PM contacts
L1～LM signal transmssion line DB0～DBN digital signal
Embodiment
Please refer to Fig. 1, Fig. 1 is the schematic diagram according to the display module 100 of one embodiment of the invention.As shown in Figure 1, display module 100 includes panel 110, drive integrated circult 120 and flexible circuit board (Flexible Printed Circuit, FPC) 130, wherein flexible circuit board 130 is pressed together on panel 110, and panel 110 is linked with M bars transmission line L1～LM, that is M bars transmission line L1～LM includes the signal transmssion line on many tin indium oxides (Indium Tin Oxide, ITO) signal transmssion line and the flexible circuit board 130 being made on panel 110.In addition, drive integrated circult 120 has M the contact P1～PM that is connected in many barss transmission line L1～LM, and wherein M is greater than 1 positive integer.
Please refer to Fig. 2, Fig. 2 is the schematic diagram according to the drive integrated circult 200 of the present invention one first embodiment.As shown in Figure 2, drive integrated circult 200 includes multiplexer 210, logic gate group 220 and output unit 230, wherein multiplexer 210 has two output terminal OUT_1 and OUT_2, and output terminal OUT_1 is connected to the operation element of drive integrated circult 200 when normal running, and output terminal OUT_2 is connected to the input end of logic gate group 220; In addition, logic gate group 220 includes four XOR gate (XOR gate) 222～228 and one or (an OR gate) 229.In the following explanation about drive integrated circult 200, hypothesis driven integrated circuit 200 receives from multiple contact P1～P8 the digital signal DB0～DB7 transmitting through many barss transmission line L1～L8 respectively, but, the bit number of the quantity of contact and signal transmssion line and digital signal is only an example explanation, and not as restriction of the present invention.
In the operation of drive integrated circult 200, first, multiplexer 210 in drive integrated circult 200 receives from multiple contact P1～P8 the digital signal DB0～DB7 transmitting through many barss transmission line L1～L8 respectively, now, the control of multiplexer 210 by a control signal Vc is to be switched to a test pattern, that is multiplexer 210 can be sent to received digital signal DB0～DB7 the input end of four XOR gate 222～228 through output terminal OUT_2.
Then, four XOR gate 222～228 are carried out logical operation to digital signal DB0～DB7 respectively, and or the output signal of 229 pairs of XOR gate 222～228 of door carry out logical operation to produce output signal Dout.Finally, output unit 230 receives output signal Dout and produces test result Dout ', and test result Dout ' is sent to and outside for judging whether signal transmssion line L1～L8 has, is opened circuit or short circuit by a contact of drive integrated circult 200.
Specifically, drive integrated circult 200 can receive two groups of different digital signal DB0～DB7, and according to the output signal Dout that corresponds to these two groups of different digital signal DB0～DB7, judge whether signal transmssion line L1～L8 has and open circuit or short circuit, wherein these two groups of different digital signal DB0～DB7 are respectively " 10101010 " and " 01010101 ".When digital signal DB0～DB7 is respectively " 10101010 " and " 01010101 ", and or door 229 output signal Dout when being " 0 ", the electric connection state of representation signal transmission line L1～L8 normal (not opening circuit or short circuit); And if or door 229 output signal Dout when being once " 1 ", representation signal transmission line L1～L8 has and opens circuit or short circuit.
For instance, with reference to figure 3(A) and Fig. 3 (B) and Fig. 4, suppose to occur as the situation that opens circuit of Fig. 3 (A) (signal transmssion line L2 and L5 open circuit) as signal transmssion line L1～L8, after digital signal " 10101010 " and " 01010101 " successively input to signal transmssion line L1～L8, voltage potential (that is the received digital signal DB0～DB7 of drive integrated circult 200) on the contact P1～P8 of drive integrated circult 200 is respectively " 10100010 " and " 00010101 " (referring to Fig. 4), therefore, the output signal Dout of logic gate group 220 is " 1 ", on the other hand, suppose to occur as the short circuit condition of Fig. 3 (B) (being short-circuited between signal transmssion line L1 and L2 and between L4 and L5) as signal transmssion line L1～L8, after digital signal " 10101010 " and " 01010101 " successively input to signal transmssion line L1～L8, voltage potential (that is the received digital signal DB0～DB7 of drive integrated circult 200) on the contact P1～P8 of drive integrated circult 200 is respectively " 11111010 " and " 11011101 " (referring to Fig. 4), therefore, the output signal Dout of logic gate group 220 is " 1 ".
As mentioned above, as long as have short circuit or the situation opening circuit to occur on signal transmssion line L1～L8, the output signal Dout of logic gate group 220 will be " 1 ", therefore, as long as the voltage potential of the output signal Dout of decision logic door group 220 just can be learnt the electric connection state on signal transmssion line L1～L8 easily.In addition, above-mentioned detection mode simply and only needs the very short test duration, is therefore convenient to produce line operation, and does not need extra checkout equipment, can reduce testing cost.
In addition, above-mentionedly about the drive integrated circult 200 shown in Fig. 2, only can judge on signal transmssion line L1～L8 and have short circuit or the situation opening circuit, utilize which bars transmission line of can also further judging of the present invention to have the problem on electric connection state.Fig. 5 is the schematic diagram according to the drive integrated circult 500 of the present invention one second embodiment.As shown in Figure 5, drive integrated circult 500 includes multiplexer 510, logic gate group 520 and output unit 530, wherein multiplexer 510 has two output terminal OUT_1 and OUT_2, and output terminal OUT_1 is connected to the operation element of drive integrated circult 500 when normal running, and output terminal OUT_2 is connected to the input end of logic gate group 520; In addition, logic gate group 520 includes four XOR gate (XOR gate) 522～528, and output unit 530 includes four output subelements 532～538.In the following explanation about drive integrated circult 500, hypothesis driven integrated circuit 500 receives from multiple contact P1～P8 the digital signal DB0～DB7 transmitting through many barss transmission line L1～L8 respectively, but this is only an example explanation, and not as restriction of the present invention.
In the operation of drive integrated circult 500, first, multiplexer 510 in drive integrated circult 500 receives from multiple contact P1～P8 the digital signal DB0～DB7 transmitting via many barss transmission line L1～L8 respectively, now, the control of multiplexer 510 by a control signal Vc is to be switched to a test pattern, that is multiplexer 510 can be sent to received digital signal DB0～DB7 the input end of four XOR gate 522～528 via output terminal OUT_2.
Then, four XOR gate 522～528 are carried out logical operation to digital signal DB0～DB7 respectively, to produce four output signal Dout1～Dout4.Finally, four output subelements 532～538 receive respectively four output signal Dout1～Dout4 and produce four test result Dout1 '～Dout4 ', and four test result Dout1 '～Dout4 ' are sent to and outside for judging whether signal transmssion line L1～L8 has, are opened circuit or short circuit by least one contact of drive integrated circult 500.
Specifically, drive integrated circult 500 can receive two groups of different digital signal DB0～DB7, and according to the output signal Dout that corresponds to these two groups of different digital signal DB0～DB7, judge whether signal transmssion line L1～L8 has and open circuit or short circuit, wherein these two groups of different digital signal DB0～DB7 are respectively " 10101010 " and " 01010101 ", and when digital signal DB0～DB7 is respectively " 10101010 " and " 01010101 ", when output signal Dout1～Dout4 is " 0 ", the electric connection state of representation signal transmission line L1～L8 normal (not opening circuit or short circuit), if and have one of them output signal Dout1～Dout4 once for " 1 " time, representing that corresponding signal transmssion line has opens circuit or short circuit.For instance, the value of supposing output signal Dout1 is " 1 ", representation signal transmission line L1 or L2 one of them have and open circuit or short circuit.
In addition, should be noted, above-mentioned relevant drive integrated circult 200 and drive integrated circult 500 all suppose to only have 8 stroke numeral data, but, in other embodiments of the invention, can receive many stroke numerals data by multiple signal transmssion lines, because those of ordinary skills can be applied to the present invention easily according to the instruction of above-described embodiment, therefore details repeats no more.
Concise and to the point conclusion the present invention, in the method for a kind of electric connection state that is used for testing the multiple signal transmssion lines that link on a panel of the present invention and relevant integrated circuit and display module, by being arranged at a logic gate group in drive integrated circult, judge the electric connection state of signal transmssion line, thus, can very simply test and only need the very short test duration, therefore be convenient to production line operation, and do not need extra checkout equipment, can reduce testing cost.
Certainly; the present invention also can have other various embodiments; in the situation that not deviating from spirit of the present invention and essence thereof; those of ordinary skill in the art are when making according to the present invention various corresponding changes and distortion, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (16)
1. an integrated circuit, is characterized in that, includes:
Multiple contacts, are connected to respectively multiple external signal transmission lines;
One logic gate group, has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; And
One output unit, be coupled at least one output terminal of this logic gate group, at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of external signal transmission line;
One multiplexer, there is one first output terminal and one second output terminal, this first output terminal is connected to the operation element of this integrated circuit when a normal mode, this the second output terminal is connected to the input end of this logic gate group, and the switching between this normal mode and this test pattern realizes by a control signal.
2. integrated circuit according to claim 1, is characterized in that, this logic gate group includes:
Multiple XOR gate, its input end is respectively coupled to the plurality of contact; And
One or door, wherein should or an input end of door be electrically connected at multiple output terminals of the plurality of XOR gate, and should or an output terminal of door as this output terminal of this logic gate group.
3. integrated circuit according to claim 1, is characterized in that, this logic gate group has multiple output terminals, and this logic gate group includes:
Multiple XOR gate, wherein multiple input ends of the plurality of XOR gate are respectively coupled to the plurality of contact, and multiple output terminals of the plurality of XOR gate are as the plurality of output terminal of this logic gate group.
4. integrated circuit according to claim 3, is characterized in that, this output unit includes:
Multiple output subelements, be respectively coupled to the plurality of output terminal of the plurality of XOR gate, wherein each output signal of exporting the corresponding XOR gate of subelement foundation is to produce a corresponding test result signal, and this corresponding test result signal is sent to an output terminal of this integrated circuit, for judgement, be coupled to the electric connection state of the external signal transmission line of this corresponding XOR gate.
5. integrated circuit according to claim 1, is characterized in that, this integrated circuit is the drive integrated circult that is applied to a display panel.
6. a display module, is characterized in that, includes:
One panel, is connected to multiple signal transmssion lines on it; And
One integrated circuit, wherein this integrated circuit includes: multiple contacts, are connected to respectively multiple signal transmssion lines; One logic gate group, has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; An and output unit, be coupled at least one output terminal of this logic gate group, at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of signal transmssion line;
One multiplexer, there is one first output terminal and one second output terminal, this first output terminal is connected to the operation element of this integrated circuit when a normal mode, this the second output terminal is connected to the input end of this logic gate group, and the switching between this normal mode and this test pattern realizes by a control signal.
7. display module according to claim 6, is characterized in that, this logic gate group includes:
Multiple XOR gate, its input end is respectively coupled to the plurality of contact; And
One or door, wherein should or an input end of door be electrically connected at multiple output terminals of the plurality of XOR gate, and should or an output terminal of door as this output terminal of this logic gate group.
8. display module according to claim 6, is characterized in that, this logic gate group has multiple output terminals, and this logic gate group includes:
Multiple XOR gate, wherein multiple input ends of the plurality of XOR gate are respectively coupled to the plurality of contact, and multiple output terminals of the plurality of XOR gate are as the plurality of output terminal of this logic gate group.
9. display module according to claim 8, is characterized in that, this output unit includes:
Multiple output subelements, be respectively coupled to the plurality of output terminal of the plurality of XOR gate, wherein each output signal of exporting the corresponding XOR gate of subelement foundation is to produce a corresponding test result signal, and this corresponding test result signal is sent to an output terminal of this integrated circuit, for judgement, be coupled to the electric connection state of the external signal transmission line of this corresponding XOR gate.
10. display module according to claim 6, is characterized in that, this integrated circuit is the drive integrated circult that is applied to a display panel.
11. display modules according to claim 6, is characterized in that, the plurality of signal transmssion line includes many tin indium oxide signal transmssion lines that are made on panel.
12. display modules according to claim 6, is characterized in that, the plurality of signal transmssion line includes the signal transmssion line on the flexible circuit board being pressed on panel.
13. 1 kinds of methods that are used for the electric connection state of testing the multiple signal transmssion lines that link on a panel, is characterized in that, include:
One integrated circuit is provided, and wherein this integrated circuit includes: multiple contacts, are connected to respectively multiple signal transmssion lines;
One logic gate group, has multiple input ends, and it is respectively coupled to the plurality of contact under a test pattern; And
One output unit, be coupled at least one output terminal of this logic gate group, at least one output signal being used for according to this logic gate group is to produce at least one test result signal, and this at least one test result signal is sent to an output terminal of this integrated circuit, for the electric connection state that judges the plurality of signal transmssion line; And
Under a test pattern:
1) the plurality of input end of this logic gate group is respectively coupled to the plurality of contact;
2) one first group of test signal is inputed to the plurality of signal transmssion line;
3), after this first group of test signal inputs to the plurality of signal transmssion line, measure this output terminal of this integrated circuit to obtain one first test result;
4) one second group of test signal is inputed to the plurality of signal transmssion line;
5), after this second group of test signal inputs to the plurality of signal transmssion line, measure this output terminal of this integrated circuit to obtain one second test result; And
6) according to this first test result and this second test result to judge the electric connection state of the plurality of signal transmssion line;
One multiplexer, there is one first output terminal and one second output terminal, this first output terminal is connected to the operation element of this integrated circuit when a normal mode, this the second output terminal is connected to the input end of this logic gate group, and the switching between this normal mode and this test pattern realizes by a control signal.
14. methods according to claim 13, is characterized in that, this logic gate group includes:
Multiple XOR gate, its input end is respectively coupled to the plurality of contact; And
One or door, wherein should or an input end of door be electrically connected at multiple output terminals of the plurality of XOR gate, and should or an output terminal of door as this output terminal of this logic gate group; And
The method separately includes: when this first group of test signal inputs to the plurality of signal transmssion line, a first input end of each XOR gate and one second input end receive respectively a logical zero signal and a logical one signal; And when this second group of test signal inputs to the plurality of signal transmssion line, this first input end of each XOR gate and this second input end receive respectively a logical one signal and a logical zero signal.
15. methods according to claim 13, is characterized in that, this logic gate group has multiple output terminals, and this logic gate group includes:
Multiple XOR gate, wherein multiple input ends of the plurality of XOR gate are respectively coupled to the plurality of contact, and multiple output terminals of the plurality of XOR gate are as the plurality of output terminal of this logic gate group; And
The method separately includes: when this first group of test signal inputs to the plurality of signal transmssion line, a first input end of each XOR gate and one second input end receive respectively a logical zero signal and a logical one signal; And when this second group of test signal inputs to the plurality of signal transmssion line, this first input end of each XOR gate and this second input end receive respectively a logical one signal and a logical zero signal.
16. methods according to claim 13, is characterized in that, this integrated circuit is the drive integrated circult that is applied to a display panel.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100104756A TWI502207B (en) | 2011-02-14 | 2011-02-14 | Method for testing electrical connection status of a plurality of data lines connected to a panel and associated integrated circuit and display panel module |
| TW100104756 | 2011-02-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102298891A CN102298891A (en) | 2011-12-28 |
| CN102298891B true CN102298891B (en) | 2014-04-16 |
Family
ID=45359279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110212300.2A Expired - Fee Related CN102298891B (en) | 2011-02-14 | 2011-07-22 | Method for testing signal transmission line, integrated circuit and display panel module |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102298891B (en) |
| TW (1) | TWI502207B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104952382A (en) * | 2014-03-24 | 2015-09-30 | 昆达电脑科技(昆山)有限公司 | Transmission before-after comparison device for images of liquid crystal display television |
| US10473717B2 (en) * | 2016-11-09 | 2019-11-12 | Texas Instruments Incorporated | Methods and apparatus for test insertion points |
| CN107274820B (en) * | 2017-07-24 | 2020-11-27 | 京东方科技集团股份有限公司 | Test circuit, test method thereof and display panel |
| CN109738750B (en) * | 2019-01-08 | 2021-05-18 | 京东方科技集团股份有限公司 | Chip, chip assembly, test method of chip assembly and display assembly |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200965682Y (en) * | 2006-11-07 | 2007-10-24 | 英业达股份有限公司 | Mainboard data signal display device |
| CN201251781Y (en) * | 2008-07-23 | 2009-06-03 | 英业达科技有限公司 | Signal measuring device |
| CN101707432A (en) * | 2006-08-22 | 2010-05-12 | 株式会社日立制作所 | Electric power switching device and its abnormal test method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6334219B1 (en) * | 1994-09-26 | 2001-12-25 | Adc Telecommunications Inc. | Channel selection for a hybrid fiber coax network |
| TWI375806B (en) * | 2007-08-07 | 2012-11-01 | Himax Tech Ltd | Apparatus for testing driving circuit in display |
-
2011
- 2011-02-14 TW TW100104756A patent/TWI502207B/en not_active IP Right Cessation
- 2011-07-22 CN CN201110212300.2A patent/CN102298891B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101707432A (en) * | 2006-08-22 | 2010-05-12 | 株式会社日立制作所 | Electric power switching device and its abnormal test method |
| CN200965682Y (en) * | 2006-11-07 | 2007-10-24 | 英业达股份有限公司 | Mainboard data signal display device |
| CN201251781Y (en) * | 2008-07-23 | 2009-06-03 | 英业达科技有限公司 | Signal measuring device |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI502207B (en) | 2015-10-01 |
| CN102298891A (en) | 2011-12-28 |
| TW201234022A (en) | 2012-08-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102298891B (en) | Method for testing signal transmission line, integrated circuit and display panel module | |
| CN102346597B (en) | Method for judging touch position of touch panel | |
| CN102412909B (en) | Fault injection equipment | |
| KR101583177B1 (en) | Gate driving circuit and array substrate | |
| CN106098007B (en) | Liquid crystal display panel and its control method | |
| CN114113989B (en) | DFT test device, test system and test method | |
| CN103389455B (en) | The detection system of driving chip and detection method | |
| CN103543892A (en) | Sensing circuit, touch module, electronic device and control method | |
| CN104916243A (en) | Detection method and device for scan driving circuit and liquid crystal panel | |
| CN101231834B (en) | Driver and driving method, and display device | |
| CN103676940A (en) | Function detection system and method for digital control panel | |
| CN109683593A (en) | A kind of impulse type servo-driver Basic function testing method and apparatus | |
| CN101419580B (en) | Multi-load topological structure | |
| CN104575385A (en) | Organic light emitting display device array substrate and detecting method | |
| CN111263138B (en) | LVDS digital video fault automatic detection system and implementation method thereof | |
| CN104678983A (en) | Traction control unit self-detection circuit | |
| CN116449134A (en) | Method and system for acquiring fault information of photovoltaic inverter | |
| CN114301526A (en) | PXIe-based one-to-many optical fiber communication board card | |
| CN101938266A (en) | Semiconductor device and the method that removes the semiconductor device noise | |
| CN211263672U (en) | Universal automatic cable testing system based on CPCI bus | |
| CN114448854A (en) | Communication link operation characteristic test system and test method | |
| CN103064498B (en) | The power supply supply overload protection of server and method | |
| CN112422954A (en) | LVDS video acquisition, detection and transmission system and method | |
| CN105467234A (en) | Cell set voltage acquisition board tool tester | |
| CN111402770A (en) | Testing device of display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140416 Termination date: 20200722 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |