CN102291062A - High-accuracy multi-motor control method based on FPGA (Field Programmable Gate Array) - Google Patents
High-accuracy multi-motor control method based on FPGA (Field Programmable Gate Array) Download PDFInfo
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Abstract
The invention relates to a high-accuracy multi-motor control method, in particular to a high-accuracy multi-motor control method based on FPGA (Field Programmable Gate Array), belonging to the field of motor control. A control system comprises an embedded type CPU (Central Processing Unit) soft core, motor control modules and a motor control external driver interface, wherein the motor control modules are realized by adopting hardware logic; and the motor control external driver interface accords with an avalon bus protocol and is connected with a CPU and the motor control module. The high-accuracy multi-motor control method disclosed by the invention has the advantages of accurate measurement, real-time control and miniaturization; according to the high-accuracy multi-motor control method disclosed by the invention, the number of motor control modules is regulated according to the number of motors which need to be controlled, the parameters of the motor control modules are configured according to the kinds and the characteristics of the motors, an external module of the embedded type CPU is configured according to the additional functions of a system, and all control functions of the system can be realized on an FPGA chip in a concentrating way.
Description
Technical field
The invention belongs to Motor Control Field, the many motor control methods of particularly a kind of high accuracy.
Technical background
Present widely used electric machine controller is based on the MCU/DSP design mostly, has disposed the Electric Machine Control special instruction among some MCU and the DSP, interface and peripheral hardware, and it is comparatively convenient to use.But, still need a large amount of peripheral logical circuits to expand its hardware capability in the practical application, and a control chip often have only one to two-way Electric Machine Control interface, the occasion of controlling simultaneously at many motors, system needs a plurality of control chips, and the cost of control system and volume all can increase like this.In addition, the peripheral hardware of MCU and DSP is fixed, and underlying algorithm can not be optimized.
The scheme of the embedded soft nuclear of FPGA can solve the problem that special chip peripheral hardware and port are restricted, but the characteristics that the program serial is carried out have determined the real-time that will have influence on computing that increases of software function.
Two following patents are the patents similar with this patent that search on the China national patent network.
200610041551.8, mention the scheme that adopts hardware logic module closed-loop control direct current machine based on the DC motor controller of FPGA.
Here make a concrete analysis of the weak point of above mentioned patent:
200610041551.8 patent adopts traditional M algorithm code-disc signal novel sampling to be measured the speed of motor, this patent improves the M algorithm, under the code-disc physical accuracy does not become condition, improved code-disc signals sampling precision from algorithm, thereby reduced hardware cost.
200610041551.8 patent mentions that the function of part Electric Machine Control adopts hardware logic to realize, the motor closed-loop control repertoire of this patent all adopts hardware logic to realize, encapsulation property is better, is applicable to many motor movement control occasions.
Summary of the invention
The purpose of this invention is to provide a kind ofly can accurately measure, many motor control methods of control in real time and miniaturization.This method can be controlled the quantity of how much regulating motor control module of number of motors as required; According to the kind of motor and the parameter of characteristics configuration motor control module; According to the peripheral module of the additional functional configuration embedded type CPU of system, all controlled function of system all can concentrate on the fpga chip and realize.
Concrete technical scheme of the present invention is as follows:
The present invention is the many motor control methods of a kind of high accuracy based on FPGA, it is characterized in that, control system comprises the soft nuclear of embedded type CPU, adopts the motor control module of hardware logic realization, meets the Electric Machine Control peripheral hardware driving interface of the connection CPU and the motor control module of avalon bus protocol.
As a kind of improvement, the soft nuclear of embedded type CPU of the present invention is responsible for communicating with host computer, calculates the speed setting value of each motor, and gives motor control module with result of calculation by Electric Machine Control peripheral hardware driving interface assignment; Motor control module comprises that input signal filtering submodule, high precision velocity measurement submodule, PI operator module, PWM modulate submodule, overcurrent protection submodule and brshless DC motor commutation submodule, motor control module mainly is responsible for detecting the actual speed when front motor, and carry out the PI computing with the speed that the soft nuclear of CPU is set, regulate motor speed according to result of calculation; Input signal filtering submodule is responsible for signals such as Hall, code-disc, overcurrent are carried out digital filtering; High precision velocity is measured submodule and is adopted the phase change calculating motor current speed of M algorithm according to the code-disc signal of improving; PI operator module compares the speed feedback value that CPU calculates the set point and the speed measurement module of motor and computing, draws the pulsewidth set-point of drive signal; The pulsewidth set-point that PWM modulation submodule, overcurrent protection submodule and brshless DC motor commutation submodule calculate according to the PI of institute operator module and produce the PWM drive signal that has Dead Time able to programme accordingly by the motor rotor position feedback signal that hall signal calculates, export power amplification circuit to by fpga chip, the drive motors motion; Electric Machine Control peripheral hardware driving interface is the CPU peripheral unit that be responsible for to connect soft nuclear of embedded type CPU and motor drive module, and embedded type CPU is soft to be endorsed with set point, PI parameter by CPU peripheral hardware drive module setting motor control module, read the motor movement state.
As a kind of improvement, the present invention adopts and improves M algorithm measurement measurement rotating speed of motor, improves the M algorithm and is divided into positive number and decimal two parts: in the sampling time, calculate code-disc A, B signal change frequency (improving the integer part of M algorithm) in unit; Time before calculating A, B signal change for the first time changes the time afterwards with last, converts two times to A, B signal change frequency (improving the fractional part of M algorithm); Improving the M algorithm has increased the precision of fractional part with respect to traditional M algorithm, makes the result that measures more near the actual value of motor speed.
As a kind of improvement, the present invention adopts the hardware logic realization that improves the M algorithm based on tachometric survey, uses logical circuit to realize that the algorithm of floating point arithmetic had both taken the logical resource of FPGA, reduces execution speed again, and employing will improve M algorithm computation numerical value and enlarge 2^
NDoubly, after the closed loop computing, again final result is contracted to 1/2^
N
As a kind of improvement, the present invention is based on the over current of motor protection algorithm of time integral, system constantly detects the over-current signal of motor, if over current of motor, then time register numerical value increases; If the motor operate as normal, then time register numerical value reduces; When time register numerical value is higher than the upper limit, then motor control signal is closed, and waits for that power circuit and motor lower the temperature, and at this moment time register numerical value will descend; When time register numerical value dropped to minimum, motor recovered operate as normal.
As a kind of improvement, the present invention is based on the logic module of the over current of motor protection of time integral, the limiting value of time register and the performance decision of the accumulated value that increases progressively Yu successively decrease that detects overcurrent each time by the metal-oxide-semiconductor that system adopted.
As a kind of improvement, a plurality of motor control modules of the present invention download in the fpga chip, realize the parallel control to a plurality of motors, and the quantity of may command motor only is subjected to selected fpga chip capacity and pin number restriction.
As a kind of improvement, the present invention customizes special-purpose Nios II CPU Electric Machine Control Peripheral Interface, the drive motors control module, Electric Machine Control Peripheral Interface module meets the avalon bus protocol, and be furnished with the user API of C language encapsulation, be user-friendly to the C language by Nios CPU control motor control module.
The beneficial effect that the present invention has:
1. modular encapsulation.As long as user program provides the speed setting value and the PI parameter of motor, module just can be worked voluntarily, no longer needs the participation of CPU.
2. fast operation.Motor control module is a hardware logic, and the task that each each submodule of clock cycle is done all has strictness all to control.
3. parallel computation.When control system need be controlled the multichannel motor, a plurality of motor control modules can call in system, and each motor control module all works alone, and is independent of each other.The systematic function of motor control module is stable; have various signal protection functions, comprise the input signal filter function, overcurrent protection function; the hall signal measuring ability of makeing mistakes, the quantity that system embeds motor control module is subjected to capacity and the pin number restriction of selected FPGA.
4. electric machine controller miniaturization.Functions such as signal modulation, filtering, overcurrent protection, motor commutation all realize on a FPGA, reduce peripheral circuit device.Multichannel Electric Machine Control IP kernel also can be integrated on the FPGA, a plurality of motor control module concurrent workings, the real-time of control system is improved, and all motor control logics are all realized on a FPGA, do not need peripheral logical circuit, significantly reduce the volume of controller.
5. sampling precision improves.Improve the traditional M algorithm of M algorithm, increased the sampling precision of decimal place with respect to the pulse of computes integer in the unit interval.The sampling precision of code-disc improves, and for the raising of control precision provides favourable guarantee, it is more accurate to test the speed based on the speed measurement module of improving the M algorithm, helps under the condition that does not improve the code-disc precision, improves the Electric Machine Control precision, the economize on hardware cost.
6. based on the over current of motor protection module of time integral algorithm, both protect motor not burnt, farthest increased the motor load capacity again.
In sum, many Electric Machine Control solution that the present invention is a kind of very practicality, sampling precision is high, real-time is high has good application prospects.
Description of drawings
Fig. 1 is that motor control module uses block diagram;
Fig. 2 is the soft nuclear program control flow chart of FPGA;
Fig. 3 is motor control module top layer encapsulation figure;
Fig. 4 is the motor control module functional structure chart;
Fig. 5 is a CPU peripheral hardware driver module;
Fig. 6 improves M algorithm sequential chart;
Fig. 7 improves M algorithm and M algorithm image data comparison diagram.
Embodiment
Among the present invention, the control system of FPGA inside comprises the soft nuclear of embedded type CPU and a plurality of motor control module, and the soft nuclear of embedded type CPU is communicated by letter with motor control module by the Electric Machine Control Peripheral Interface.Motor control module is responsible for the work of all links of motor closed-loop control; each link of closed-loop control all is responsible for by corresponding submodule, and submodule comprises: input signal filtering submodule, tachometric survey submodule, PI operator module, overcurrent protection submodule, PWM modulation submodule and brshless DC motor commutation submodule.Input signal filtering submodule adopts sequence detecting method; The tachometric survey submodule adopts and improves the M algorithm; The overcurrent protection submodule adopts the over-current protection method based on time integral.
1. the soft nuclear of embedded type CPU
Soft the endorsing with the demand according to project of embedded type CPU added UART, communication interface moduless such as SPI, sensor data acquisition interface, AD translation interface, common PIO interface etc.These peripheral hardwares all are based on the java standard library module that avalon bus and the soft nuclear of embedded type CPU carry out transfer of data.The Electric Machine Control Peripheral Interface be meet the avalon bus protocol, that can be used as library module, can be embedded into the module in the soft nuclear of CPU, be the CPU peripheral hardware driving interface that aims at motor control module design.The soft nuclear of embedded type CPU is responsible for communicating with host computer, and packet is resolved, and by the Electric Machine Control Peripheral Interface parameter and the target control value of each motor control module is set.The peripheral configuration of the soft nuclear of embedded type CPU is very flexible, and traditional relatively controller has applicability widely.
2. motor control module
Motor control module is to adopt the module of hardware logic realization to the DC generator speed closed-loop control.Each submodule of inside modules also is concurrent working, can realize the pipeline operation operation, and the closed-loop control frequency can greatly be improved; But controlled device (motor) has time lag characteristic, and the too high meeting of closed-loop control frequency causes the saturated of system and concussion, so the control cycle of motor control module must be determined according to the characteristic of motor.Because the PI computing module need add up to each operation result, inner submodule should not adopt the mode of streamline to carry out computing.The design utilizes a sequence state machine to enable each submodule, allows between submodule the mode that adopts work in series, guarantees that last result of calculation is correctly preserved, participation closed loop computing next time.The state machine of system is enabled by a control cycle timer.Be 11 system clock cycles closed loop operation time of carrying out a serial.
A plurality of motor control modules that system embeds are concurrent workings, and each module is not disturbed mutually, controls a plurality of motor closed loop moving concurrently.Therefore, control system can the real-time reduction because of the increase of control number of motors.
2.1. input signal filtering submodule
Signals such as the code-disc of motor, Hall, overcurrent all are connected with control circuit board with connector by lead, and these signals often have burr to be disturbed, and need to remove noise jamming through the signal filtering submodule, send into the basis for estimation of decision-making module as system.
2.2. tachometric survey submodule
The tachometric survey submodule is used to catch the two pulse signals of motor photoelectric code disk, and relatively the phase place of the two draws the direction of rotation of rotor, and by improving the current rotating speed of motor of M algorithm accurate Calculation.
2.3. PI operator module
PI operator module is responsible for the motor actual value that set point that CPU is provided and speed measurement module calculate and is carried out the PI computing, the numerical value that calculates through after amplitude limit, the parametric compensation as the Duty value of PWM modulation module.
2.4. PWM modulates submodule
The PWM wave frequency of the generation of PWM modulation submodule can be regulated according to motor characteristic is different, and the frequency current chopping that helps motor that raises is steady, and along with the increase of switching frequency, the loss power of switching component also can increase.
2.5. overcurrent protection submodule
The overcurrent protection submodule adopts the over-current protection method based on time integral, can carry out accumulated time to over current of motor state and normal operating conditions, guarantees to allow motor export torque to greatest extent under the not overheated situation of burning of metal-oxide-semiconductor.
2.6. brshless DC motor commutation submodule
Brshless DC motor commutation submodule is decoded to the motor hall signal of input, obtains motor position to drive the three-phase direct-current brushless motor; Or fpga chip hall signal input is set to fixed numeric values, is used to drive brush motor.
3. Electric Machine Control Peripheral Interface.
The Electric Machine Control Peripheral Interface is embedded in the soft nuclear of Nios II, is responsible for the Electric Machine Control motor control module, communicates with Nios II CPU.Peripheral module meets the avalon bus protocol of altera company special use, and the avalon bus communicates between the NiosII CPU.This module one has five write operation registers, a read operation register.
Write register A: the base address;
Write register B: base address+1 offset address;
Write register set: base address+2 offset address;
Write register Z_OpenLoop: base address+3 offset address;
Write register Z_Brushless: base address+4 offset address;
Read register code: base address.
4. the high-precision motor tachometric survey improves the M algorithm.
Tradition M algorithm: calculate in the sampling time t of unit the number of times M that two-way code-disc signal changes.Improve the M algorithm: in conjunction with the M algorithm, calculating t in the time, on the basis of the number of times M that two-way code-disc signal changes, time before first pulse arrival and the Time Calculation behind last end-of-pulsing are come out, be divided by with their last two complete pulse elapsed times respectively, as the decimal numerical value that improves the M algorithm.
What improve that the M algorithm gives up the M algorithm is not that the pulse number of integer calculates in the mode of decimal, increased precision in unit code-disc sampling in the sampling time, the data that the code-disc sampling is calculated more can embody current rotating speed of motor, for high-precision Electric Machine Control provides high-precision feedback signal basis.
5. based on the over current of motor Protection Code of time integral.
Detect the over-current state of motor based on the over current of motor module of time integral, utilize the tolerable overcurrent time of metal-oxide-semiconductor and need the time of cooling that MOS is protected.Current signal is that on behalf of motor, high level be in over-current state, represents motor for low level and is in normal operating conditions.System constantly detects the over-current signal of motor, if over current of motor, then time register numerical value increases; If the motor operate as normal, then time register numerical value reduces.When time register numerical value is higher than the upper limit, then motor control signal is closed, and waits for that power circuit and motor lower the temperature, and at this moment time register numerical value will descend; When time register numerical value dropped to minimum, motor recovered operate as normal.
Below in conjunction with accompanying drawing, technical scheme of the present invention is described further by embodiment.
Suitable FPGA controller is selected according to the quantity of control motor by system.The single motor control module needs 11 clock control cycles, so the control frequency of motor control module is subjected to the clock frequency restriction of FPGA; One of every control has 2 code-disc pins of brushless electric machine needs of Hall element, 3 hall signal pins, 1 over-current signal pin, 6 motor-driven pins, amounts to 11 pins; Brush motor of every control needs 2 code-disc pins, 4 motor-driven pins; Each motor control module takies 2.5 ten thousand gates.Therefore, system will select the FPGA of suitable capacity and number of pins according to the quantity of control motor.
Fig. 1 uses block diagram for motor control module, and system comprises a soft nuclear control device and N motor control module, and N is for needing the number of motors of control.
Soft nuclear control device is responsible for each motor control module initialization, is communicated, will instruct decomposition with host computer, sends on each motor control module.The program control flow chart of the soft nuclear of FPGA is as shown in Figure 2: figure
It is the soft nuclear program control flow chart of FPGA; When program brings into operation, initialization register is set outer setting parameters such as communication, transducer, sets motor control module PI and regulates parameter, controlled motor type, communicate with host computer in real time then, upgrade the goal-setting value of each motor according to the instruction of host computer.
Soft nuclear control device can set up the controller peripheral hardware on their own by the user, comprises UART, PIO, TIMER, the RAM etc. of standard and the special-purpose peripheral hardware of being realized by user or third party developer.Electric Machine Control Peripheral Interface module designs for motor control module specially.
Fig. 5 is a CPU peripheral hardware driver module, for the Peripheral Interface module is embedded into encapsulation figure among the Nios II CPU by the SOPC program.Clk in the module, rst_n, wr_n, rd_n, readdata, signals such as writedata are connected with CPU by the avalon bus; A, B, set are output signal, for motor control module provides parameter and set point; Code is an input signal, provides motor current rotary speed data to CPU.
Fig. 3 is the top layer encapsulation figure of motor control module.The implication of each port is:
Clock_in: clock signal input, connected system clock
Reset_n: the reset signal input, the connected system reset signal, effectively low, when level was low, module resetted.
SA_in1: brushless motor Hall signal A imports mutually
SB_in2: brushless motor Hall signal B imports mutually
SC_in3: brushless motor Hall signal C imports mutually
Overcurrent: over-current signal input, effectively high, when level is high, behind the time-delay certain hour with AT, BT, CT, AB, BB, the CB motor drive signal is closed.
SigA: code-disc signal A imports mutually
SigB: code-disc signal B imports mutually
Set[31..0]: the speed setting value input
A[31..0]: pi regulator parameter (Kp+Ki) input
B[31..0]: pi regulator parameter (Kp) input
Is_Brushless: the parameter of electric machine is provided with input, and level is low, is brush motor; Level is high, is brushless electric machine.
Hull_fault: the output index signal of hall signal sequence error
Bridge signal output on the AT:A phase motor-driven
Bridge signal output on the BT:B phase motor-driven
Bridge signal output on the CT:C phase motor-driven
Bridge signal output under the AB:A phase motor-driven
Bridge signal output under the BB:B phase motor-driven
Bridge signal output under the CB:C phase motor-driven
Code[31..0]: the output of code-disc feedback signal.
Fig. 4 is the functional structure chart of Electric Machine Control control module.Motor control module comprises input signal filtering submodule, tachometric survey submodule, PI operator module, PWM modulation submodule and brshless DC motor commutation submodule; Each functional module individual packages, each module all has enable signal, and each module is enabled according to logical order by a system mode machine.
Input signal filtering submodule adopts the burst detection method, each clock cycle all once samples to input signal, this sampled result and last sampled result is compared, if equate, then sample counter is added 1 certainly, otherwise with sample counter clear 0.If sample counter is added to N, illustrate that N continuous time sampling numerical value all is consistent, it is effective then to set this sampling numerical value, sends into level unit, back and handles.
The tachometric survey submodule adopts and improves the realization of M algorithm, improves M algorithm sequential as shown in Figure 6, figure
Be to improve M algorithm sequential chart, A, B are the code-disc positive input signal; T is the unit sampling time; T1 is the initial moment of t constantly; T2 is the termination moment of t; T1 is for to begin constantly to A from T1, the time that B road signal changes for the first time; T2 is from A, and B road signal changes to the T2 time constantly for the last time; T3 be T1 constantly before A, the time of twice variation of B road signal; T4 be T2 constantly before A, the time of twice variation of B road signal.Then improving the code-disc sampling numerical value that the M algorithm computation goes out is:
PI operator module adopts increment type PI algorithm, goes out the control deviation value according to the error of the set point of the current motor control module rotating speed current with improving motor that the M algorithm measurement goes out with the last Error Calculation of calculating
In order to reduce calculation step, the Kp of PI operational formula, the Ki parameter is merged together.Program is carried out parameter when being provided with to motor control module, setting also be the parameter of A and B.The purpose of doing like this is to guarantee
Computational process is finished in one-period.
The formula of PI computing is:
PWM modulation submodule is responsible for generation cycle square wave fixing, that duty ratio is controlled.The Duty input signal is the clock periodicity that high level continues in each cycle of square wave, is that the PI computing module calculates the output signal of line data after handling of going forward side by side.When time calculator counter＜Duty, PWM is output as 0; As counter〉during duty, PWM is output as 1.The calculator maximum M of PWM modulation module is:
The brshless DC motor inverting module adopts the trapezoidal wave reversing mode, judges the current position of rotor according to the Hall element output signal of motor, and the metal-oxide-semiconductor of the corresponding phase sequence of conducting drives rotor motion.The last bridge metal-oxide-semiconductor of three-phase full-controlled bridge is arranged by 1,3,5, following bridge metal-oxide-semiconductor is arranged by 4,6,2, hall signal SA, SB, SC are: 100,110,010,011,001,101, if motor main story, then the conducting of metal-oxide-semiconductor is in proper order: 12,23,, 34,45,56,61, corresponding, if the motor counter-rotating, then the conducting of metal-oxide-semiconductor is in proper order: 45,56,61,12,23,34.
The method of motor control module control brush motor: the A phase port of the anodal connecting circuit plate of brush motor, the B phase port of negative pole connecting circuit plate, input port with hall signal is locked as 100 then, so, No. 12 metal-oxide-semiconductor conductings during the brush motor main story, No. 45 metal-oxide-semiconductor conductings during the brush motor counter-rotating.
Fig. 7 is code-disc feedback signal effect contrast figure.Redness is a M algorithm computation code-disc feedback numerical value in the unit sampling time; Blueness is to improve M algorithm computation code-disc feedback numerical value in the unit sampling time, and the code-disc value of feedback of M algorithm computation is an integer; The code-disc value of feedback of improving the M algorithm computation is a decimal, and numeric ratio M evaluation is more accurate.
Claims (8)
1. many motor control methods of the high accuracy based on FPGA, it is characterized in that, control system comprises the soft nuclear of embedded type CPU, adopts the motor control module of hardware logic realization, meets the Electric Machine Control peripheral hardware driving interface of the connection CPU and the motor control module of avalon bus protocol.
2. many motor control methods according to claim 1, it is characterized in that, the soft nuclear of described embedded type CPU is responsible for communicating with host computer, calculates the speed setting value of each motor, and gives motor control module with result of calculation by Electric Machine Control peripheral hardware driving interface assignment; Described motor control module comprises that input signal filtering submodule, high precision velocity measurement submodule, PI operator module, PWM modulate submodule, overcurrent protection submodule and brshless DC motor commutation submodule, described motor control module mainly is responsible for detecting the actual speed when front motor, and carry out the PI computing with the speed that the soft nuclear of CPU is set, regulate motor speed according to result of calculation; Described input signal filtering submodule is responsible for signals such as Hall, code-disc, overcurrent are carried out digital filtering; High precision velocity is measured submodule and is adopted the phase change calculating motor current speed of M algorithm according to the code-disc signal of improving; PI operator module compares the speed feedback value that CPU calculates the set point and the speed measurement module of motor and computing, draws the pulsewidth set-point of drive signal; The pulsewidth set-point that PWM modulation submodule, overcurrent protection submodule and brshless DC motor commutation submodule calculate according to the PI of institute operator module and produce the PWM drive signal that has Dead Time able to programme accordingly by the motor rotor position feedback signal that hall signal calculates, export power amplification circuit to by fpga chip, the drive motors motion; Described Electric Machine Control peripheral hardware driving interface is the CPU peripheral unit that be responsible for to connect soft nuclear of embedded type CPU and motor drive module, and described embedded type CPU is soft to be endorsed with set point, PI parameter by CPU peripheral hardware drive module setting motor control module, read the motor movement state.
3. according to right 1 described many motor control methods, it is characterized in that, adopt and improve M algorithm measurement measurement rotating speed of motor, improve M algorithm algorithm and be divided into positive number and decimal two parts: in the sampling time, calculate code-disc A, B signal change frequency (improving the integer part of M algorithm) in unit; Time before calculating A, B signal change for the first time changes the time afterwards with last, converts two times to A, B signal change frequency (improving the fractional part of M algorithm); Improving the M algorithm has increased the precision of fractional part with respect to traditional M algorithm, makes the result that measures more near the actual value of motor speed.
4. according to right 1 described many motor control methods, it is characterized in that, improve the hardware logic of M algorithm based on tachometric survey and realize, use logical circuit to realize that the algorithm of floating point arithmetic had both taken the logical resource of FPGA, reduce execution speed again, employing will improve M algorithm computation numerical value and enlarge 2^
NDoubly, after the closed loop computing, again final result is contracted to 1/2^
N
5. according to right 1 described many motor control methods, it is characterized in that based on the over current of motor protection algorithm of time integral, system constantly detects the over-current signal of motor, if over current of motor, then time register numerical value increases; If the motor operate as normal, then time register numerical value reduces; When time register numerical value is higher than the upper limit, then motor control signal is closed, and waits for that power circuit and motor lower the temperature, and at this moment time register numerical value will descend; When time register numerical value dropped to minimum, motor recovered operate as normal.
6. according to right 1 described many motor control methods; it is characterized in that; based on the logic module that the over current of motor of time integral is protected, the limiting value of time register and the performance decision of the accumulated value that increases progressively Yu successively decrease that detects overcurrent each time by the metal-oxide-semiconductor that system adopted.
7. according to right 1 described many motor control methods, it is characterized in that, described a plurality of motor control module downloads in the fpga chip, realizes the parallel control to a plurality of motors, and the quantity of may command motor only is subjected to selected fpga chip capacity and pin number restriction.
8. according to right 1 described many motor control methods, it is characterized in that, the Nios II CPU Electric Machine Control Peripheral Interface that customization is special-purpose, the drive motors control module, Electric Machine Control Peripheral Interface module meets the avalon bus protocol, and be furnished with the user API of C language encapsulation, be user-friendly to the C language by Nios CPU control motor control module.
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| CN109980996A (en) * | 2019-04-28 | 2019-07-05 | 大陆智源科技（北京）有限公司 | Brushless DC motor drives integration system and driving method |
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| CN109781209A (en) * | 2019-03-01 | 2019-05-21 | 杭州依美洛克医学科技有限公司 | Liquid relief and liquid level detection circuit |
| CN109781209B (en) * | 2019-03-01 | 2023-12-08 | 杭州依美洛克医学科技有限公司 | Pipetting and liquid level detection circuit |
| CN109980996A (en) * | 2019-04-28 | 2019-07-05 | 大陆智源科技（北京）有限公司 | Brushless DC motor drives integration system and driving method |
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| CN110808664B (en) * | 2019-11-13 | 2021-09-24 | 南京埃斯顿自动化股份有限公司 | Compact multi-axis drive control stacking structure |
| CN112398394A (en) * | 2020-10-28 | 2021-02-23 | 山东航天电子技术研究所 | Low-rotation-speed dead-zone torque compensation method for permanent magnet synchronous motor |
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