CN101729002A - SOPC-based remote monitoring system of no-position sensor brushless DC motor - Google Patents
SOPC-based remote monitoring system of no-position sensor brushless DC motor Download PDFInfo
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Abstract
The invention discloses an SOPC-based remote monitoring system of a no-position sensor brushless DC motor, belonging to the motor control field. The invention aims to solve the problems that people can control the brushless DC motor only on-site, thereby wasting a great amount of labor power and funds, and increasing casualty probability under dangerous working environment. The invention comprises an FPGA, m buffer circuits, a multipath parallel analog-to-digital conversion sampling circuit, an Ethernet interface circuit, an Ethernet component terminal, an external memory and m brushless DC motors, wherein the multipath parallel analog-to-digital conversion sampling circuit adopts a specific three-phase electrical measurement AD device AD 73360, and utilizes an AC-coupling manner to sample three paths of counter potential signals simultaneously; an IP core is driven by the motor built in the FPGA to carry out optimized process, the motor is driven by the buffer circuit and multipath motors are driven by an IP multiplexing technology in a parallel and no-delay manner, the control on the motors by the user can be realized remotely based on FPGA embedded server.
Description
Technical field
The present invention relates to remote monitoring system of no-position sensor brushless DC motor, belong to Motor Control Field based on SOPC.
Background technology
Brshless DC motor (Brushless DC Motor, be called for short BLDCM) is the another name of trapezoidal wave permanent magnet synchronous motor, is characterized in that air gap flux density is distributed as trapezoidal wave in the motor, thereby the counter potential waveform of motor and current waveform are trapezoidal wave.
Brshless DC motor is compared with other kinds motor, has characteristics such as volume is little, efficient is high, exert oneself big, starting torque is big, overload capacity is strong, dynamic characteristic is good, control is easy, flexible, convenient.Fields such as medical treatment, Digit Control Machine Tool, robot control, electric motor car driving and household electrical appliances application now have been widely used in.High performance brshless DC motor needs real-time detection rotor position to realize its automatic control frequency conversion drive, has therefore produced the monitoring method of various brushless DC motor rotor position signallings, as electromagnetic position sensor, and hall position sensor, photoelectric encoder etc.But these position transducers all exist as the accessory structure of motor body, make electric machine structure further complicated, increased the weight and volume of motor, simultaneously, position transducer I﹠M difficulty, be the weakest link in the whole brshless DC motor body construction, the reliability of brshless DC motor is reduced.Therefore, at present, Brushless DC Motor without Position Sensor control becomes the focus of scholar and engineering staff's research.
The rotor position detection of position-sensor-free is the positional information that obtains rotor by detection and the calculating physical quantity relevant with rotor-position indirectly.Position-sensor-free method for detecting position commonly used has back-emf zero passage detection method, fly-wheel diode operating state detection method, winding triple-frequency harmonics detection method and instantaneous voltage equation method etc.
At present, do not have in the sensor field at the brushless DC motor rotor position signalling, back electromotive force zero passage detection method is because testing circuit is simple in structure, and algorithm is also uncomplicated, and therefore development is the most ripe, is most widely used.
For the modal two star three-phase six state working methods that are conducted, except the moment of commutation, at any time, motor always has a winding to be in off state.After the back-emf zero passage of the phase winding that opens circuit, through 30 degree electrical degrees, be exactly the commutation point of this phase again.Therefore, as long as detect the zero crossing of each phase winding back-emf, just can determine the rotor-position and the next change of current time of motor.Traditional back-emf zero passage detection algorithm all is by the discrete analog circuit in periphery, and the central point voltage that reconstructs motor obtains the back-emf zero cross signal.But, being subjected to the influence of reconfigurable circuit accuracy, always there is error in the back-emf zero cross signal, causes the commutation precision of motor lower, and control performance is not very desirable.Along with the appearance of digital signal processor DSP, in DSP, realize that with software mode zero passage detection and drive controlling were once becoming the research focus.But the serial of software algorithm can be introduced certain execution time-delay again, and it also can increase the burden of CPU, has limited finishing of other control task of motor.In addition, traditional back-emf zero passage detection method only can could be used more than 20% above rated speed, and speed adjustable range is subjected to severely restricts.
Meanwhile, continuous development along with science and technology, production-scale continuous expansion, modern Mechatronic control system more and more trends towards high accuracy, microminiaturized and extensiveization development, at this moment, the motor that can only carry out control operation at the scene just exposes its shortcoming, and manpower, funds aspect administering and maintaining are excessive, work to spend a large amount of time patrol and examine, control etc.; In addition, it is that the mankind can't arrive that some places are arranged, and operating environment is very abominable, danger zones such as nuclear pollution are for example arranged, the motor of operation just can't satisfy the control requirement at the scene, if staff's operation under such hazardous environment has for a long time increased the probability of injures and deaths.
Summary of the invention
The objective of the invention is to solve people and can only control the brushless dc machine operation at the scene, waste great amount of manpower, funds, under the dangerous work environment, also can increase the problem of injures and deaths probability, the remote monitoring system of no-position sensor brushless DC motor based on SOPC is provided.
The present invention includes FPGA, a m buffer circuit, multidiameter delay analog-to-digital conversion sample circuit, ethernet interface circuit, Ethernet assembly terminal, external memory storage and m brshless DC motor,
Be built with m motor-driven IP kernel, internet interface, the soft nuclear of NOISII and ternary bridger in the FPGA, m motor-driven IP kernel, internet interface, the soft nuclear of NOIS II and ternary bridger are articulated in respectively on the bus of FPGA inside,
The input/output terminal of Ethernet assembly terminal links to each other with user's input/output terminal of ethernet interface circuit,
The input/output terminal of external memory storage links to each other with the storage input/output terminal of ternary bridger,
The sampled signal end of each brshless DC motor links to each other with a signal input part of multidiameter delay analog-to-digital conversion sample circuit, m signal output part of multidiameter delay analog-to-digital conversion sample circuit links to each other with the sampled signal input of each motor-driven IP kernel respectively, the output of each motor-driven IP kernel links to each other with the input of a buffer circuit, and the output of each buffer circuit links to each other with the signal input end of a brshless DC motor.
Advantage of the present invention: the remote control technology based on Internet makes traditional brshless DC motor BLDCM control system break away from the restriction in space, by network realize to equipment Long-distance Control, administer and maintain, also realize sharing of resource and technology simultaneously.Especially large-size enterprise group, the dispersion of each factory of enterprise or production, adopt tele-control system to be convenient to timely monitoring, diagnosis and the maintenance of enterprise group to affiliated plant produced equipment, this remote monitoring can also be saved and is used to the manpower, the funds that administer and maintain in a large number, thereby increase economic efficiency, and can realize effective connection that Enterprise Information Net and control are netted, realize Enterprise automation.Secondly, it can widen people's working space and scope, helps promoting the development and the exploitation of robot for space of new generation, ocean robot, hazardous environment robot.Based on the control of Internet do not need people to lay special communication line and network technology increasingly mature, will help reducing like this Long-distance Control cost, enlarge the long-range distance, realize visit arbitrary node.
Description of drawings
Fig. 1 is the structural representation of the remote monitoring system of no-position sensor brushless DC motor based on SOPC of the present invention, Fig. 2 is the structural representation of motor-driven IP kernel of the present invention, Fig. 3 is the embedded OS structural representation, Fig. 4 is a WEB server block diagram, Fig. 5 is the flow chart that connects with socket, Fig. 6 is motor speed commutation signal waveform and A when being 220Rpm, B, C three-phase counter potential waveform figure, Fig. 7 is that the motor input speed is by the transient state speed curves of 125Rpm impact to 2500Rpm, Fig. 8 is that the AD A/D converter is when adopting single-ended input pattern, the corresponding curve of positive and negative two input signals, Fig. 9 is back-emf and switching tube job order oscillogram, Figure 10 is counter potential waveform figure and the phase transition schematic diagram of motor when just changeing, and Figure 11 is that the VHDL syllogic starts module I/O port schematic diagram synchronously.
Embodiment
Embodiment one: present embodiment is described below in conjunction with Fig. 1, Fig. 3 to Fig. 7, present embodiment comprises FPGA1, a m buffer circuit 2, multidiameter delay analog-to-digital conversion sample circuit 3, ethernet interface circuit 4, Ethernet assembly terminal 5, external memory storage 6 and m brshless DC motor 20
Be built with m motor-driven IP kernel 10, internet interface 11, the soft nuclear 12 of NOIS II and ternary bridger 13 in the FPGA1, m motor-driven IP kernel 10, internet interface 11, the soft nuclear 12 of NOIS II and ternary bridger 13 are articulated in respectively on the bus of FPGA1 inside
The input/output terminal of Ethernet assembly terminal 5 links to each other with user's input/output terminal of ethernet interface circuit 4,
The input/output terminal of external memory storage 6 links to each other with the storage input/output terminal of ternary bridger 13,
The sampled signal end of each brshless DC motor 20 links to each other with a signal input part of multidiameter delay analog-to-digital conversion sample circuit 3, m signal output part of multidiameter delay analog-to-digital conversion sample circuit 3 links to each other with the sampled signal input of each motor-driven IP kernel 10 respectively, the output of each motor-driven IP kernel 10 links to each other with the input of a buffer circuit 2, and the output of each buffer circuit 2 links to each other with the signal input end of a brshless DC motor 20.
FPGA1 selects CycloneII series EP2C20Q240C8N for use., on the FPGA (field programmable gate array) of the Cyclone of altera corp II series, utilize SOPC (programmable system on the sheet) technology, realized hardware modularity design to system.This system comprises based on the position-sensor-free driver of back-emf zero passage detection and the embedded web server that makes up on the basis of the soft nuclear of Nios II.The various functions of native system can rely on the inner powerful resource of FPGA to realize, and the energy online upgrading, shorten the development time, satisfy the more and more higher control requirement of system.Along with the reduction of FPGA price and the lifting of internal resource, it will be more and more general in the application of machine field.
The monolithic Fast Ethernet control chip that the ethernet interface circuit DM9000A that ethernet interface circuit 4 selects for use DAVICOM company to produce, DM9000A are integrated, powerful, the few pins of a height, cost performance is high.
Multidiameter delay analog-to-digital conversion sample circuit 3 is selected the AD73360 modulus conversion chip for use.Good characteristic of this chip self and original periphery circuit design make it can well be applicable to the signals collecting work of native system:
(1) AD73360 has six independently analog input channels, and each passage can be sampled simultaneously, has eliminated the phase error that common AD causes because of the time sharing sampling to multiple signals, the three-phase voltage and the bus current of the motor of can sampling in real time.In addition, each paths of AD73360 all has built-in gain-programmed amplifier and Anti-liased filter, and it is greatly reduced the amplifying circuit of input and the requirement of Anti-liased filter, and the design of modulate circuit is more simplified.
(2) AD73360 uses six linemans industry standard synchronous serial interface, and port front-end sampling speed and rear end transmission rate control able to programme (the highest six passages of supporting are simultaneously with the sampling of 64KHz speed), makes it very convenient with being connected of motor-driven IP kernel 10.Because the number of interface signal line has only six, thus the area of printed board not only saved like this, and reduced electromagnetic interference effectively, thus make that system's operation is more stable.
AD73360 modulus conversion chip, DM9000A and buffer circuit 2 are the external equipment of User Defined NIOS II system, all add among the SOPC Builder with the form of self-defined assembly.
System of the present invention can realize remote monitoring, DM9000A connects Ethernet assembly terminal 5, the user imports the given parameter of corresponding system for any one brshless DC motor BLDCM by the internet network in Ethernet assembly terminal 5---turn signal, the given rotation speed n * of input, start stop signal, control corresponding brshless DC motor BLDCM operation.
The long-distance user assigns instruction by the internet interface 11 among ethernet interface circuit 4 and the FPGA1, instruction is given the soft nuclear 12 of NOISII by bus, instruction---acquisition after the soft nuclear 12 of NOISII is handled, turn signal, start stop signal and input speed convey to the motor-driven IP kernel 10 on certain road by bus, instruction after this road motor-driven IP kernel 10 will be handled is exported to this road brshless DC motor 20 by buffer circuit 2, acquisition then conveys to digital-to-analogue conversion testing circuit 3 by the motor-driven IP kernel 10 in this road, the three-phase voltage signal and the bus current signal of this road brshless DC motor 20 of instruction acquisition that digital-to-analogue conversion testing circuit 3 passes over according to the user, the signal that collection is returned is after motor-driven IP kernel 10 is handled, output pwm signal, and the isolation of process buffer circuit 2, drive corresponding brshless DC motor 20 operations, like this, the user can press instruction operation at any brshless DC motor BLDCM of Long-distance Control field operation.
Remote control technology based on Internet makes traditional BLDCM control system or other electromechanical control equipment break away from the restriction in space, by network realize to equipment Long-distance Control, administer and maintain, also realize sharing of resource and technology simultaneously.Especially large-size enterprise group, the dispersion of each factory of enterprise or production, adopt tele-control system to be convenient to timely monitoring, diagnosis and the maintenance of enterprise group to affiliated plant produced equipment, this remote monitoring can also be saved and is used to the manpower, the funds that administer and maintain in a large number, thereby increase economic efficiency, and can realize effective connection that Enterprise Information Net and control are netted, realize Enterprise automation.Secondly, it can widen people's working space and scope, helps promoting the development and the exploitation of robot for space of new generation, ocean robot, hazardous environment robot.Based on the control of Internet do not need people to lay special communication line and network technology increasingly mature, will help reducing like this Long-distance Control cost, enlarge the long-range distance, realize visit arbitrary node.
The software design of system of the present invention constitutes a complete remote monitoring control system by WEB server, remote browser and control interface under the embedded μ C/OS-II operating system of this locality, and software program embeds in the soft nuclear 12 of NOISII.
Flush type WEB server provides a dynamic web page, visit by Internet for the user, and allow the visitor to revise top Control Parameter, and utilize the Control Parameter of input directly to control motor-driven IP kernel 10, to brshless DC motor start, speed governing and rotating control.The embedded OS structure chart as shown in Figure 3.
Flush type WEB server design under the μ C/OS-II operating system is based upon on the multiple task real-time operation system, and the characteristics that it has are:
■ small and exquisite (minimum core 2K);
The open source code of ■, detailed note;
■ can deprive real-time kernel;
■ is portable strong, but cutting;
The ■ real-time multi-task.
These characteristics help the realization of network service in FPGA1.
The network protocol stack of the soft nuclear of NIOSII μ C/OS-II operating system support is LWIP among the FPAGA of the CycloneII series of ALTERA company.
LightweightIP (LWIP) is that the small_footprint of TCP/IP group realizes.LWIP has reduced the use of resource when whole TCP/IP are provided.LWIP is designed to have the limited embedded system of memory capacity, and it is used in the NIOSII processor system.This is the basis of network service.
WEB server block diagram as shown in Figure 4.
Described flush type WEB server is based on that cover connects by word, its flow chart as shown in Figure 5, the server of native system is the embedded server based on underlying protocol stack LWIP that operates in the μ C/OS-II system, and major function is to set up, manage http connection and response http request.This project mainly comprises following file:
Web_sever.c: initialization system, set up the http task;
Http.c: finish the http inter-related task, as: set up http and connect, response http request etc.;
Http.h: the various macrodefinitions and the socket description scheme body that have defined the http task; Comprised the LWIP document of agreement;
Network_unitilies.c: finish the distribution of IP address and MAC Address;
The http connection basis is the LWIP protocol stack, by the bottom function library that LWIP provides, sets up socket and connects.The LWIP function library is by web_sever.c, and a plurality of topmost papers such as http.c and network_unitilies.c call.
The control interface is the webpage of writing with html language, and on the nonvolatile memory 7 (Flash) of FPGA1, client conducts interviews by the IE browser with the form programming of compressed file.
We test the performance of the DC Brushless Motor driver of system.
(1) static parameter is measured
The static parameter of system comprises speed adjustable range, adjusting speed accuracy and the static characteristic of electric machine controller.
Table 1 is the given input speed n and the actual speed n * contrast of sampling in 125r/min～3000r/min scope.
Table 1 input speed n and actual speed n * contrast
After testing, system has met and exceeded predetermined technical indicator:
√ may command motor speed 125r/min-3000r/min (4.16% rated speed-rated speed), speed adjustable range D 〉=24;
The √ speed error is lower than 0.5%.
Motor is just changeing and rotating speed when being 220Rpm, and total commutation signal waveform and A, B, C three-phase counter potential waveform are as shown in Figure 6.As can be seen from the figure commutation signal accurately and do not have an obvious phase shift.
(2) dynamic parameter is measured
Because the structure of DC Brushless Motor is limit, the transient state speed waveform that impact is given during electric machine speed regulation is difficult to measure.So we have designed a little module in addition, the time interval in FPGA1 inside with 0.2s samples to the actual speed n * that motor-driven IP kernel 10 calculates, and the result existed among the RAM calls fully.Motor when t=5s by the transient state speed curves of the given 2500Rpm of 125Rpm impact as shown in Figure 7.Wherein, dotted line is given input speed n curve, and another is an actual speed n * curve.As can be seen, 1% rotating speed overshoot is arranged approximately during raising speed.
The difference of embodiment two, present embodiment and execution mode one is, it also comprises nonvolatile memory 7, the input/output terminal of nonvolatile memory 7 links to each other with the flash memory input/output terminal of ternary bridger 13, and other structure is identical with execution mode one with connected mode.
Embodiment three, present embodiment and execution mode one or twos' difference is, it also comprises button 8 and charactron 9, FPGA1 inside also is built with universal I interface 14 and charactron control interface 15, universal I interface 14 and charactron control interface 15 are articulated in respectively on the bus of FPGA1 inside, the output of button 8 links to each other with the input of universal I interface 14, the input of charactron links to each other with the output of charactron control interface 15, and other structure is identical with execution mode one or two with connected mode.
The setting of present embodiment is that system reset and control when button 8 is used for network failure can be imported the regulation and control parameter for Field Force's debugging and monitoring, shows the operational factor (as rotating speed, terminal voltage, bus current etc.) of motor on the charactron in real time.
Embodiment four, present embodiment is described below in conjunction with Fig. 2, Fig. 8 to Figure 11, present embodiment and execution mode one, two or threes' difference is, motor-driven IP kernel 10 comprises that multichannel analog-to-digital conversion interface unit 101, back-emf zero passage detection unit 102, syllogic start module 103, the two close loop negative feedback pi regulators 104 of speed and current and PWM controller 105 synchronously
Multichannel analog-to-digital conversion interface unit 101 receives described sampled signal, multichannel analog-to-digital conversion interface unit 101 output three-phase voltage sampled signals are given back-emf zero passage detection unit 102, multichannel analog-to-digital conversion interface unit 101 output bus current sampled signals give speed and current two close loop negative feedback pi regulators 104
Back-emf zero passage detection unit 102 output actual speed signals give speed and current two close loop negative feedback pi regulators 104, and the two close loop negative feedback pi regulator 104 output closed-loop duty cycle control signals of described speed and current are given PWM controller 105,
Syllogic starts the turn signal that module 103 receives input synchronously, described turn signal flows to the PWM controller simultaneously, syllogic starts module 103 output open loop duty cycle control signals synchronously and gives PWM controller 105, described syllogic starts module 103 synchronously and also exports the open loop commutation signal to PWM controller 105, described syllogic start synchronously module 103 also export open/the closed-loop control signal gives PWM controller 105
The two close loop negative feedback pi regulators 104 of speed and current receive start stop signal and input speed signal, and the brushless dc machine control signal of PWM controller 105 outputs drives brshless DC motor 20 operations by buffer circuit 2.
Other structure is identical with execution mode one, two or three with connected mode.
IP Core (IP core) is commonly used in digital circuit with some, but the functional block of more complicated, is designed to the module of modifiable parameter as FIR filter, sdram controller, pci interface etc.Reusing of IP kernel is the main policies that the designer wins rapid Time To Market.Along with the scale of CPLD/FPGA is increasing, design becomes increasingly complex, and designer's main task is to finish complicated design in the cycle at official hour.Call IP kernel and can avoid the duplication of labour, alleviate engineer's burden greatly, therefore using IP kernel is a development trend.
According to the analysis result of control method for brushless direct current motor, can design the integrated digital logic circuit structure that realizes the position Sensorless Control algorithm, i.e. motor-driven IP kernel, its structured flowchart is as shown in Figure 2.
Motor-driven IP kernel 10 obtains the control signal (turn signal, start stop signal and input speed) of motor via the WEB server by interface, send drive signal to each brshless DC motor 20, send the actual speed n of motor simultaneously to Internet, mainly start module 103, the two close loop negative feedback pi regulators 104 of speed and current and PWM controller 105 5 major parts synchronously and form by multichannel analog-to-digital conversion interface unit 101 (being used for A/D73360 drives), back-emf zero passage detection unit 102, syllogic.Multichannel analog-to-digital conversion interface unit 101 is used for providing to the two close loop negative feedback pi regulators 104 of back-emf zero passage detection module 102 and speed and current three-phase voltage U a, Ub, Uc and the bus current I of sampling.Back-emf zero passage detection module 102 then realizes a kind of novel rotor position detection algorithm based on hardware logic.This algorithm can utilize deviation that speed limit filtering algorithm and phase compensation logic eliminate rotor-position signal obtaining accurate commutation signal dexterously, and is subjected to the Harmonic Interference in the phase voltage signal to influence also less.Syllogic starts module 103 synchronously and relies on pre-determined bit, acceleration and three links of automatic switchover to realize the open loop soft start of motor, and overcoming back-emf zero passage detection algorithm can not self-running defective.The two close loop negative feedback pi regulators 104 of speed and current portion within it carry out two closed-loop controls to rotating speed, electric current, reference quantity is the speed setting of user's input, and feedback quantity is the actual speed n of back-emf zero passage detection module 102 calculating and the bus current that multidiameter delay analog-to-digital conversion sample circuit 3 is gathered.Actual speed n output after the PI of the two close loop negative feedback pi regulators 104 of speed and current regulates enters PWM controller 105 again and carries out PWM modulation back output six road and bridge arm switch signal, drives controlled brshless DC motor 20.
Only describe the control procedure of one road brshless DC motor 20 below, the control of the brshless DC motor 20 on other roads is all identical.During motor-driven IP kernel 10 operate as normal, at first, make syllogic start module 103 synchronously and start working, and turn signal is sent into syllogic start module 103 synchronously by the control signal of interface input motor.At this moment, brshless DC motor 20 is in the open-loop start-up stage, start module 103 synchronously by syllogic the commutation time and the duty ratio of its inner setting are sent open loop duty ratio, open loop commutation signal and open loop control signal to PWM controller 105, and brshless DC motor 20 is controlled to six MOS switching tubes of the three-phase bridge of buffer circuit 2 by PWM controller 105, make brshless DC motor 20 by the speed-changing that reaches open loop and closed loop in the time that is still in setting.Then, syllogic starts module 103 synchronously and sends the closed-loop control signal, makes brshless DC motor 20 enter the closed loop automatic control frequency conversion stage.101 pairs of multidiameter delay analog-to-digital conversion of multichannel analog-to-digital conversion interface unit sample circuit AD73360 controls, and accept three-phase voltage U a, Ub, Uc and the bus current I signal of the brshless DC motor 20 of serial input, and with these four signals also, send to the two close loop negative feedback pi regulators 104 of back-emf zero passage detection unit 102 and speed and current by the string commentaries on classics.Three road voltage signals that 102 pairs of back-emf zero passage detection unit receive carry out digital filtering, calculating, are transformed into the winding back emf signal with higher stability.Zero cross signal to back-emf signal carries out digital speed limit filtering, phase shift, compensation, obtains the commutation signal of final brshless DC motor 20, offers PWM controller 105 to realize the automatic control frequency conversion; Simultaneously, the M/T method that back-emf zero passage detection unit 102 utilizes the commutation signal that obtains to carry out motor tests the speed, and the actual speed of motor is sent to the two close loop negative feedback pi regulators 104 of speed and current respectively is used for controlling automatically and being sent to motor-driven IP kernel 10 interfaces and issues the long-distance user by Internet.The two close loop negative feedback pi regulators 104 of speed and current receive with reference to the actual speed signal n of input speed signal n*, feedback, the bus current signal I of feedback, utilize digital series connection rotating speed, the two close loop negative feedback pi regulators 104 of speed and current to obtain the closed loop duty cycle control signal, and convert drive signal control brshless DC motor 20 to by PWM controller 105.
Introduce its control procedure in detail at control a certain road brshless DC motor 20 segmentations below:
The user assigns collection motor message command at the long-range motor-driven IP kernel 10 of giving, then motor-driven IP kernel 10 is assigned acquisition to multidiameter delay analog-to-digital conversion sample circuit 3 by multichannel analog-to-digital conversion interface unit 101, multidiameter delay analog-to-digital conversion sample circuit 3 (AD73360) has six independently analog input channels, each passage can be sampled simultaneously, eliminated the phase error that common AD causes because of the time sharing sampling to multiple signals, the three-phase voltage U a of brshless DC motor 20 in real time can sample, Ub, Uc and bus current I, each paths of AD73360 all has built-in gain-programmed amplifier and Anti-liased filter, it is greatly reduced the amplifying circuit of input and the requirement of Anti-liased filter, the design of modulate circuit is more simplified.Because the AD73360 oneself requirement, its input voltage range is 0.4V～2.0V.Adopt common direct-current coupling mode, need carry out the level adjustment to signal, its circuit complexity, precision be difficult to guarantee, the processing of back-emf signal is had a significant impact.The design adopts the AC coupled mode, and making sampled signal is that the center changes up and down with AD reference voltage 1.25V.AC coupled has filtered useless DC component, and the zero crossing of back-emf is overlapped with the AD reference voltage, and as shown in Figure 8, VREF is the reference voltage of AD73360 among Fig. 8, is 1.25V when the 3.3V power supply; VINP is the analog input of input channel anode; VINN is the analog input of input channel negative terminal, and Fig. 8 has illustrated the input/output relation of AD73360 when the single-ended input of 3.3V supply voltage.The single-ended input of AD73360, VINN receives the REFOUT end, is VREF=1.25V.Simplified the detection algorithm of FPGA to the back-emf zero crossing; Sampled signal is symmetrical centre with a reference source, has reduced the influence of benchmark shakiness to precision to greatest extent, has improved sampling precision.
Three-phase voltage U a, Ub, Uc and bus current I that sampling is returned export to multichannel analog-to-digital conversion interface unit 101, accept the three-phase voltage and the bus current signal of the motor of serial input, and by the string commentaries on classics also with these four signals, wherein, three-phase voltage U a, Ub, Uc send to back-emf zero passage detection unit 102, and bus current I sends to the two close loop negative feedback pi regulators 104 of speed and current.
Back-emf zero passage detection unit 102 is made up of four parts: clock frequency division module, back-emf phase conversion, phase delay module and rate signal generation module.
After brshless DC motor 20 started, the magnetic flux cutting stator winding that rotor magnetic pole produces produced back-emf E, and its size is proportional to the rotating speed and the air-gap field B of brshless DC motor 20.And when rotor pole sexually revises, counter potential waveform positive and negative also along with change.As long as so measure the zero crossing of counter potential waveform, just can determine the exact position of rotor, and control the commutation of brshless DC motor 20 with this.Brshless DC motor 20 back-emfs and desirable switching tube job order are as shown in Figure 9.
(1) clock frequency division module
Clock frequency division module is sent into the phase delay module with the system clock of 50MHz through the clock signal that 500 frequency divisions obtain 100kHz.
(2) back-emf phase conversion
The back-emf phase conversion obtains back-emf signal with three-phase voltage signal Ua, Ub, Uc through intermediate value average filter and correlation computations.Zero crossing by back-emf signal obtains preliminary commutation signal again.
Back-emf when motor is just changeing and phase transition principle are illustrated in fig. 10 shown below e
a, e
b, e
cBe respectively counter potential waveform after the filtering of A phase, B phase, C phase, abc is the conversion intermediate quantity.Work as e
a＞0 o'clock abc[2]=1, e
a＜0 o'clock abc[2]=0; Work as e
b＞0 o'clock abc[1]=1, e
b＜0 o'clock abc[1]=0; Work as e
c＞0 o'clock abc[0]=1, e
c＜0 o'clock abc[0]=0.We can get the abc signal and turn over 360 when spending in the motor electrical degree thus, have passed through 100,110,010,011,001,101 six state, these six states corresponding respectively six states of phase_i and phase_c: 000,001,011,111,110,100.
(3) phase delay module
The phase delay module has realized the conversion to the phase_c signal by phase_i, simultaneously provides frequency and the proportional pulse signal flag6 of motor speed to the rate signal generation module, and this signal is by abc[2] signal directly exports.
The difference of phase_i and phase_c is that the phase_c signal is obtained by the about 30 degree electrical degrees of phase_i signal lag.An embedded improved FIPS (frequency-independent phase shift) digital phase shifter is used to realize this conversion in the phase delay module.In addition, in order to compensate the phase lag that hardware filtering and software filtering cause back-emf signal, the electrical degree that phase_c lags behind is necessarily less than 30 degree.We have carried out emulation to the phase lag that is caused by filtering, and the angle of the different frequency correspondence that experiment is obtained is put into ROM module invokes thus in advance, can obtain accurate relatively commutation signal like this, the speed adjustable range that improves system is had very great help.
(4) rate signal generation module.
The rate signal generation module utilizes frequency and the proportional pulse signal flag6 of motor speed that motor is carried out the M/T method and tests the speed.M/T method (frequency/period method) be measure detection time simultaneously and in this detection time the number of rotational speed pulse signal determine rotating speed.Owing to simultaneously two kinds of pulse signals are counted, therefore as long as " simultaneity " processing is proper, the M/T method all has higher rate accuracy when high speed and low speed, be fit to high speed adjustable range, high-precision brshless DC motor governing system.The M/T method tests the speed and combines the strong point of M (frequency) method and T (cycle) method, has both write down the umber of pulse M of output in the time of testing the speed
1, detect interior high-frequency clock pulse of the same time interval again and count M
2If the frequency of high-frequency clock pulse is f
0, time T then tests the speed
t=M
2/ f
0Rotating speed is often represented with revolutions per minute traditionally, and then rotating speed of motor can be expressed as
In the formula, Z is the umber of pulse that motor whenever turns around and produced.
For the sextupole permanent-magnet brushless DC electric machine and the aforementioned algorithm of native system, the motor electrical degree that turns over that whenever turns around is the 6*360 degree, and flag6 produces a pulse in per 360 electrical degrees.So Z=6.High-frequency clock pulse is served as by the FPGA system clock, is 50MHz.Therefore, the computing formula of using in the speed generation module is specially:
That is, back-emf zero passage detection unit 102 output closed-loop commutation signals are given PWM controller 105, the commutation of control brshless DC motor 20.Calculate actual speed n through back-emf zero passage detection unit 102, actual speed n is exported to the long-distance user by internet interface 11 on the one hand, exports to the two close loop negative feedback pi regulators 104 of speed and current on the one hand.
The user long-range by the internet interface 11 among the FPGA1 to the motor-driven IP kernel 10 in this road of motor transmit control signal (turn signal, start stop signal and input speed n*), the two close loop negative feedback pi regulators 104 of speed and current in the motor-driven IP kernel 10 receive the bus current I and the actual speed n of described control signal, collection, carrying out PI at the two close loop negative feedback pi regulators 104 of speed and current regulates, the output closed-loop duty ratio is given PWM controller 105, by changing the rotating speed of closed loop duty ratio and then regulation and control brshless DC motor 20.
In order accurately to locate the position of the rotor magnetic pole of brshless DC motor 20, the present invention adopts syllogic to start module 103 synchronously,
In brshless DC motor, induced electromotive force in the stator winding and rotor-position are keeping definite relation, just are being based on this principle work according to the brshless DC motor of back-emf method commutation.And the amplitude of back-emf is directly proportional with rotating speed of motor.When static or rotating speed was very low when motor, the amplitude of induced electromotive force was zero or very little, was not enough to be used for determine the current position of rotor magnetic pole, so can not carry out the change of current according to back electromotive force when brshless DC motor starts.Need to adopt to comprise that pre-determined bit, acceleration and three links of automatic switchover realize the open loop soft start of motor, overcoming back-emf zero passage detection algorithm can not self-running defective.
The VHDL syllogic starts synchronously that module I/O port as shown in figure 11.
Input/output port:
IN
Clk:(clock) FPGA system clock 50MHz
Dir:(direction) shifted input signal, dir=0 then just changes, and dir=1 then reverses
Rst:(reset) systematic reset signal, high level is effective
OUT
Cl_flag:(closed-loop flag) system's closed-loop control signal, high level is effective
Duty_o:(duty of open-loop) system's open loop duty cycle signals is 11, and minimum is 0D, is 1999D to the maximum
Phase_o:(phase of open-loop) system's open loop phase control signal is 3, and 000,001,011,111,110,100
State:(state of the system) system mode indication, state=00B is the pre-determined bit first time, and state=01B is the pre-determined bit second time, and state=10B is the open loop raising speed, and state=11B is a closed-loop adjustment.
(1) pre-determined bit
For guaranteeing that brshless DC motor can normally start, at first need to determine the current location of rotor, under the underloading condition, the general rotor locate mode that adopts the magnetic brake formula for brshless DC motor with trapezoidal counter potential waveform.When system began to power on, given one group of trigger impulse formed a constant amplitude among air gap arbitrarily, the magnetic flux that direction is constant, as long as guarantee that its amplitude is enough big, this pulse just can be positioned rotor on this direction within a certain period of time by force so.Behind the location, rotor d axle overlaps with the stator winding flow direction.So just determined the initial position of rotor.
But because the uncertainty of motor rotor position when static, if when the location, stator winding resultant flux and rotor d axle clamp angle are 180 degree, then can produce the location and fail.In order to address this problem, the method for our employing " double location " continues the next state of conducting as locating for the second time on the basis of preceding one-time positioning, no matter locate successfully or fail the first time like this, the location must be successful for the second time.
(2) open loop raising speed
Syllogic starts synchronously and contains two 16 * 32 ROM in the module, has stored the motor open-loop start-up table that experiment is obtained respectively.
During state=10B, system is in the open loop raising speed stage, and syllogic starts in the module synchronously by reading duty ratio and commutation time signal among two 16 * 32 the ROM respectively, and according to the switch of commutation time switched conductive
Just change: 000-001-011-111-110-100-000,
Be V1V2-〉V2V3-〉V3V4-〉V4V5-〉V5V6-〉V6V1-〉V1V2;
Counter-rotating: 000-〉100-〉110-〉111-〉011-〉001-〉000,
Be V1V2-〉V6V1-〉V5V6-〉V4V5-〉V3V4-〉V2V3-〉V1V2.
The commutation time shortens gradually like this, and duty ratio increases gradually, and when ROM read sky, motor had just reached opening/the closed loop speed-changing of setting, and this moment, the counter potential waveform of motor can guarantee to stablize autocontrol operation.
(3) automatically switch
During state=11B, system switches to the autocontrol operation stage, cl_flag=1, and the closed loop duty ratio and the phase signal of motor-driven IP10 nuclear output this moment are provided by two closed loop pi regulators 104 of speed and current and back-emf zero passage detection unit 102 respectively.
The two closed loop pi regulator 104 output closed-loop duty ratios of speed and current are given PWM controller 105, back-emf zero passage detection unit 102 output closed-loop commutation signals are given PWM controller 105, PWM controller 105 is exported six tunnel drive signal Ah, Al, Bh, Bl, Ch, Cl according to the given turn signal of user again, and controls the operation of brshless DC motors 20 by buffer circuit 2.
The control principle of other road brshless DC motor 20 all is the same, and the user can be in the long-range control command of assigning simultaneously, and the control on every road can be carried out simultaneously, not time-delay.
Claims (7)
1. based on the remote monitoring system of no-position sensor brushless DC motor of SOPC, it is characterized in that, it comprises FPGA (1), a m buffer circuit (2), multidiameter delay analog-to-digital conversion sample circuit (3), ethernet interface circuit (4), Ethernet assembly terminal (5), external memory storage (6) and m brshless DC motor (20)
Be built with m motor-driven IP kernel (10), internet interface (11), the soft nuclear of NOIS II (12) and ternary bridger (13) in the FPGA (1), m motor-driven IP kernel (10), internet interface (11), the soft nuclear of NOIS II (12) and ternary bridger (13) are articulated in respectively on the inner bus of FPGA (1)
The input/output terminal of Ethernet assembly terminal (5) links to each other with user's input/output terminal of ethernet interface circuit (4),
The input/output terminal of external memory storage (6) links to each other with the storage input/output terminal of ternary bridger (13),
The sampled signal end of each brshless DC motor (20) links to each other with a signal input part of multidiameter delay analog-to-digital conversion sample circuit (3), m signal output part of multidiameter delay analog-to-digital conversion sample circuit (3) links to each other with the sampled signal input of each motor-driven IP kernel (10) respectively, the output of each motor-driven IP kernel (10) links to each other with the input of a buffer circuit (2), and the output of each buffer circuit (2) links to each other with the signal input end of a brshless DC motor (20).
2. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1, it is characterized in that, it also comprises nonvolatile memory (7), and the input/output terminal of nonvolatile memory (7) links to each other with the flash memory input/output terminal of ternary bridger (13).
3. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1 and 2, it is characterized in that, it also comprises button (8) and charactron (9), FPGA (1) inside also is built with universal I interface (14) and charactron control interface (15), universal I interface (14) and charactron control interface (15) are articulated in respectively on the inner bus of FPGA (1), the output of button (8) links to each other with the input of universal I interface (14), and the input of charactron (9) links to each other with the output of charactron control interface (15).
4. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1 is characterized in that, FPGA (1) selects CycloneII series EP2C20Q240C8N for use.
5. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1 is characterized in that, multidiameter delay analog-to-digital conversion sample circuit (3) is selected the AD73360 modulus conversion chip for use.
6. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1 is characterized in that, the ethernet interface circuit DM9000A that ethernet interface circuit (4) selects for use DAVICOM company to produce.
7. the remote monitoring system of no-position sensor brushless DC motor based on SOPC according to claim 1, it is characterized in that, motor-driven IP kernel (10) comprises that multichannel analog-to-digital conversion interface unit (101), back-emf zero passage detection unit (102), syllogic start module (103), the two close loop negative feedback pi regulators (104) of speed and current and PWM controller (105) synchronously
Multichannel analog-to-digital conversion interface unit (101) receives described sampled signal, multichannel analog-to-digital conversion interface unit (101) output three-phase voltage sampled signal is given back-emf zero passage detection unit (102), multichannel analog-to-digital conversion interface unit (101) output bus current sampled signal gives speed and current two close loop negative feedback pi regulators (104)
Back-emf zero passage detection unit (102) output actual speed signal gives speed and current two close loop negative feedback pi regulators (104), and two close loop negative feedback pi regulator (104) the output closed-loop duty cycle control signals of described speed and current are given PWM controller (105),
Syllogic starts the turn signal that module (103) receives input synchronously, described turn signal flows to PWM controller (105) simultaneously, syllogic starts module (103) output open loop duty cycle control signal synchronously and gives PWM controller (105), described syllogic starts module (103) synchronously and also exports the open loop commutation signal to PWM controller (105), described syllogic start synchronously module (103) also export open/the closed-loop control signal gives PWM controller (105)
The two close loop negative feedback pi regulators (104) of speed and current receive start stop signal and input speed signal, and the brushless dc machine control signal of PWM controller (105) output drives brshless DC motor (20) operation by buffer circuit (2).
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