CN103603820A - Fan control method based on NUMA computer system structure - Google Patents
Fan control method based on NUMA computer system structure Download PDFInfo
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Abstract
The invention provides a fan control method based on the NUMA computer system structure. In computer systems using an FPGA device, such as physical layer multi-partition computers, an NIOS II soft core is established in the FPGA to monitor server system temperature and control and manage operation of a fan cooling system. A custom PWM module IP core is further provided. The functions such as temperature function, a PWM fan control module, a fan speed detection module, DDR2 SDRAM storage control and Flash storage control are integrated in the NIOS II soft core of the FPGA. Compared to the fan control method based on the NUMA computer system structure is flexible to use, well extensible, highly practical, and easy to popularize.
Description
Technical field
The present invention relates to Computer Applied Technology field, specifically a kind of control method for fan based on NUMA Computer Architecture.
Background technique
The feature of many physical layers partitioned computer architecture of NUMA is a plurality of processors of computer system and IO resource can be carried out to the division in physical layer, thereby a multiprocessor computer system is divided into a plurality of independently multicomputer systems, and these computer systems that are divided also can be coupled as a complete computer system equally.This system often casing structure is complicated, needs multiple spot detecting temperature, has a plurality of fan governors, multiple duct heat radiation.
Common NUMA processor architecture or the server of single-processor system architecture, conventionally using hardware monitoring IC is class chip (as W83795 series).This series IC chip can be detected multi-point temp in server, and fan is controlled.But need to use a large amount of peripheral circuits, function singleness, controls IO mouth limited, is difficult to meet the application of different rotating speeds multi-fan controller.Adopt DSP as major control device, if encountered while processing multitask system, a slice DSP is not competent, thereby need to expand a slice DSP or fpga chip again, assist to control and realizes dual chip control.Do like this and both increased between two processors synchronous and the burden of communicating by letter, make again system real time variation, the prolongation system development time.For the large server system that has fpga chip, the functions such as fan control can be used soft the examining of nios II to show completely.This method had both been saved hardware peripheral circuit, saved chip kind, cost-saving, had again the expansivity of enriching function, by software, also can expand double-core and even multinuclear without additional chip, and software systems upgradability is strong.Therefore utilize the soft method of examining existing fan control of nios II, will be the trend that following many physical layers partitioned computer architecture large server fan based on NUMA is controlled development.
Summary of the invention
Technical assignment of the present invention is to solve the deficiencies in the prior art, and a kind of control method for fan based on NUMA Computer Architecture is provided.
Technological scheme of the present invention realizes in the following manner, this kind of control method for fan based on NUMA Computer Architecture, and its specific implementation step is:
Utilize FPGA in NUMA Computer Architecture in, programmable logic resource and the soft core of IP build the functional module interface of nios II soft-core processor, by this module, build the soft core of nios II, by Avalon bus, build peripheral PWM module, speed measuring module, SDRAM module, the outer flash memory module of sheet, the control structure of temperature measuring function, wherein
To peripheral PWM module controls build process, be: the PWM module I P core that builds the soft core of nios II, the waveform that this PWM module output duty cycle can regulate, and synchronous operation work-based logic and clock, work-based logic is used 32 digit counters to carry out frequency division to system clock, and then output is applicable to the adjustable waveform of dutycycle of PWM output; Processor is controlled the working state of PWM, it is read and write, interrupts to control, and by the value of register, regulate cycle and the dutycycle of PWM;
Speed measuring module is controlled to build process is: this speed measuring module is according to the fundamental frequency that provides given frequency, with grating as thresholding, survey the number of fundamental frequency pulse, by the cycle of fundamental frequency, calculated the cycle of grating signal, calculate again rotating speed, the speed that control of Fan Motor algorithm is measured according to speed measuring module is carried out algorithm adjustment, reaches closed loop control;
Temperature detecting is controlled to build process is: by the soft core of nios II, read detecting temperature, adopt Digital PID Algorithm to carry out the control of PWM closed-loop drive to DC fan controller.
Soft the endorsing of described nios II detected multi-point temp simultaneously, controls a plurality of fan different rotating speeds.
When the soft core of described nios II is extended to double-core or multinuclear, by software, realize.
The beneficial effect that the present invention compared with prior art produced is:
A kind of control method for fan based on NUMA Computer Architecture of the present invention can customize PWM module I P core, by temperature monitoring, PWM fan control module, rotation speed of the fan testing module, the functions such as DDR2 SDRAM stores control, Flash storage control are integrated in the soft core of nios II of FPGA; By using this scheme, save chip and use kind, reduce peripheral circuit and build, facilitate software administration, substitute conventional hardware monitoring IC chip.Monitor temperature point is many, and fan control is accurate flexibly, and expansibility is strong, practical, applied widely, is easy to promote.
Accompanying drawing explanation
Accompanying drawing 1 is integral frame schematic diagram of the present invention.
Accompanying drawing 2 is PWM functions of modules block diagrams of the present invention.
Accompanying drawing 3 is that in the present invention, Nios II builds frame schematic diagram.
Embodiment
Below in conjunction with accompanying drawing, a kind of control method for fan based on NUMA Computer Architecture of the present invention is described in detail below.
The invention provides a kind of control method for fan based on NUMA Computer Architecture, its specific implementation step is:
In NUMA Computer Architecture, build the soft core of nios II: use the Qsys in Quartus II software to set up the soft core system of nios II, add the IP kernel based on Avalon bus such as nios II Processor, JTAG Debug Module, DDR2 SDRAM Controller, System ID, EPCS Flash Controller, on chip RAM, PIO, PWM module.Set up phase-locked loop pll clock frequency division module.Configuration and compiling nios II, distribute pin, allocation project, and the soft core that completes nios II system after compilation and synthesis is built.Nios II builds framework as shown in Figure 3.
Add PLL phaselocked loop frequency division module.Above engineering can be added in original FPGA engineering.
As shown in Figure 1, utilize programmable logic resource and the soft core of IP in FPGA to build the functional module interface of nios II soft-core processor, by Avalon bus, realization is to peripheral PWM module, speed measuring module, SDRAM module, the outer flash memory module of sheet, temperature measuring function is controlled, wherein
To peripheral PWM module controls process, be: the PWM module I P core that builds the soft core of nios II, the waveform that this PWM module output duty cycle can regulate, and synchronous operation work-based logic and clock, work-based logic is used 32 digit counters to carry out frequency division to system clock, and then output is applicable to the adjustable waveform of dutycycle of PWM output; Processor is controlled the working state of PWM, it is read and write, interrupts to control, and by the value of register, regulate cycle and the dutycycle of PWM.
Further, PWM functions of modules block diagram as shown in Figure 2.The detailed process that PWM module I P core is set up is: the customed PWM module in system is by writing Verilog code, through emulation, compiling, pin assignments, finally generates PWM function module.Its effect in whole system is: actual measurement rotating speed is carried out to closed loop control by calculating.The CLK of PWM module is clock signal terminal; Sta is used for controlling DC motor positive and negative rotation; Value is duty cycle signals; PWM_A represents the dutycycle output of direct current generator when forward state; PWM_B represents the dutycycle output of direct current generator when reversion.By the fundamental frequency signal of system clock 50MHz 64 frequency divisions, fundamental frequency signal as PWM module, the one-period that 256 these fundamental frequency pulse signals of usining are exported as PWM, PWM of value appointment of the Value being provided by nios II processor high level lasting time in the cycle, the value that changes Value can change the value of dutycycle output.
To speed measuring module control procedure, be: this speed measuring module is according to the fundamental frequency that provides given frequency, with grating as thresholding, survey the number of fundamental frequency pulse, by the cycle of fundamental frequency, calculated the cycle of grating signal, calculate again rotating speed, the speed that control of Fan Motor algorithm is measured according to speed measuring module is carried out algorithm adjustment, reaches closed loop control.
To temperature detecting control procedure, be: by the soft core of nios II, read detecting temperature, adopt Digital PID Algorithm to carry out the control of PWM closed-loop drive to DC fan controller.
Further, to the detailed process of fan control, be: in FPGA, the soft core of nios II is detected point being monitored temperature by temperature transducer to utilize PWM module output PWM ripple to control rotation speed of the fan by parameter preset.Speed measuring module feeds back to the soft nuclear control device of nios II by the actual speed of fan and is used for regulating rotation speed of the fan, avoids error excessive.In the large complicated server system of the many physical layers partitioned computer based on NUMA.By laying, a plurality of temperature detecting points are set, the methods such as the different rotation speeds of the fan of different PWM module controls, realize the intelligent control of server system fan radiation system.And effectively reduced chip and used kind, reduce peripheral circuit and build, cost-saving, the upgradability of enhancing systems soft ware.
The soft core available software of Nios II realizes and is extended to double-core and even multinuclear, without additional chip.External storage chip can be supported the interpolation of more other management functions, and other IO pins of FPGA can be done other control and management functions.
The foregoing is only embodiments of the invention, within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (3)
1. the control method for fan based on NUMA Computer Architecture, it is characterized in that its specific implementation step is: utilize FPGA in NUMA Computer Architecture in, programmable logic resource and the soft core of IP build the functional module interface of nios II soft-core processor, by this module, build the soft core of nios II, by Avalon bus, build peripheral PWM module, speed measuring module, SDRAM module, the outer flash memory module of sheet, the control structure of temperature measuring function, wherein
To peripheral PWM module controls build process, be: the PWM module I P core that builds the soft core of nios II, the waveform that this PWM module output duty cycle can regulate, and synchronous operation work-based logic and clock, work-based logic is used 32 digit counters to carry out frequency division to system clock, and then output is applicable to the adjustable waveform of dutycycle of PWM output; Processor is controlled the working state of PWM, it is read and write, interrupts to control, and by the value of register, regulate cycle and the dutycycle of PWM;
Speed measuring module is controlled to build process is: this speed measuring module is according to the fundamental frequency that provides given frequency, with grating as thresholding, survey the number of fundamental frequency pulse, by the cycle of fundamental frequency, calculated the cycle of grating signal, calculate again rotating speed, the speed that control of Fan Motor algorithm is measured according to speed measuring module is carried out algorithm adjustment, reaches closed loop control;
Temperature detecting is controlled to build process is: by the soft core of nios II, read detecting temperature, adopt Digital PID Algorithm to carry out the control of PWM closed-loop drive to DC fan controller.
2. a kind of control method for fan based on NUMA Computer Architecture according to claim 1, is characterized in that: soft the endorsing of described nios II detected multi-point temp simultaneously, controls a plurality of fan different rotating speeds.
3. a kind of control method for fan based on NUMA Computer Architecture according to claim 1, is characterized in that: when the soft core of described nios II is extended to double-core or multinuclear, by software, realize.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104778110A (en) * | 2015-04-16 | 2015-07-15 | 浪潮电子信息产业股份有限公司 | Air duct abnormality detection method based on nios ii soft core for server system |
| CN104895817A (en) * | 2015-04-27 | 2015-09-09 | 浪潮集团有限公司 | SNMP-based method for controlling server fan |
| CN105856228A (en) * | 2016-05-03 | 2016-08-17 | 杭州电子科技大学 | Six-axis industrial robot speed measuring method based on FPGA |
| CN106711814A (en) * | 2017-03-06 | 2017-05-24 | 山东杰光电气科技股份有限公司 | Power distribution cabinet and temperature adjustment method thereof |
| CN107193713A (en) * | 2017-06-08 | 2017-09-22 | 山东超越数控电子有限公司 | A kind of FPGA and method for realizing mainboard management control |
| CN109088633A (en) * | 2018-09-20 | 2018-12-25 | 郑州云海信息技术有限公司 | A kind of pulse generator, method for generating pulse and electronic equipment |
| CN109139524A (en) * | 2017-06-19 | 2019-01-04 | 中兴通讯股份有限公司 | A kind of method, apparatus and storage medium of fan speed regulation |
| CN109212001A (en) * | 2017-06-30 | 2019-01-15 | 中国科学院微电子研究所 | Detection device and method |
| CN111288009A (en) * | 2020-03-06 | 2020-06-16 | 上海申矽凌微电子科技有限公司 | Method and system for integrating temperature voltage monitoring and fan control |
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| CN104778110A (en) * | 2015-04-16 | 2015-07-15 | 浪潮电子信息产业股份有限公司 | Air duct abnormality detection method based on nios ii soft core for server system |
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| CN106711814A (en) * | 2017-03-06 | 2017-05-24 | 山东杰光电气科技股份有限公司 | Power distribution cabinet and temperature adjustment method thereof |
| CN106711814B (en) * | 2017-03-06 | 2018-10-09 | 山东杰光电气科技股份有限公司 | Power distribution cabinet temperature control method |
| CN107193713A (en) * | 2017-06-08 | 2017-09-22 | 山东超越数控电子有限公司 | A kind of FPGA and method for realizing mainboard management control |
| CN107193713B (en) * | 2017-06-08 | 2020-05-26 | 山东超越数控电子股份有限公司 | FPGA and method for realizing mainboard management control |
| CN109139524A (en) * | 2017-06-19 | 2019-01-04 | 中兴通讯股份有限公司 | A kind of method, apparatus and storage medium of fan speed regulation |
| CN109139524B (en) * | 2017-06-19 | 2022-04-22 | 中兴通讯股份有限公司 | Method and device for regulating speed of fan and storage medium |
| CN109212001A (en) * | 2017-06-30 | 2019-01-15 | 中国科学院微电子研究所 | Detection device and method |
| CN109212001B (en) * | 2017-06-30 | 2021-02-05 | 中国科学院微电子研究所 | Detection device and method |
| CN109088633A (en) * | 2018-09-20 | 2018-12-25 | 郑州云海信息技术有限公司 | A kind of pulse generator, method for generating pulse and electronic equipment |
| CN109088633B (en) * | 2018-09-20 | 2021-12-03 | 郑州云海信息技术有限公司 | Pulse generator, pulse generating method and electronic equipment |
| CN111288009A (en) * | 2020-03-06 | 2020-06-16 | 上海申矽凌微电子科技有限公司 | Method and system for integrating temperature voltage monitoring and fan control |
| CN111288009B (en) * | 2020-03-06 | 2022-01-18 | 上海申矽凌微电子科技有限公司 | Method and system for integrating temperature voltage monitoring and fan control |
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Application publication date: 20140226 |