CN102282682B - Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level - Google Patents

Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level Download PDF

Info

Publication number
CN102282682B
CN102282682B CN201080004496.XA CN201080004496A CN102282682B CN 102282682 B CN102282682 B CN 102282682B CN 201080004496 A CN201080004496 A CN 201080004496A CN 102282682 B CN102282682 B CN 102282682B
Authority
CN
China
Prior art keywords
solution
weight
oxide etch
buffered oxide
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201080004496.XA
Other languages
Chinese (zh)
Other versions
CN102282682A (en
Inventor
乔安妮斯.T.V.胡格布姆
约翰尼斯.A.E.奥斯特霍尔特
萨布里纳.里特梅杰
卢卡斯.M.H.格罗尼伍德
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avantor Performance Materials BV
Original Assignee
Mallinckrodt Baker BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mallinckrodt Baker BV filed Critical Mallinckrodt Baker BV
Publication of CN102282682A publication Critical patent/CN102282682A/en
Application granted granted Critical
Publication of CN102282682B publication Critical patent/CN102282682B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D3/00—Other compounding ingredients of detergent compositions covered in group C11D1/00
    • C11D3/16—Organic compounds
    • C11D3/20—Organic compounds containing oxygen
    • C11D3/2075—Carboxylic acids-salts thereof
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D3/00—Other compounding ingredients of detergent compositions covered in group C11D1/00
    • C11D3/16—Organic compounds
    • C11D3/26—Organic compounds containing nitrogen
    • C11D3/30—Amines; Substituted amines ; Quaternized amines
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D3/00—Other compounding ingredients of detergent compositions covered in group C11D1/00
    • C11D3/39—Organic or inorganic per-compounds
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D3/00—Other compounding ingredients of detergent compositions covered in group C11D1/00
    • C11D3/39—Organic or inorganic per-compounds
    • C11D3/3947—Liquid compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876—Particular processes or apparatus for batch treatment of the devices
    • C11D2111/22—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Oil, Petroleum & Natural Gas (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Wood Science & Technology (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Sustainable Development (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Health & Medical Sciences (AREA)
  • Emergency Medicine (AREA)
  • Weting (AREA)
  • Photovoltaic Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Detergent Compositions (AREA)

Abstract

The invention provides a kind of for the thin film in light cell the processing method of amorphous or monocrystalline or polycrystalline silicon wafer substrate, described wafer substrates has at least one pn-junction or np knot and part phosphosilicate or borosilicate glass layer on the end face of its wafer substrates, thus increasing the sheet resistance of (a) wafer and at least one in photronic power density level that (b) is manufactured by this wafer.Present invention also offers a kind of acidic treatment solution, it comprises buffered oxide etch (BOE) solution, it comprises at least one tetra-alkyl ammonium hydroxide, acetic acid, at least one nonionic surfactant, at least one metal-chelator, metal-free source of ammonium, metal-free fluoride sources and water, and it mixes with oxidizing agent solution and optional water.

Description

Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level
Technical field
The present invention relates to acidic treatment compositions and this acidic treatment compositions and process for the thin film in light cell the purposes in the method for amorphous or monocrystalline or polycrystalline silicon wafer substrate, described wafer substrates has at least one pn-junction or np knot and part phosphosilicate or borosilicate glass layer on the end face of described wafer substrates, thus the sheet resistance increasing wafer and/or the photronic power density manufactured by described wafer.
Background of invention
Silica-based solar cell, or light cell, it is desirable to incident illumination could be converted into electric current by multiple processing steps.A step in these steps relates to generating emitter stage, completes to boron doped silicon wafer most commonly by phosphorus heat drives in (thermaldrive-in).This technique creates so-called dead layer (deadlayer), its high recombination fraction obtaining generating electric charge, and is unfavorable for the power density level of solaode.Additionally, this technique creates a kind of so-called phosphosilicate glass (PSG) layer at the top of wafer, containing phosphorus, silicon and oxygen in this layer, and the removing of this PSG layer can must be carried out battery manufacture.After hot injection process, phosphorus injects depth profile (phosphorousdepthprofile) and shows the high concentration platform extending to tens of or hundreds of nm deep (depending on process conditions) from surface.It is desirable that the concentration on nearly surface can be higher by (namely 1020-21Individual atom/cm3) such that it is able to contact electrode well.
The main target of polycrystalline light cell manufacturer is the cost of the energy reducing solaode transmission.This completes typically via the one in following two mode: reduces whole battery manufacture cost and/or improves conversion efficiency of solar cell.In order to realize latter object, current manufacturing process adopts a kind of emitter stage after etching technique (post-emitteretch) after phosphorus spreads, and removes this PSG layer by being immersed by wafer in HF.Previous experiment has shown that the extra process after HF soaks can produce higher battery efficiency, is up to 0.3% absolute value.The product (i.e. product P V-160) of current MallinckrodtBaker, Inc. is in this extra step.But, use this product to usually require that in the heating bath (70 DEG C or higher) of this product, process wafer substrates.
In the urgent need to providing a kind of compositions, compared with the result that currently used PV-160 product obtains, said composition can within identical or less process time and at reduced temperatures by improving the etching of the PSG layer to residual and deeper etching of dead layer being produced higher power density in solar cells.
Summary of the invention
In one embodiment of the invention, present invention provide for that the thin film in light cell is amorphous or the processing method of monocrystalline or polycrystalline silicon wafer substrate, thus increasing the sheet resistance of (a) wafer and at least one in photronic power density that (b) is manufactured by described wafer, described wafer substrates has pn-junction or np knot and/or part phosphosilicate and/or borosilicate glass layer on the end face of its wafer substrates, the treating method comprises at least one that make wafer substrates and contact with acidic treatment solution at a sufficient temperature in the photronic power density that time enough is prepared with the sheet resistance and (b) described wafer increasing (a) described wafer, described solution comprises:
Buffered oxide etch (BOE) solution containing following component:
At least one tetra-alkyl ammonium hydroxide of about 0.1 to about 20 weight %,
The acetic acid of about 0.1 to about 5 weight %,
At least one nonionic surfactant of about 0.1 to about 5 weight %,
At least one metal-chelator of about 0.1 to about 5 weight %,
Metal-free ammonium ion source (metalfreesourceofammoniumions) of about 0.1 to about 20 weight %,
Metal-free fluoride sources (metalfreesourceoffluorideions) of about 0.01 to about 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch (BOE) solution mixes with the volume ratio of the oxidant/water/BOE solution of 0.01-10/0-100/1 with oxidant and optional water.The wafer with emitter stage (emitter) includes P-type silicon and N-type silicon.
Although this process can increase the sheet resistance of wafer or photronic power density, but preferably increases these two.Additionally, this process can also increase the photronic efficiency manufactured by this wafer.
In another embodiment of the present invention, the invention provides a kind of process for the thin film in light cell the acidic treatment solution of amorphous or monocrystalline or polycrystalline silicon wafer substrate, thus increasing the sheet resistance of (a) described wafer and at least one in photronic power density level that (b) is manufactured by described wafer, described wafer substrates has pn-junction or np knot and/or part phosphosilicate and/or borosilicate glass layer on the end face of its wafer substrates, and wherein said acidic treatment solution comprises following mixture:
Buffered oxide etch (BOE) solution containing following component:
At least one tetra-alkyl ammonium hydroxide of about 0.1 to about 20 weight %,
The acetic acid of about 0.1 to about 5 weight %,
At least one nonionic surfactant of about 0.1 to about 5 weight %,
At least one metal-chelator of about 0.1 to about 5 weight %,
Metal-free ammonium ion source of about 0.1 to about 20 weight %,
Metal-free fluoride sources of about 0.01 to about 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch (BOE) solution mixes with the volume ratio of the oxidant/water/BOE solution of 0.01-10/0-100/1 with oxidant and optional water.The wafer with emitter stage includes P-type silicon and N-type silicon.
In the two embodiment, tetra-alkyl ammonium hydroxide percentage by weight in BOE solution is preferably 0.5 to 15%, and more preferably 1 to 10%, further preferably 1.5 to 8%, it is most preferred that 2 to 4%, and it is in particular 3.1%.
The percentage by weight of acetic acid is preferably 0.5 to 4%, and more preferably 0.8 to 3%, further preferably 1 to 2%, it is most preferred that 1 to 1.5%, and it is in particular 1-2%.
For nonionic surfactant, its percentage by weight is preferably 0.2 to 4%, and more preferably 0.3 to 2%, further preferably 0.5 to 1%, it is most preferred that 0.7 to 0.9%, and it is in particular 0.8%.
For chelating agen, its percentage by weight is preferably 0.2 to 4%, and more preferably 0.3 to 3%, further preferably 0.4 to 1%, it is most preferred that 0.5 to 0.8%, and it is in particular 0.6%.
For ammonium ion source, its percentage by weight is preferably 0.2 to 10%, and more preferably 0.3 to 5%, further preferably 0.5 to 2%, it is most preferred that 0.6 to 1%, and it is in particular 0.8%.
For fluoride sources, its percentage by weight is preferably 1 to 10%, and more preferably 0.5 to 5%, further preferably 1.0 to 3%, it is most preferred that 1.5 to 2.5%, and it is in particular 2.1%.
Although the sheet resistance that this process can increase wafer or the photronic power density manufactured by this wafer, but preferably increase these two.Additionally, this process can also increase the photronic efficiency manufactured by this wafer.
In yet other embodiments, this process carries out to the temperature less than 70 DEG C at about 20 DEG C.
In another preferred embodiment of the present invention, the pH value of described BOE solution is about 3 to less than 7, it is preferable that about 3 to about 6, more preferably about 4.3 to about 5.
In the another preferred embodiment of the present invention, oxidant package is containing hydrogen peroxide.Generally speaking, described oxidant is water and the hydrogen peroxide aqueous solution form (0.01% to 50% with any proper ratio, more preferably 0.1% to 30%, the even more preferably about aqueous solution of 30%), described proper ratio is typically about the ratio of 6/10.2 to about 6/1.
In the still another embodiment of the present invention, this BOE solution comprises Tetramethylammonium hydroxide as described tetra-alkyl ammonium hydroxide, 3, own-1-alkynes-3-the alcohol of 5-dimethyl is as described at least one surfactant, with EDTA as described at least one metal-chelator, and described oxidizing agent solution comprises hydrogen peroxide and water.
In the still another embodiment of the present invention, this BOE solution comprise about 3.1% Tetramethylammonium hydroxide, about 1.2% acetic acid, about 2.1% HF, about 0.8% 3, oneself-1-alkynes-3-alcohol of 5-dimethyl, the ammonium hydroxide of about 0.8%, the EDTA of about 0.6% and about 91.5% water, wherein said percentage ratio is weight percentage.
In the still another embodiment of the present invention, the ratio of this BOE solution and the oxidizing agent solution BOE/ water/hydrogen peroxide to be about 1/6/0.2 mixes.In another preferred embodiment of the present invention, the ratio of this BOE solution and the oxidizing agent solution BOE/ water/hydrogen peroxide to be about 1/6/0.8 mixes.In another preferred embodiment of the present invention, the ratio of this BOE solution and the oxidizing agent solution BOE/ water/hydrogen peroxide to be about 1/6/1 mixes.
In the still another embodiment of the present invention, this embodiment includes the combination of one or more above-mentioned preferred embodiment.
Additionally, the present invention may be used for the treatment temperature of about 20 DEG C to about 40 DEG C, this temperature applicable industry standards lower than 70 DEG C.
Detailed Description Of The Invention
The invention provides a kind of for the thin film in light cell the processing method of amorphous or monocrystalline or polycrystalline silicon wafer substrate, thus improving the sheet resistance of (a) wafer and at least one in photronic power density that (b) is manufactured by described wafer, described wafer substrates has pn-junction or np knot and/or part phosphosilicate and/or borosilicate glass layer on the end face of its wafer substrates, described method includes making wafer substrates contact time enough at a sufficient temperature with acidic treatment solution to increase at least one in (a) sheet resistance and (b) photronic power density, described acidic treatment solution comprises:
Buffered oxide etch (BOE) solution containing following component:
At least one tetra-alkyl ammonium hydroxide of about 0.1 to about 20 weight %,
The acetic acid of about 0.1 to about 5 weight %,
At least one nonionic surfactant of about 0.1 to about 5 weight %,
At least one metal-chelator of about 0.1 to about 5 weight %,
Metal-free ammonium ion source of about 0.1 to about 20 weight %,
Metal-free fluoride sources of about 0.01 to about 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch (BOE) solution mixes with the volume ratio of the oxidant/water/BOE solution of 0.01-10/0-100/1 with oxidant and optional water.The wafer with emitter stage includes P-type silicon and N-type silicon (bothp-andn-sourcesilicontypes).
Although the sheet resistance that this process can increase wafer or the photronic power density manufactured by this wafer, but preferably increase these two.Additionally, this process can also increase the photronic efficiency manufactured by this wafer.
Similarly, the invention provides a kind of process for the thin film in light cell the solution of amorphous or monocrystalline or polycrystalline silicon wafer substrate, thus increasing the sheet resistance of (a) described wafer and at least one in photronic power density level that (b) is manufactured by described wafer, described wafer substrates has pn-junction or np knot and/or part phosphosilicate and/or borosilicate glass layer on the end face of its wafer substrates, and wherein said acidic treatment solution comprises following mixture:
Buffered oxide etch (BOE) solution containing following component:
At least one tetra-alkyl ammonium hydroxide of about 0.1 to about 20 weight %,
The acetic acid of about 0.1 to about 5 weight %,
At least one nonionic surfactant of about 0.1 to about 5 weight %,
At least one metal-chelator of about 0.1 to about 5 weight %,
Metal-free ammonium ion source of about 0.1 to about 20 weight %,
Metal-free fluoride sources of about 0.01 to about 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch (BOE) solution mixes with the ratio of the oxidant/water/BOE solution of 0.01-10/0-100/1 with oxidant and optional water.The wafer with emitter stage includes P-type silicon and N-type silicon.
Although the sheet resistance that this process can increase wafer or the photronic power density manufactured by this wafer, but preferably increase these two.Additionally, this process can also increase the photronic efficiency manufactured by this wafer.
In the technique of the present invention, the step of application acidic treatment solution after removing phosphosilicate or borosilicate glass (not exclusively removing) with HF, and just again soaking with HF and follow-up ARC (AntiReflectiveCoating, ARC), before (as SiNxH deposits), it is applied on photovoltaic cell wafers substrate.The method includes making wafer substrates contact this acidic treatment solution at a sufficient temperature, as in the photronic power density that manufactured by this wafer with the sheet resistance and (b) increasing (a) wafer by wafer substrates is submerged in the heating bath of this solution the sufficient time at least one.This wafer substrates typically lasts for about 0.01 to about 20 minute with contacting of acidic treatment solution, it is preferable that about 0.5 to about 5 minute, more preferably from about 1 minute.The temperature of this solution is typically about 20 DEG C to less than approximately 70 DEG C, it is preferable that about 20 DEG C to about 60 DEG C, more preferably from about 20 DEG C to about 40 DEG C, even more preferably about 40 DEG C.
Suitable in acidic treatment compositions of the present invention it can be mentioned that formula [(R)4N+]p[X-q] tetra-alkyl ammonium hydroxide or its salt, wherein each R independently be substituted or unsubstituted alkyl, it is however preferred to have the alkyl of 1 to 22, more preferably 1 to 6, most preferably 1 carbon atom, and X=OH or suitable salt anionic, such as carbonate etc.；P and q is equal, and is the integer of 1 to 3.Wherein most preferably Tetramethylammonium hydroxide and trimethyl-2-hydroxyethylammoniumhydroxide hydroxide (choline).The example of other available quaternary ammonium hydroxides includes trimethyl-3-hydroxypropyl ammonium hydroxide, trimethyl-3-hydroxyl butyl ammonium hydroxide, trimethyl-4-hydroxyl butyl ammonium hydroxide, triethyl group-2-hydroxyethylammoniumhydroxide hydroxide, tripropyl-2-hydroxyethylammoniumhydroxide hydroxide, tributyl-2-hydroxyethylammoniumhydroxide hydroxide, dimethyl ethyl-2-hydroxyethylammoniumhydroxide hydroxide, dimethyl two (2-ethoxy) ammonium hydroxide, monomethyl three (2-ethoxy) ammonium hydroxide, tetraethyl ammonium hydroxide, TPAOH, TBAH, monomethyl triethylammonium hydroxide, monomethyl tripropyl ammonium hydroxide, monomethyl tributyl ammonium hydroxide, single ethyl-trimethyl ammonium hydroxide, single ethyl tributyl ammonium hydroxide, dimethyl diethyl ammonium hydroxide, dimethyl dibutyl ammonium hydroxide etc., and mixture.
Metal-free ammonium ion source can be any suitable metal-free ammonium salt, for instance ammonium hydroxide, ammonium fluoride, ammonium chloride, ammonium nitrate etc., but preferably ammonium hydroxide.Metal-free fluoride sources can be any suitable metal-free fluoride compound, and such as fluohydric acid gas, ammonium fluoride, quaternary ammonium fluoride is Methanaminium, N,N,N-trimethyl-, fluoride such as.Preferably, this metal-free fluoride sources is HF.In another preferred embodiment, ammonium ion and fluorion can pass through a kind of compound to be provided, i.e. ammonium fluoride.
The acidic treatment solution of the present invention can contain any suitable nonionic surfactant.For in the various suitable nonionic surfactant in treatment compositions of the present invention, it can be mentioned, for instance low become bubble property nonionic surfactant, such as alkynol surfactant, the surfactant of fluoride, as fluoride alkyl alkoxylates asFC-171, the Arrcostab of fluoride such as FC-430 and FC-431, and the polyoxyethylene alkanols of fluoride asFC-170C, the fatty acid ester of polyhydric alcohol, polyoxyethylene monoalkyl ethers, polyoxyethylene glycol, silicone-based surfactants and alkylene glycol monoalkyl ethers, such as butoxypropanol.The nonionic surfactant being preferably used as in acidic treatment compositions of the present invention is alkynol surfactant, particularly own-1-alkynes-3-the alcohol of 3,5-dimethylOr any otherSurfactant, the alkyl polyoxyethylene ethanol class of fluoride, particularlyFC-170C, and alkylene glycol monoalkyl ethers, particularly butoxypropanol.
Increasing preparation keeps any suitable metal-chelator of metals capacity to may be used in the acidic treatment compositions of the present invention in the solution.The representative instance of chelating agen for this purpose is following organic acid and their salt: ethylenediaminetetraacetic acid (EDTA), butanediamine tetraacethyl, hexamethylene-1, 2-ethylenediamine tetraacetic acid (EDTA) (CyDTA), diethylene-triamine pentaacetic acid, ethylenediamine tetrapropionic acid, (ethoxy) ethylenediamine triacetic acid (HEDTA), methyliminodiacetic acid, trimethylen-edinitrilo-tetraacetic acid, nitrilotriacetic acid (NTA), citric acid, tartaric acid, gluconic acid, glucosaccharic acid, glyceric acid, oxalic acid, phthalic acid, maleic acid, mandelic acid, malonic acid, lactic acid, salicylic acid, catechol, oxine, N, N, N ', N '-EDTMP, Deng.
Any suitable oxidant can be used, e.g., oxidizing anions, such as peroxide, nitric acid and salt thereof, and the nitrate of ammonium, persulfate, periodate, perbromate, perchlorate, iodate, bromate and chlorate.Preferably peroxide, particularly hydrogen peroxide.
The acidic treatment compositions of the present invention can be prepared to form compositions by mixing required composition in suitable container.Preferably, the required component of said composition is joined in container with the order of alkali/acid/base/acid, thus minimizing the heat that the reaction of each composition generates.
But, in the manufacture of solaode, this product not only can etch silicon oxide, also can etch silicon and phosphorus.For this purpose it is proposed, BOE needs to mix with the hydrogen peroxide as oxidant.This represents, in the continuous process of etching-oxidation, BOE etches away silicon oxide, and simultaneous oxidation agent produces new silicon oxide from the teeth outwards.Additionally, the phosphorus oxidation that this oxidant will exist in layer, thus dissolved.By adding chelating agen, the material (including but not limited to metal impurities) etched away is partially remained in solution, improves wettability of the surface (i.e. oxidant can the efficiency of oxidized surface) by interpolation surfactant simultaneously.Adding acetic acid and ensure that double buffering system (doublybufferedsystem), this contributes to technology stability.
The present invention will pass through, but be not limited to, and following example illustrate.In these embodiments, percentage ratio is weight percentage.
Embodiment 1
Industrial streamline (industrialtypein-line) light cell production process is processed one group of 25 adjacent polycrystalline silicon wafer and (is of a size of about 15.6 × 15.6cm2, thickness is about 180-200 μm).After emitter stage deposits and removes phosphorus glass with HF, this wafer has part phosphosilicate glass layer at the end face of wafer substrates, makes this wafer at the acidic treatment solution of 40 DEG C of contact (1) present invention,；(2) the PV-160 solution of prior art, this solution requires at 70 DEG C；Or (3) non-processor solution, as comparison.The acidic treatment solution of the present invention comprises BOE solution, its comprise about 3.1% Tetramethylammonium hydroxide, about 1.2% acetic acid, about 2.1% HF, about 0.8% oneself-1-alkynes-3-alcohol of 3,5-dimethyl, about 0.8% ammonium hydroxide, about 0.6% EDTA, about 91.5% water.The ratio of this BOE solution and hydrogen peroxide oxidant solution BOE/ water/30% hydrogenperoxide steam generator to be about 1/6/0.2 mixes.PV-160 solution of the prior art also mixes with the ratio of hydrogen peroxide oxidant solution BOE/ water/30% hydrogenperoxide steam generator to be about 1/6/0.2.Then, in the HF solution of 1 weight %, in room temperature, this wafer processed being carried out the wet chemical process of 1 minute, then implementing common photoelectricity manufacturing step thus preparing required light cell.When processing difference group, holding electrode electric discharge setting (Electrodefiringsetting) is constant, and the electric discharge that prior art group is set to the best is arranged.Measure power density level (the unit mW/cm of each battery2, it is defined as the product of short-circuit current density and open-circuit voltage, Jsc × Voc).Result is shown below in 1.
Table 1
Embodiment 2
Industrial assembly line light battery production operation is processed one group of 25 adjacent polycrystalline silicon wafer and (is of a size of about 15.6 × 15.6cm2, thickness is about 180-200 μm).After emitter stage deposits and removes phosphorus glass with HF, this wafer has part phosphosilicate glass layer at the end face of wafer substrates, makes this wafer at the acidic treatment solution of 40 DEG C of contact (1) present invention；(2) the PV-160 solution of prior art, this solution requires at 70 DEG C.The process solution of the present invention comprises BOE solution, its comprise about 3.1% Tetramethylammonium hydroxide, about 1.2% acetic acid, about 2.1% HF, about 0.8% oneself-1-alkynes-3-alcohol of 3,5-dimethyl, about 0.8% ammonium hydroxide, about 0.6% EDTA, about 91.5% water.The ratio of this BOE solution and hydrogen peroxide oxidant solution BOE/ water/30% hydrogen peroxide to be about 1/6/0.8 mixes.PV-160 solution of the prior art also mixes with the ratio of hydrogen peroxide oxidant solution BOE/ water/30% hydrogenperoxide steam generator to be about 1/6/0.2.Then, in the HF solution of 1 weight %, in room temperature, this wafer processed being carried out the wet chemical process of 1 minute, then implementing common photoelectricity manufacturing step thus preparing required light cell.When processing difference group, holding electrode electric discharge arranges constant, and the electric discharge that prior art group is set to the best is arranged.Measure power density level (the unit mW/cm of each battery2, it is defined as the product of short-circuit current density and open-circuit voltage, Jsc × Voc).Result is shown below in 2.
Table 2
Embodiment 3
Industrial assembly line light battery production operation is processed one group of 25 adjacent polycrystalline silicon wafer and (is of a size of about 15.6 × 15.6cm2, thickness is about 180-200 μm).After emitter stage deposits and removes phosphorus glass with HF, this wafer has part phosphosilicate glass layer at the end face of wafer substrates, makes this wafer contact the acidic treatment solution of (1) present invention with 40 DEG C at 25 DEG C, 30 DEG C；(2) the PV-160 solution of prior art, this solution requires at 70 DEG C；Or (3) non-processor solution, as comparison.The acidic treatment solution of the present invention comprises BOE solution, its comprise about 3.1% Tetramethylammonium hydroxide, about 1.2% acetic acid, about 2.1% HF, about 0.8% oneself-1-alkynes-3-alcohol of 3,5-dimethyl, about 0.8% ammonium hydroxide, about 0.6% EDTA, about 91.5% water.The ratio of this BOE solution and hydrogen peroxide oxidant solution BOE/ water/30% hydrogenperoxide steam generator to be about 1/6/1 mixes.PV-160 solution of the prior art also mixes with the ratio of hydrogen peroxide oxidant solution BOE/ water/hydrogenperoxide steam generator to be about 1/6/0.2.Then, in the HF solution of 1 weight %, in room temperature, this wafer processed being carried out the wet chemical process of 1 minute, then implementing common photoelectricity manufacturing step thus preparing required light cell.When processing difference group, holding electrode electric discharge arranges constant, and the electric discharge that prior art group is set to the best is arranged.Result is shown below in 3.
Table 3
As shown in these results, the compositions of the present invention, compared with matched group, significantly increases the power density of sheet resistance and/or battery.By changing mixing ratio, especially by the amount increasing hydrogen peroxide, the compositions of the present invention shows with PV-160 on an equal basis or more excellent power density.But the compositions of the present invention can realize this purpose the temperature range of 20 DEG C to 40 DEG C, and PV-160 compositions requires could realize at 70 DEG C.
While the invention has been described herein with reference to the specific embodiments thereof it should be appreciated that be under premise without departing from the spirit and scope of the present invention, to carry out various change, improvement or change.Therefore, the invention is intended to include the change of all these spirit and scope falling into claims, improvement or change.

Claims (30)

1. the processing method of or monocrystalline or polycrystalline silicon wafer substrate amorphous for the thin film in light cell, described wafer substrates has at least one in pn-junction or np knot and part phosphosilicate or borosilicate glass layer on the end face of its wafer substrates, thus at least one increasing in (a) sheet resistance and (b) photronic power density, described method includes making wafer substrates to contact at least one in the photronic power density that time enough is prepared with the sheet resistance and (b) described wafer increasing (a) described wafer at a sufficient temperature with acidic treatment solution, described acidic treatment solution comprises:
Buffered oxide etch solution containing following component:
At least one tetra-alkyl ammonium hydroxide of 0.1 to 20 weight %,
The acetic acid of 0.1 to 5 weight %,
At least one nonionic surfactant of 0.1 to 5 weight %,
At least one metal-chelator of 0.1 to 5 weight %,
Metal-free ammonium ion source of 0.1 to 20 weight %,
Metal-free fluoride sources of 0.01 to 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch solution mixes with the volume ratio of the oxidizing agent solution/water/buffered oxide etch solution of 0.01-10/0-100/1 with oxidizing agent solution and optional water,
Wherein said process carries out to the temperature less than 70 DEG C at 20 DEG C.
2. method according to claim 1, the pH value of wherein said buffered oxide etch solution is 3 to 6.
3. method according to claim 2, the pH value of wherein said buffered oxide etch solution is 4.3 to 5.
4. method according to claim 1, wherein said oxidizing agent solution comprises hydrogen peroxide.
5. method according to claim 2, wherein said oxidizing agent solution comprises hydrogen peroxide.
6. method according to claim 3, wherein said oxidizing agent solution comprises hydrogen peroxide.
7. the method any one of claim 1～6, wherein said buffered oxide etch solution comprises the Tetramethylammonium hydroxide as described tetra-alkyl ammonium hydroxide, as described at least one surfactant 3, own-1-alkynes-3-the alcohol of 5-dimethyl, with the EDTA as described at least one metal-chelator, and described oxidizing agent solution comprises hydrogen peroxide and water.
8. method according to claim 7, wherein said buffered oxide etch solution comprises the water of EDTA and the 91.4 weight % of the Tetramethylammonium hydroxide of 3.1 weight %, the acetic acid of 1.2 weight %, the HF of 2.1 weight %, the own-1-alkynes-3-alcohol of 3,5-dimethyl of 0.8 weight %, the ammonium hydroxide of 0.8 weight %, 0.6 weight %.
9. method according to claim 8, wherein said buffered oxide etch solution mixes with the ratio ranging for buffered oxide etch solution/water/30% hydrogen peroxide of 1/6/0.2-1.0 with oxidizing agent solution.
10. method according to claim 8, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/0.2 with oxidizing agent solution.
11. method according to claim 8, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/0.8 with oxidizing agent solution.
12. method according to claim 8, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/1 with oxidizing agent solution.
13. the method any one of claim 1～6, wherein said process also improves the photronic efficiency manufactured by this wafer.
14. method according to claim 7, wherein said process also improves the photronic efficiency manufactured by this wafer.
15. method according to claim 8, wherein said process also improves the photronic efficiency manufactured by this wafer.
16. method according to claim 9, wherein said process also improves the photronic efficiency manufactured by this wafer.
17. method according to claim 10, wherein said process also improves the photronic efficiency manufactured by this wafer.
18. method according to claim 11, wherein said process also improves the photronic efficiency manufactured by this wafer.
19. method according to claim 12, wherein said process also improves the photronic efficiency manufactured by this wafer.
20. process amorphous for the thin film in light cell or monocrystalline or polycrystalline silicon wafer substrate acidic treatment solution, described wafer substrates has at least one in pn-junction or np knot and part phosphosilicate or borosilicate glass layer on the end face of its wafer substrates, thus increasing the sheet resistance of (a) described wafer and at least one in photronic power density that (b) is manufactured by described wafer, described acidic treatment solution comprises following mixture:
Buffered oxide etch solution containing following component:
At least one tetra-alkyl ammonium hydroxide of 0.1 to 20 weight %,
The acetic acid of 0.1 to 5 weight %,
At least one nonionic surfactant of 0.1 to 5 weight %,
At least one metal-chelator of 0.1 to 5 weight %,
Metal-free ammonium ion source of 0.1 to 20 weight %,
Metal-free fluoride sources of 0.01 to 20 weight %,
Add to the excess water of 100%；
This buffered oxide etch solution mixes with the volume ratio of the oxidizing agent solution/water/buffered oxide etch solution of 0.01-10/0-100/1 with oxidizing agent solution and optional water.
21. acidic treatment solution according to claim 20, the pH value of wherein said buffered oxide etch solution is 3 to 6.
22. acidic treatment solution according to claim 21, the pH value of wherein said buffered oxide etch solution is 4.3 to 5.
23. acidic treatment solution according to claim 20, wherein said oxidizing agent solution comprises hydrogen peroxide.
24. acidic treatment solution according to claim 21, wherein said oxidizing agent solution comprises hydrogen peroxide.
25. the acidic treatment solution according to any one of claim 20 to 24, wherein said buffered oxide etch solution comprises the Tetramethylammonium hydroxide as described tetra-alkyl ammonium hydroxide, as described at least one surfactant 3, own-1-alkynes-3-the alcohol of 5-dimethyl, with the EDTA as described at least one metal-chelator, and described oxidizing agent solution comprises hydrogen peroxide and water.
26. acidic treatment solution according to claim 25, wherein said buffered oxide etch solution comprises the water of EDTA and the 91.4 weight % of the Tetramethylammonium hydroxide of 3.1 weight %, the acetic acid of 1.2 weight %, the HF of 2.1 weight %, the own-1-alkynes-3-alcohol of 3,5-dimethyl of 0.8 weight %, the ammonium hydroxide of 0.8 weight %, 0.6 weight %.
27. acidic treatment solution according to claim 26, wherein said buffered oxide etch solution mixes with the ratio ranging for buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/0.2-1.0 with oxidizing agent solution.
28. acidic treatment solution according to claim 26, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/0.2 with oxidizing agent solution.
29. acidic treatment solution according to claim 26, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/0.8 with oxidizing agent solution.
30. acidic treatment solution according to claim 26, wherein said buffered oxide etch solution mixes with the ratio of buffered oxide etch solution/water/30% hydrogenperoxide steam generator of 1/6/1 with oxidizing agent solution.
CN201080004496.XA 2009-01-14 2010-01-11 Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level Active CN102282682B (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US14447909P 2009-01-14 2009-01-14
US61/144,479 2009-01-14
US22568509P 2009-07-15 2009-07-15
US61/225,685 2009-07-15
PCT/EP2010/000076 WO2010081661A2 (en) 2009-01-14 2010-01-11 Solution for increasing wafer sheet resistance and/or photovoltaic cell power density level

Publications (2)

Publication Number Publication Date
CN102282682A CN102282682A (en) 2011-12-14
CN102282682B true CN102282682B (en) 2016-07-06

Family

ID=42272664

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201080004496.XA Active CN102282682B (en) 2009-01-14 2010-01-11 Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level

Country Status (14)

Country Link
EP (1) EP2387801A2 (en)
JP (1) JP2012515444A (en)
KR (1) KR20110105396A (en)
CN (1) CN102282682B (en)
AU (1) AU2010205945A1 (en)
BR (1) BRPI1006176A2 (en)
CA (1) CA2749836A1 (en)
IL (1) IL213936A0 (en)
MX (1) MX2011007413A (en)
RU (1) RU2011134068A (en)
SG (1) SG172973A1 (en)
TW (1) TW201036058A (en)
WO (1) WO2010081661A2 (en)
ZA (1) ZA201105863B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102011050136A1 (en) 2010-09-03 2012-03-08 Schott Solar Ag Process for the wet-chemical etching of a silicon layer
EP2514799A1 (en) 2011-04-21 2012-10-24 Rohm and Haas Electronic Materials LLC Improved polycrystalline texturing composition and method
DE102011103538A1 (en) 2011-06-07 2012-12-13 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for doping e.g. p-type semiconductor substrate while manufacturing crystalline silicon solar cell, involves utilizing doped silicon as sources, where doped silicon is provided with part of silicon-, hydrogen-atoms of specified range
CN113980580B (en) * 2021-12-24 2022-04-08 绍兴拓邦新能源股份有限公司 Alkali etching polishing method for monocrystalline silicon wafer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4113551A (en) * 1976-11-19 1978-09-12 International Business Machines Corporation Polycrystalline silicon etching with tetramethylammonium hydroxide
US5705089A (en) * 1992-03-11 1998-01-06 Mitsubishi Gas Chemical Company, Inc. Cleaning fluid for semiconductor substrate
CN1659480A (en) * 2002-06-07 2005-08-24 马林克罗特贝克公司 Cleaning compositions for microelectronic substation

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010066769A (en) * 1999-04-20 2001-07-11 가네꼬 히사시 Cleaning liquid
JP2003152176A (en) * 2001-11-14 2003-05-23 Matsushita Electric Ind Co Ltd Method of cleaning semiconductor device and its manufacturing method
JP4319006B2 (en) * 2003-10-23 2009-08-26 シャープ株式会社 Method for manufacturing solar battery cell
JP4553597B2 (en) * 2004-01-30 2010-09-29 シャープ株式会社 Method for manufacturing silicon substrate and method for manufacturing solar cell
US20070099806A1 (en) * 2005-10-28 2007-05-03 Stewart Michael P Composition and method for selectively removing native oxide from silicon-containing surfaces
WO2008157345A2 (en) * 2007-06-13 2008-12-24 Advanced Technology Materials, Inc. Wafer reclamation compositions and methods

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4113551A (en) * 1976-11-19 1978-09-12 International Business Machines Corporation Polycrystalline silicon etching with tetramethylammonium hydroxide
US5705089A (en) * 1992-03-11 1998-01-06 Mitsubishi Gas Chemical Company, Inc. Cleaning fluid for semiconductor substrate
CN1659480A (en) * 2002-06-07 2005-08-24 马林克罗特贝克公司 Cleaning compositions for microelectronic substation

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PERFORMANCE IMPROVEMENT IN SIMPLIFIED PROCESSING FOR SCREEN-PRINTED mc-Si SOLAR CELLS;M.S. Jeon;《Photovoltaic Specialists Conference,2005. Conference Record of the Thirty-first IEEE》;20051231;第1096页左栏倒数第11行至第1099页右栏第8行 *

Also Published As

Publication number Publication date
EP2387801A2 (en) 2011-11-23
AU2010205945A1 (en) 2011-09-01
MX2011007413A (en) 2011-07-21
TW201036058A (en) 2010-10-01
CN102282682A (en) 2011-12-14
BRPI1006176A2 (en) 2019-09-24
WO2010081661A3 (en) 2010-10-07
JP2012515444A (en) 2012-07-05
SG172973A1 (en) 2011-08-29
ZA201105863B (en) 2012-04-25
IL213936A0 (en) 2011-07-31
RU2011134068A (en) 2013-02-20
WO2010081661A2 (en) 2010-07-22
CA2749836A1 (en) 2010-07-22
KR20110105396A (en) 2011-09-26

Similar Documents

Publication Publication Date Title
US8366954B2 (en) Solution for increasing wafer sheet resistance and/or photovoltaic cell power density level
CN102181935B (en) Method and corrosive liquid for making texture surface of monocrystalline silicon
US8883543B2 (en) Method of producing wafer for solar cell, method of producing solar cell, and method of producing solar cell module
US9537037B2 (en) Wet etching method for an N-type bifacial cell
CN104562011B (en) The texturing assistant agent and process for etching of polysilicon chip
TWI573859B (en) Texture etching solution composition and texture etching method of crystalline silicon wafers (1)
US10217893B2 (en) Methods, apparatus, and systems for passivation of solar cells and other semiconductor devices
CN102282682B (en) Increase the solution of wafer sheet resistance and/or photovoltaic cell power density level
US9324899B2 (en) Emitter diffusion conditions for black silicon
TWI542664B (en) Texture etching solution composition and texture etching method of crystalline silicon wafers (2)
CN108447944A (en) A kind of N-type PERT double-side cell preparation methods
CN102716867B (en) Method for cleaning crystalline silicon slice of solar battery
CN112812776A (en) Corrosive liquid and preparation method and application thereof
WO2013153950A1 (en) Coating dispersant composition, method for producing coating dispersant composition, solar cell, and method for manufacturing solar cell
CN116004233A (en) Etching additive for improving uniformity of textured surface of silicon wafer and use method
CN106784131A (en) Solar battery sheet based on N-type silicon chip and preparation method thereof
CN103510160A (en) Monocrystalline silicon system flocking additive for crystalline silicon solar battery
CN104278330A (en) Texturing liquid for crystalline silicon solar cell and preparation method thereof
CN102181936A (en) Method and corrosive liquid for manufacturing multicrystalline silicon texture
CN115478327B (en) Monocrystalline silicon etching texturing additive, monocrystalline silicon etching texturing liquid containing monocrystalline silicon etching texturing additive, preparation method and application of monocrystalline silicon etching texturing additive
WO2018043523A1 (en) Method for forming boron diffusion layer and phosphorus diffusion layer
JP5880055B2 (en) Method for producing solar cell wafer, method for producing solar cell, and method for producing solar cell module
CN115976652A (en) Micro-texturing polishing process
Basu et al. Achieving higher efficiencies with a low-cost etch for in-line-diffused silicon wafer cells
JP2015162661A (en) Coating type phosphorus doping material for silicon solar cell

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant