CN102279609B - Voltage regulator and reference voltage generating circuit thereof - Google Patents
Voltage regulator and reference voltage generating circuit thereof Download PDFInfo
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- CN102279609B CN102279609B CN201010203955.9A CN201010203955A CN102279609B CN 102279609 B CN102279609 B CN 102279609B CN 201010203955 A CN201010203955 A CN 201010203955A CN 102279609 B CN102279609 B CN 102279609B
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Abstract
The invention discloses a voltage regulator and a reference voltage generating circuit thereof. The voltage regulator comprises a reference voltage generating circuit, a comparator, a driving unit and a feedback unit, wherein the input end of the driving unit is connected with the output end of the comparator; the output end of the driving unit serves as the output end of the voltage regulator; the input end of the feedback unit is connected with the output end of the driving unit; the output end of the feedback unit is connected with the first input end of the comparator; the reference voltage generating circuit comprises a first voltage dividing unit and a second voltage dividing unit; the first voltage dividing unit is used for dividing a first voltage in the working mode of a load unit to generate a first reference voltage input to the second input end of the comparator; the second voltage dividing unit is used for dividing a second voltage in the standby mode of the load unit to generate a second reference voltage input to the second input end of the comparator; and the second reference voltage is greater than the first reference voltage. According to the invention, the influence of amplitude perturbation on the work of the load unit can be lowered, and the floor area of a decoupling capacitor is small.
Description
Technical field
The present invention relates to the generating circuit from reference voltage of voltage regulator and voltage regulator.
Background technology
Chip internal often needs a plurality of voltage accurately, as control signal or the reference voltage signal of disparate modules, as the program voltage in flash memory (flash memory), erasing voltage etc.Voltage generation circuit of the prior art is generally used reference voltage source to produce reference voltage, re-uses comparer, driver element and feedback unit this reference voltage is regulated, and produces the output voltage of relevant voltage value according to the demand of disparate modules.
Refer to Fig. 1, existing voltage regulator comprises generating circuit from reference voltage 1, comparer 2, driver element 3 and feedback unit 4, and driver element 3 output voltage V out are to load unit 5.Generating circuit from reference voltage 1 is in order to produce reference voltage.Two input ends of comparer 2 connect respectively the output terminal of generating circuit from reference voltage 1 and the output terminal of feedback unit 4, and the output terminal of comparer 2 connects the input end of described driver element 3.The output terminal of driver element 3 connects input end and the load unit 5 of feedback unit 4.Described load unit 5 can comprise capacitor type load unit and/or current mode load unit, as the read control signal port of flush memory device.
Refer to Fig. 2, Fig. 2 is the physical circuit figure of the voltage regulator of Fig. 1, and wherein, wherein driver element 3 specifically comprises PMOS transistor M1, feedback unit 4 specifically comprises the resistor network consisting of resistance R 1 and resistance R 2, and the branch pressure voltage that feedback unit 4 produces is as feedback voltage Vfb.The reference voltage Vref that comparer 2 produces in order to compare feedback voltage Vfb and generating circuit from reference voltage 1.The conducting of driver element 3 or cut-off are determined by the comparative result of comparer 2, after repeatedly feeding back, make feedback voltage Vfb be tending towards equating with the magnitude of voltage of reference voltage Vref, thereby obtain stable output voltage V out.In actual applications, can make output voltage V out by the adjustment magnitude of voltage of reference voltage Vref and the resistance value of the resistor network in feedback unit 4 is scheduled voltage.
Refer to Fig. 3, the mode of operation of the load unit 5 of access voltage regulator has multiple, conventionally can comprise mode of operation and standby mode, such as, when load unit is storer, in the different moment, be operated in respectively mode of operation (Active mode), standby mode (Standby mode) and originate mode (Initialmode), described mode of operation refers to the pattern of storer execution read operation or write operation, described standby mode refers to that storer neither carries out read operation, do not carry out the pattern of write operation yet, described originate mode is the mode of operation while just having powered on to storer.In prior art, reference voltage for voltage regulator is fixed value, when load unit 5 transfers mode of operation (execution read operation) to from standby mode, load unit 5 can produce shunting effect, and owing to fixing by the transient current of PMOS transistor M1, like this, cause diminishing by the electric current of resistance R 1 and R2, the magnitude of voltage of the output voltage V out of whole voltage regulator is reduced, the feedback voltage Vfb that feedback unit 4 produces simultaneously also reduces, after the feedback of certain hour, output voltage V out recovers gradually, therefore, load unit 5 transfers to the process of mode of operation from standby mode, there is downward amplitude dither in the voltage curve of output voltage V out, affect the normal work of load unit 5, such as, the speed of storer execution read operation is slack-off.
Refer to Fig. 4, the phenomenon that occurs amplitude dither for fear of load unit 5 variations, the way of prior art is to be connected decoupling capacitance C1 between driver element 3 and ground, and such scheme also can be referring to No. 200610121677.6, the Chinese patent application of Novatek Technology Co.In such scheme, decoupling capacitance C1 is for output voltage V out that can burning voltage regulator, and the capacitance of decoupling capacitance C1 is larger, can make like this area of decoupling capacitance C1 larger, and cost is high.In addition, decoupling capacitance C1 is for output voltage V out that can burning voltage regulator, and whole circuit need to be worked so that store electric charge on decoupling capacitance C1 always, can make like this power consumption of whole voltage regulator high.
Summary of the invention
The technical matters that the present invention solves is that amplitude dither, the problem that power consumption is high and area occupied is large appear in the voltage of voltage regulator output.
In order to address the above problem, the invention provides a kind of voltage regulator, this voltage regulator comprises generating circuit from reference voltage, comparer, driver element and feedback unit, comparer has first input end, the second input end and output terminal; The input end of driver element is connected with the output terminal of comparer, the output terminal that the output terminal of driver element is voltage regulator; The input end of feedback unit is connected with the output terminal of driver element, the output terminal of feedback unit is connected with the first input end of comparer, described generating circuit from reference voltage comprises the first partial pressure unit and the second partial pressure unit, and the first partial pressure unit produces the first reference voltage of the second input end that inputs to described comparer under the mode of operation of described load unit to the first voltage dividing potential drop; The second partial pressure unit produces the second reference voltage of the second input end that inputs to described comparer under the standby mode of described load unit to second voltage dividing potential drop, described the second reference voltage is greater than the first reference voltage.
Alternatively, also comprise compensating circuit and second switch, second switch conducting when described the second reference voltage drops to preset value, described compensating circuit is connected with the second partial pressure unit by second switch, compensates the second reference voltage of described the second partial pressure unit output when described second switch conducting.
Alternatively, described compensating circuit comprises the first resistance, the second resistance and the 4th switch, the first end input tertiary voltage of the first resistance, and the second end is connected with the first end of the second resistance; The 4th switch is transistor, and first utmost point of the 4th switch is connected in the second end of the second resistance, the second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is inputted the first control signal; Described second switch is transistor, and first utmost point of this second switch is connected between the first resistance and the second resistance, and second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal the 4th switch and second switch effectively and described in conducting when described the second reference voltage drops to preset value.
Alternatively, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, the first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is transistor, first utmost point of the 4th switch connects the grid of transistor seconds, the second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects the first control signal, described second switch is transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal second switch and the 4th switch described in conducting when described the second reference voltage drops to preset value.
Alternatively, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, the first end of the 3rd electric capacity is inputted the output voltage of described driver element, the second end of described the 3rd electric capacity connects the first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized the first utmost point input the 4th voltage, the 7th transistorized second utmost point connects described the 8th transistorized first utmost point, the 8th transistorized the second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, at the output voltage of driver element during lower than preset value, node between the 7th transistorized second utmost point and the 8th transistor first order is exported described the first control signal.
Alternatively, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, the first end of the 3rd resistance is inputted described the first voltage, the second end of the 3rd resistance is connected with the first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described the first reference voltage; Described the first switch is transistor, and this first switch first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, and the control utmost point of the first switch is inputted the second control signal; The 3rd switch is transistor, first utmost point of the 3rd switch is connected in the second end of the 4th resistance, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
Alternatively, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is inputted described the first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, described the first switch is transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, the control utmost point of the first switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
Alternatively, described the second partial pressure unit comprises the first electric capacity and second electric capacity of serial connection, the first end of the first electric capacity is inputted described second voltage, the second end of the first electric capacity connects the first end of the second electric capacity, the second end ground connection of the second electric capacity, the node between described the first electric capacity and the second electric capacity is exported described the second reference voltage.
Alternatively, described the second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is inputted described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized the second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described the second reference voltage.
Alternatively, also comprise decoupling capacitance, this moves back lotus root electric capacity and is connected between the output terminal and ground of driver element.
A kind of generating circuit from reference voltage of voltage regulator, described voltage regulator is used for output voltage to load unit, this generating circuit from reference voltage comprises the first partial pressure unit and the second partial pressure unit, and described the first partial pressure unit produces the first reference voltage to the first voltage dividing potential drop under the mode of operation of described load unit; Described the second partial pressure unit produces the second reference voltage to second voltage dividing potential drop under the standby mode of load unit, and described the second reference voltage is greater than the first reference voltage.
Alternatively, also comprise compensating circuit and second switch, second switch conducting when described the second reference voltage drops to preset value, described compensating circuit is connected with the second partial pressure unit by second switch, compensates the second reference voltage of described the second partial pressure unit output when described second switch conducting.
Alternatively, described compensating circuit comprises the first resistance, the second resistance and the 4th switch, the first end input tertiary voltage of the first resistance, and the second end is connected with the first end of the second resistance; The 4th switch is transistor, and first utmost point of the 4th switch is connected in the second end of the second resistance, the second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is inputted the first control signal; Described second switch is transistor, and first utmost point of this second switch is connected between the first resistance and the second resistance, and second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal the 4th switch and second switch effectively and described in conducting when described the second reference voltage drops to preset value.
Alternatively, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, the first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is transistor, first utmost point of the 4th switch connects the grid of transistor seconds, the second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects the first control signal, described second switch is transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal second switch and the 4th switch described in conducting when described the second reference voltage drops to preset value.
Alternatively, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, the first end of the 3rd electric capacity is inputted the output voltage of described driver element, the second end of described the 3rd electric capacity connects the first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized the first utmost point input the 4th voltage, the 7th transistorized second utmost point connects described the 8th transistorized first utmost point, the 8th transistorized the second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, at the output voltage of driver element during lower than preset value, node between the 7th transistorized second utmost point and the 8th transistor first order is exported described the first control signal.
Alternatively, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, the first end of the 3rd resistance is inputted described the first voltage, the second end of the 3rd resistance is connected with the first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described the first reference voltage; Described the first switch is transistor, and this first switch first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, and the control utmost point of the first switch is inputted the second control signal; The 3rd switch is transistor, first utmost point of the 3rd switch is connected in the second end of the 4th resistance, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
Alternatively, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is inputted described the first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized grid, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, described the first switch is transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, the control utmost point of the first switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
Alternatively, described the second partial pressure unit comprises the first electric capacity and second electric capacity of serial connection, the first end of the first electric capacity is inputted described second voltage, the second end of the first electric capacity connects the first end of the second electric capacity, the second end ground connection of the second electric capacity, the node between described the first electric capacity and the second electric capacity is exported described the second reference voltage.
Alternatively, described the second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is inputted described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized the second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described the second reference voltage.
Compared with prior art, the invention has the beneficial effects as follows:
1, the present invention produces the first reference voltage under mode of operation by reference to voltage generation circuit, under standby mode, produce the second reference voltage and make the second reference voltage be greater than the first reference voltage, thereby when load unit transfers mode of operation to from standby mode, the impact of the amplitude dither of output voltage that can reduce voltage regulator on load unit work, and, in the situation that load unit is less, can cancel decoupling capacitance, reduced cost.
2, because the second reference voltage is greater than the first reference voltage, like this, can slowly to the voltage of voltage regulator, compensate by decoupling capacitance, now, it is less that decoupling capacitance can be done.Thereby electric capacity area occupied is little, cost is low.
3, compensating circuit of the present invention compensates the second reference voltage during lower than preset value at the second reference voltage, thereby, not only can guarantee that the second reference voltage is greater than the first reference voltage, and, the second partial pressure unit is formed by capacitor combination, do not have electric current to flow through, so the second partial pressure unit does not produce power consumption under standby mode, and compensating circuit is only just worked during lower than preset value at the output voltage of driver element, therefore, generating circuit from reference voltage low in energy consumption, and then, voltage regulator low in energy consumption.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing the first voltage regulator;
Fig. 2 is the physical circuit figure of the voltage regulator of Fig. 1;
Fig. 3 is the schematic diagram of load unit reference voltage under different working modes of access Fig. 1;
Fig. 4 is the structural representation of existing the second voltage regulator;
Fig. 5 is the theory diagram of voltage regulator of the present invention;
Fig. 6 is the physical circuit figure of generating circuit from reference voltage first embodiment of voltage regulator of the present invention;
Fig. 7 is the schematic diagram that load unit accesses voltage regulator of the present invention reference voltage under different working modes;
Fig. 8 is the structural representation that produces the voltage detection circuit of the first control signal shown in Fig. 6;
Fig. 9 is the physical circuit figure of generating circuit from reference voltage second embodiment of voltage regulator of the present invention.
Embodiment
The present inventor is in the process of design voltage regulator, discovery is because the value of reference voltage is fixed, when the load unit of access voltage regulator switches to another mode of operation from a kind of mode of operation, such as storer transfers mode of operation (while carrying out read operation) to from standby mode, load unit can produce shunting effect, and fix by the transient current of PMOS transistor M1, the electric current of resistance R 1 and R2 of causing like this flowing through diminishes, thereby, the output voltage V out of voltage regulator reduces, simultaneously, the feedback voltage vfb that feedback unit produces also reduces, because the magnitude of voltage of comparer and driver element will pass through certain feedback delay, could recover, therefore, feedback delay during this period of time in, there is amplitude dither and affect the work of load unit in the voltage Vout that can make voltage regulator output, such as, affect storer reading speed.And when decoupling capacitance being set eliminating this phenomenon, described decoupling capacitance area occupied is large, power consumption is high.
For this reason, the invention provides a kind of voltage regulator, this voltage regulator can be exported corresponding reference voltage according to the variation of load unit mode of operation, such as, when mode of operation, export the first reference voltage, at standby mode, export the second reference voltage, and the first reference voltage of exporting while being greater than mode of operation of the second reference voltage of exporting when standby mode.
Refer to Fig. 5, the voltage regulator of the present embodiment comprises generating circuit from reference voltage 6, comparer 2, driver element 3, feedback unit 4.Comparer 2 has first input end, the second input end and output terminal, the output terminal of feedback unit 4 is connected in the first input end of comparer 2, the input end of driver element 3 is connected in the output terminal of comparer 2, and the output terminal of driver element 3 is to load unit 5 output voltage V out and be connected in the input end of feedback unit 4.In the present embodiment, described driver element 3, feedback unit 4 are identical with the structure of background technology, but, it will be appreciated by those skilled in the art that, the driver element of other types and feedback unit are possessing under the condition of the driver element 3 of the present embodiment and the identical functions of feedback unit 4, can be for the present invention.
Please continue to refer to Fig. 5 and Fig. 6, Fig. 6 is the first embodiment of generating circuit from reference voltage 6 of the present invention, and the generating circuit from reference voltage 6 of this embodiment comprises the first partial pressure unit 61, the first switch 62, the second partial pressure unit 63, compensating circuit 64 and second switch 65.
The first partial pressure unit 61 is resistance pressure-dividing network in the present embodiment.This resistance pressure-dividing network comprises the 3rd resistance R 3, the 4th resistance R 4 and the 3rd switch T3.The first end of the 3rd resistance R 3 is inputted the first voltage (such as VDD), and the second end of the 3rd resistance R 3 is connected with the first end of the 4th resistance R 4, and the node between the 3rd resistance R 3 and the 4th resistance R 4 is the output terminal of described the first partial pressure unit 61.The 3rd switch T3 is nmos pass transistor in the present embodiment, first utmost point of the 3rd switch T3 (such as drain electrode) is connected in the second end of the 4th resistance R 4, second utmost point (such as the source electrode) ground connection of the 3rd switch T3, the control utmost point (such as grid) input the second control signal act of the 3rd switch T3.Described the second control signal act is effective when the mode of operation of load unit 5, thereby, conducting the 3rd switch T3.
The first switch 62 is nmos pass transistor T1 in the present embodiment, first switch 62 first utmost points are connected between the 3rd resistance R 3 and the 4th resistance R 4, second utmost point of the first switch 62 is connected in the output terminal of the second partial pressure unit 63, the control utmost point (such as grid) the input second control signal act of this first switch 62.
The second partial pressure unit 63 comprises the first capacitor C 2 and the second capacitor C 3, node between this first capacitor C 2 and the second capacitor C 3 is the output terminal of the second partial pressure unit 63, export described the second reference voltage, also be the output terminal vref of generating circuit from reference voltage 6, the first end input second voltage (such as VDD) of the first capacitor C 2, the second end of the first capacitor C 2 is connected with the first end of the second capacitor C 3, the second end ground connection of the second capacitor C 3.
Described compensating circuit 64 comprises the first resistance R 5, the second resistance R 6 and the 4th switch T4, the first end of the first resistance R 5 connects tertiary voltage (such as VDD), the second end of the first resistance R 5 connects the first end of the second resistance R 6, in the present embodiment, the first voltage, second voltage and tertiary voltage are VDD, certainly, also can need to regulate the first voltage, second voltage and tertiary voltage according to dividing potential drop, make the first voltage, second voltage and tertiary voltage unequal.The 4th switch T4 is nmos pass transistor, first utmost point of the 4th switch T4 (such as drain electrode) is connected in the second end of the second resistance R 6, the second utmost point ground connection of the 4th switch T4, the control utmost point (such as grid) input the first control signal bleed of the 4th switch T4.The first control signal bleed is effective when the output voltage V out of driver element 3 drops to preset value, thereby, conducting the 4th switch T4.
Second switch 65 is nmos pass transistor T2, first utmost point of this second switch 65 is connected between the first resistance R 5 and the second resistance R 6, second utmost point of second switch 65 is connected to the output terminal (between the first capacitor C 2 and the second capacitor C 3) of the second partial pressure unit 63, the control utmost point (such as grid) the input first control signal bleed of second switch 65.
Refer to Fig. 8, the first control signal bleed is produced by voltage detection circuit 7, and as shown in Figure 8, voltage detection circuit 7 comprises the 3rd capacitor C 4 and the 4th capacitor C 5, the 7th transistor T 13 and the 8th transistor T 14 of serial connection.The 3rd capacitor C 4 and the 4th capacitor C 5 serial connections, the first end of the 3rd capacitor C 4 is inputted the output voltage V out of described driver element 3, and the second end of described the 3rd capacitor C 4 connects the first end of the 4th capacitor C 5.The second end ground connection of the 4th capacitor C 5.The 7th transistor T 13 is PMOS transistor, the control utmost point (as grid) of the 7th transistor T 13 is connected between the 3rd capacitor C 4 and the 4th capacitor C 5, the first utmost point input the 4th voltage VDD of the 7th transistor T 13, second utmost point of the 7th transistor T 13 connects first utmost point of described the 8th transistor T 14.The 8th transistor T 14 is nmos pass transistor, the second utmost point ground connection of the 8th transistor T 14, and the control utmost point (as grid) of the 8th transistor T 14 connects the 5th voltage VDD.Node between second utmost point of the 7th transistor T 13 and the 8th transistor T 14 first utmost points is exported described the first control signal bleed.
It should be noted that, voltage detection circuit 7 is not limited to the circuit structure shown in Fig. 8, as long as in the time of having voltage drop to preset value, the voltage detecting voltage that can export a control signal can be applied to the present invention, such as, adopt differential comparison circuit to realize the circuit of voltage detecting.Voltage detecting circuit shown in Fig. 8 is realized voltage detecting with employing differential comparison circuit and is compared, when the 7th transistor T 13 (PMOS transistor) turn-offs, and can current sinking.
Refer to Fig. 5, Fig. 6, Fig. 7 and Fig. 8, the load unit 5 of take illustrates that as storer as example the course of work of voltage regulator of the present embodiment is as follows:
When originate mode (Initial mode), load unit 5 and voltage regulator are powered on and produce the first control signal act and make the first switch 62 and the 3rd switch T3 conducting, now, second switch 65 disconnects, because the first voltage VDD is output as direct current, like this, the second partial pressure unit 63 lost efficacy, 61 pairs of the first voltage VDD dividing potential drops of the first partial pressure unit of generating circuit from reference voltage 6 and export the first reference voltage vref1=VDD/ (1+R3/R4), this reference voltage vref1 inputs to the second input end of comparer 2.Then 2 couples of the first reference voltage vref1 of comparer and feedback voltage vfb compares until output voltage V out, how output voltage V out belongs to prior art for comparer 2, driver element 3 and feedback unit 4, does not repeat them here.
At standby mode (Standby mode), the first switch 62 and second switch 65 all disconnect, and now, the second reference voltage vref2 that generating circuit from reference voltage 6 produces is the dividing potential drop of 63 couples of second voltage VDD of the second partial pressure unit.The partial pressure value that describes the second partial pressure unit 63 below in detail, makes C2=KC3 by technology controlling and process, according to CHARGE DISTRIBUTION principle, and the first capacitor C 2=VDD-vref2, the second capacitor C 3=vref2, thus, can solve
reference voltage vref2 inputs to the second input end of comparer 1.Under standby mode, the electric charge of the first capacitor C 2 and the second capacitor C 3 can tail off gradually and the value of the second reference voltage vref2 is reduced gradually, thereby the output voltage V out that makes driver element 3 is during lower than preset value (as the little triangle in Fig. 7), because the output voltage V out of the 3rd capacitor C 4 and 5 pairs of driver elements 3 of the 4th capacitor C carries out dividing potential drop, therefore, the voltage of the node between the 3rd capacitor C 4 and the 4th capacitor C 5 reduces, thereby make the lower voltage of VSET, the 7th transistor T 13 conductings, thereby, export the first control signal bleed, and because the grid of nmos pass transistor T14 meets VDD, in conducting state, the voltage of the second control signal bleed producing can be dragged down, thereby, second switch 65 and the 4th switch T4 conducting, by compensating circuit, 64 couples of the second reference voltage vref2 compensate, now, bucking voltage vb=VDDR6/ (R5+R6), when 64 pairs of the second partial pressure unit 63 chargings of compensating circuit, the value of the second reference voltage vref2 is risen to
time, stop charging.Described preset value is conventionally than the low 0.3V of the output voltage V out of driver element 3 or 0.4V, such as, when the output voltage V out of driver element 3 is 2.5V, preset value can be made as 2.2V.In this generating circuit from reference voltage 6, as long as the value of the output voltage V out of driver element 3 is during lower than preset value, compensating circuit 64 is started working, like this, the first reference voltage vref1 when the second reference voltage vref2 under standby mode is greater than mode of operation all the time, after adopting in this way, not only can guarantee that the second reference voltage is greater than the first reference voltage, and, the second partial pressure unit 63 is combined by the first capacitor C 2 and the second capacitor C 3, do not have electric current to flow through, so the second partial pressure unit 63 does not produce power consumption under standby mode, and compensating circuit 64 is only just worked during lower than preset value at the output voltage V out of driver element 3, therefore, generating circuit from reference voltage 6 low in energy consumption, and then, voltage regulator low in energy consumption.
Above-mentioned voltage regulator is when work, and the 3rd switch T3 and the 4th switch T4 be conducting in the time of the first partial pressure unit 61 and compensating circuit 64 work respectively, at other, constantly disconnects, like this, can prevent electric leakage and affect the work of voltage regulator, thereby, the performance of storer affected.
At mode of operation (Active mode), owing to not producing the first control signal bleed, so the second switch 65 of generating circuit from reference voltage 6 disconnects, the first switch 62 conductings, now, the principle that produces reference voltage is identical with the principle of the reference voltage producing when the originate mode, does not repeat them here.Due to
vref1=VDD/ (1+R3/R4), the value of adjusting R3, R4 and K can be so that vref2 > be vref1.
Due to the second reference voltage vref2 > vref1, corresponding vout2 > vout1, like this, the magnitude of voltage that voltage regulator is exported when the standby mode of load unit 5 is greater than the magnitude of voltage of the output of originate mode or mode of operation, the amplitude dither variable quantity of carrying out read operation when described load unit 5 is T, , by regulating K, the value of R3 and R4, can be so that vout2-T > be vout1, that is to say, the magnitude of voltage when value after amplitude dither can be slightly higher than mode of operation, in such cases, can avoid the impact of amplitude dither on load unit 5 work, in addition, due to vout2 > vout1, the reference point of amplitude dither has been improved with respect to vout1, like this, can be slowly by being connected to the output terminal of driver element 3 and the decoupling capacitance C6 between ground compensates the voltage of node vout1, also can reduce the impact of amplitude dither on load unit 5 work, and, even in the situation that load unit 5 is larger, it is less that decoupling capacitance C6 also can do.Thereby decoupling capacitance area occupied is little, cost is low.
In above-described embodiment, under mode of operation, when the conducting by the first switch 62 makes first partial pressure unit 61 output the first reference voltage vref1, the second partial pressure unit 63 is invalid; Under standby mode, disconnection by the first switch 62 makes second partial pressure unit 63 output the second reference voltage vref2, based on this kind of thinking, in other embodiment, can make the first partial pressure unit 61 selected and the first reference voltage vref1 is exported to the second input end of comparer under mode of operation by gating switch, under standby mode, select the second partial pressure unit 63 the second reference voltage vref2 to be exported to the second input end of comparer.
Refer to Fig. 9, Fig. 9 is the second embodiment of the generating circuit from reference voltage 6 of voltage regulator of the present invention, in this embodiment, the first partial pressure unit 66, the second partial pressure unit 67 and compensating circuit 68 are different from the structure of the first partial pressure unit 61, the second partial pressure unit 63 and the compensating circuit 64 of the first embodiment.
Refer to Fig. 9, described the first partial pressure unit 66 comprises the 3rd transistor T 5, the 4th transistor T 6 and the 3rd switch T7.The 3rd transistor T 5 is PMOS transistor, and first utmost point of the 3rd transistor T 5 connects the first voltage (such as VDD), and the control utmost point (such as grid) of the 3rd transistor T 5 is connected with second utmost point of the 3rd transistor T 5.The 4th transistor T 6 is PMOS transistor, and first utmost point of the 4th transistor T 6 is connected in the control utmost point of the 3rd transistor T 5, and the control utmost point (such as grid) of the 4th transistor T 6 is connected with second utmost point of the 4th transistor T 6.The 3rd switch T7 is nmos pass transistor, first utmost point of the 3rd switch T7 is connected in the control utmost point (such as grid) of the 4th transistor T 6, the second utmost point ground connection of the 3rd switch T7, the control utmost point (such as grid) the input second control signal act of the 3rd switch.
Refer to Fig. 9, the second partial pressure unit 67 comprises the 5th transistor T 8 and the 6th transistor T 9.The 5th transistor T 8 is PMOS transistor, first utmost point of the 5th transistor T 8 connects second voltage (such as VDD), the control utmost point (such as grid) of the 5th transistor T 8 is connected with second utmost point of the 5th transistor T 8, and the substrate of the 5th transistor T 8 connects substrate bias voltage VB.The 6th transistor T 9 is PMOS transistor, and first utmost point of the 6th transistor T 9 is connected in the control utmost point (such as grid) of the 5th transistor T 8, the control utmost point (such as grid) of the 6th transistor T 9 and the second utmost point ground connection of the 6th transistor T 9.
Refer to Fig. 9, compensating circuit 68 comprises the first transistor T10, transistor seconds T11 and the 4th switch T12.The first transistor T10 is PMOS transistor, first utmost point of the first transistor T10 connects tertiary voltage (such as VDD), the control utmost point (such as grid) of the first transistor T10 is connected with second utmost point of the first transistor T10, and the substrate of the first transistor T10 connects substrate bias voltage VB.Transistor seconds T11 is PMOS transistor, and first utmost point of transistor seconds T11 is connected in the control utmost point (such as grid) of the first transistor T10, the control utmost point (such as grid) of transistor seconds T11 and the second utmost point ground connection of transistor seconds T11.Described the 4th switch T12 is nmos pass transistor, first utmost point of the 4th switch T12 connects the control utmost point (such as grid) of transistor seconds T11, the second utmost point ground connection of the 4th switch T12, the control utmost point (such as grid) input the first control signal bleed of the 4th switch T12, described the first control signal bleed conducting second switch 65 when described the second reference voltage drops to preset value.
In this embodiment, the effect of the 3rd transistor T 5 and the 4th transistor T 6 is identical with the effect of the 4th resistance R 4 with the 3rd resistance R 3, the effect of the 5th transistor T 8 and the 6th transistor T 9 is identical with the effect of the second capacitor C 3 with the first capacitor C 2, the effect of the first transistor T10 and transistor seconds T11 is identical with the effect of the first resistance R 5 and R6, therefore, the principle of work of the present embodiment is the same with the first embodiment, does not repeat them here.
Although the present invention discloses as above with preferred embodiment, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with claim limited range.
Claims (19)
1. a voltage regulator,, comprising to load unit for output voltage:
Generating circuit from reference voltage;
Comparer, has first input end, the second input end and output terminal;
Driver element, the input end of this driver element is connected with the output terminal of comparer, the output terminal that the output terminal of this driver element is voltage regulator;
Feedback unit, the input end of this feedback unit is connected with the output terminal of driver element, and the output terminal of feedback unit is connected with the first input end of comparer, it is characterized in that, and described generating circuit from reference voltage comprises:
The first partial pressure unit produces the first reference voltage of the second input end that inputs to described comparer under the mode of operation of described load unit to the first voltage dividing potential drop;
The second partial pressure unit produces the second reference voltage of the second input end that inputs to described comparer under the standby mode of described load unit to second voltage dividing potential drop, described the second reference voltage is greater than the first reference voltage.
2. voltage regulator as claimed in claim 1, it is characterized in that, also comprise compensating circuit and second switch, second switch conducting when described the second reference voltage drops to preset value, described compensating circuit is connected with the second partial pressure unit by second switch, compensates the second reference voltage of described the second partial pressure unit output when described second switch conducting.
3. voltage regulator as claimed in claim 2, is characterized in that, described compensating circuit comprises the first resistance, the second resistance and the 4th switch, the first end input tertiary voltage of the first resistance, and the second end is connected with the first end of the second resistance; The 4th switch is transistor, and first utmost point of the 4th switch is connected in the second end of the second resistance, the second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is inputted the first control signal; Described second switch is transistor, and first utmost point of this second switch is connected between the first resistance and the second resistance, and second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal the 4th switch and second switch effectively and described in conducting when described the second reference voltage drops to preset value.
4. voltage regulator as claimed in claim 2, it is characterized in that, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, the first utmost point input tertiary voltage of the first transistor, and the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is transistor, first utmost point of the 4th switch connects the control utmost point of transistor seconds, the second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects the first control signal, described second switch is transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal second switch and the 4th switch described in conducting when described the second reference voltage drops to preset value.
5. the voltage regulator as described in claim 3 or 4, it is characterized in that, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, the first end of the 3rd electric capacity is inputted the output voltage of described driver element, the second end of described the 3rd electric capacity connects the first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized the first utmost point input the 4th voltage, the 7th transistorized second utmost point connects described the 8th transistorized first utmost point, the 8th transistorized the second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, at the output voltage of driver element during lower than preset value, node between the 7th transistorized second utmost point and the 8th transistor first order is exported described the first control signal.
6. voltage regulator as claimed in claim 1, it is characterized in that, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, the first end of the 3rd resistance is inputted described the first voltage, the second end of the 3rd resistance is connected with the first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described the first reference voltage; Described the first switch is transistor, and this first switch first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, and the control utmost point of the first switch is inputted the second control signal; The 3rd switch is transistor, first utmost point of the 3rd switch is connected in the second end of the 4th resistance, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
7. voltage regulator as claimed in claim 1, it is characterized in that, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is inputted described the first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized control utmost point, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, described the first switch is transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, the control utmost point of the first switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
8. voltage regulator as claimed in claim 1, it is characterized in that, described the second partial pressure unit comprises the first electric capacity and second electric capacity of serial connection, the first end of the first electric capacity is inputted described second voltage, the second end of the first electric capacity connects the first end of the second electric capacity, the second end ground connection of the second electric capacity, the node between described the first electric capacity and the second electric capacity is exported described the second reference voltage.
9. voltage regulator as claimed in claim 1, it is characterized in that, described the second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is inputted described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized the second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described the second reference voltage.
10. voltage regulator as claimed in claim 1, is characterized in that, also comprises decoupling capacitance, and this decoupling capacitance is connected between the output terminal and ground of driver element.
The generating circuit from reference voltage of 11. 1 kinds of voltage regulators, described voltage regulator is used for output voltage to load unit, it is characterized in that, comprise the first partial pressure unit and the second partial pressure unit, described the first partial pressure unit produces the first reference voltage to the first voltage dividing potential drop under the mode of operation of described load unit; Described the second partial pressure unit produces the second reference voltage to second voltage dividing potential drop under the standby mode of load unit, and described the second reference voltage is greater than the first reference voltage.
The generating circuit from reference voltage of 12. voltage regulators as claimed in claim 11, it is characterized in that, also comprise compensating circuit and second switch, second switch conducting when described the second reference voltage drops to preset value, described compensating circuit is connected with the second partial pressure unit by second switch, compensates the second reference voltage of described the second partial pressure unit output when described second switch conducting.
The generating circuit from reference voltage of 13. voltage regulators as claimed in claim 12, it is characterized in that, described compensating circuit comprises the first resistance, the second resistance and the 4th switch, the first end input tertiary voltage of the first resistance, and the second end is connected with the first end of the second resistance; The 4th switch is transistor, and first utmost point of the 4th switch is connected in the second end of the second resistance, the second utmost point ground connection of the 4th switch, and the control utmost point of the 4th switch is inputted the first control signal; Described second switch is transistor, and first utmost point of this second switch is connected between the first resistance and the second resistance, and second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal the 4th switch and second switch effectively and described in conducting when described the second reference voltage drops to preset value.
The generating circuit from reference voltage of 14. voltage regulators as claimed in claim 12, it is characterized in that, described compensating circuit comprises the first transistor, transistor seconds and the 4th switch, the first utmost point input tertiary voltage of the first transistor, the control utmost point of the first transistor is connected with second utmost point of the first transistor; First utmost point of transistor seconds is connected in the control utmost point of the first transistor, the control utmost point of transistor seconds and second utmost point of transistor seconds are connected, described the 4th switch is transistor, first utmost point of the 4th switch connects the control utmost point of transistor seconds, the second utmost point ground connection of the 4th switch, the control utmost point of the 4th switch connects the first control signal, described second switch is transistor, first utmost point of this second switch connects the control utmost point of the first transistor, second utmost point of second switch is connected to the output terminal of the second partial pressure unit, and the control utmost point of second switch is inputted the first control signal; Under the standby mode of load unit, described the first control signal second switch and the 4th switch described in conducting when described the second reference voltage drops to preset value.
The generating circuit from reference voltage of 15. voltage regulators as described in claim 13 or 14, it is characterized in that, also comprise voltage detection circuit, this voltage detection circuit comprises the 3rd electric capacity and the 4th electric capacity of serial connection, the 7th transistor and the 8th transistor, the 3rd electric capacity and the 4th capacitance series, the output voltage of the first end input driver element of the 3rd electric capacity, the second end of described the 3rd electric capacity connects the first end of the 4th electric capacity, the second end ground connection of the 4th electric capacity, the 7th transistorized control utmost point is connected between the 3rd electric capacity and the 4th electric capacity, the 7th transistorized the first utmost point input the 4th voltage, the 7th transistorized second utmost point connects described the 8th transistorized first utmost point, the 8th transistorized the second utmost point ground connection, the 8th transistorized control utmost point connects the 5th voltage, at the output voltage of driver element during lower than preset value, node between the 7th transistorized second utmost point and the 8th transistor first order is exported described the first control signal.
The generating circuit from reference voltage of 16. voltage regulators as claimed in claim 11, it is characterized in that, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd resistance, the 4th resistance and the 3rd switch, the first end of the 3rd resistance is inputted described the first voltage, the second end of the 3rd resistance is connected with the first end of the 4th resistance, and the node between the 3rd resistance and the 4th resistance is exported described the first reference voltage; Described the first switch is transistor, and this first switch first utmost point is connected between the 3rd resistance and the 4th resistance, and second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, and the control utmost point of the first switch is inputted the second control signal; The 3rd switch is transistor, first utmost point of the 3rd switch is connected in the second end of the 4th resistance, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
The generating circuit from reference voltage of 17. voltage regulators as claimed in claim 11, it is characterized in that, described generating circuit from reference voltage also comprises the first switch, described the first partial pressure unit comprises the 3rd transistor, the 4th transistor and the 3rd switch, the 3rd transistorized first utmost point is inputted described the first voltage, the 3rd transistorized control utmost point is connected with the 3rd transistorized second utmost point, the 4th transistorized first utmost point is connected in the 3rd transistorized control utmost point, the 4th transistorized control utmost point is connected with the 4th transistorized second utmost point, the 3rd switch is transistor, first utmost point of the 3rd switch is connected in the 4th transistorized control utmost point, the second utmost point ground connection of the 3rd switch, the control utmost point of the 3rd switch is inputted the second control signal, described the first switch is transistor, first utmost point of this first switch is connected in the 3rd transistorized control utmost point, second utmost point of the first switch is connected in the output terminal of the second partial pressure unit, the control utmost point of the first switch is inputted the second control signal, the second control signal the first switch and the 3rd switch described in conducting when the mode of operation of load unit.
The generating circuit from reference voltage of 18. voltage regulators as claimed in claim 11, it is characterized in that, described the second partial pressure unit comprises the first electric capacity and second electric capacity of serial connection, the first end of the first electric capacity is inputted described second voltage, the second end of the first electric capacity connects the first end of the second electric capacity, the second end ground connection of the second electric capacity, the node between described the first electric capacity and the second electric capacity is exported described the second reference voltage.
The generating circuit from reference voltage of 19. voltage regulators as claimed in claim 11, it is characterized in that, described the second partial pressure unit comprises the 5th transistor and the 6th transistor, the 5th transistorized first utmost point is inputted described second voltage, the 5th transistorized control utmost point is connected with the 5th transistorized second utmost point, the 6th transistorized first utmost point is connected in the 5th transistorized control utmost point, the 6th transistorized control utmost point and the 6th transistorized the second utmost point ground connection, the node between the 5th transistorized second utmost point and the 6th transistorized first utmost point is exported described the second reference voltage.
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| CN103854695B (en) * | 2012-11-30 | 2017-02-08 | 英业达科技有限公司 | Voltage generating device |
| CN103413568B (en) * | 2013-08-22 | 2016-09-07 | 上海华虹宏力半导体制造有限公司 | Reference voltage provides circuit |
| CN104158244B (en) * | 2014-08-06 | 2016-08-24 | 上海凌阳科技有限公司 | Single order constant current mode charging circuit and the changeable charging circuit of constant current-constant voltage mode |
| CN104464788B (en) * | 2014-12-30 | 2017-06-06 | 上海华虹宏力半导体制造有限公司 | The control circuit and memory of bleeder circuit, operating voltage |
| CN107305403B (en) * | 2016-04-19 | 2019-03-12 | 上海和辉光电有限公司 | A kind of low power consumption voltage generation circuit |
| US20190041939A1 (en) * | 2016-10-26 | 2019-02-07 | Hewlett-Packard Development Company, L.P. | Power management |
| JP6522201B1 (en) * | 2018-05-14 | 2019-05-29 | ウィンボンド エレクトロニクス コーポレーション | Semiconductor device |
| CN111324161A (en) * | 2018-12-14 | 2020-06-23 | 华润矽威科技（上海）有限公司 | Integrating circuit and integrating method thereof |
| CN114167929B (en) * | 2020-09-11 | 2023-03-24 | 兆易创新科技集团股份有限公司 | Voltage generating circuit and electronic device |
| CN114020083B (en) * | 2021-10-26 | 2023-05-12 | 普冉半导体(上海)股份有限公司 | Current source circuit |
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