CN102270580A

CN102270580A - Method for manufacturing high voltage N-channel metal oxide semiconductor (NMOS) tube

Info

Publication number: CN102270580A
Application number: CN2010101945221A
Authority: CN
Inventors: 陈国安; 王向春; 彭钦宏; 李克寰; 李明灿
Original assignee: Hejian Technology Suzhou Co Ltd
Current assignee: Hejian Technology Suzhou Co Ltd
Priority date: 2010-06-04
Filing date: 2010-06-04
Publication date: 2011-12-07

Abstract

The invention relates to a method for manufacturing a high voltage N-channel metal oxide semiconductor (NMOS) tube. The method at least comprises the following steps of: providing a substrate and forming a high-pressure P trap on the substrate; and forming a high voltage NMOS structure on the high voltage P trap, wherein when the high voltage NMOS structure is formed, the dosage concentration of implantation of high voltage NMOS drifts close to the drain and the source of the high voltage NMOS structure can be reduced. During manufacturing of the high voltage NMOS tube, the dosage concentration of implantation of the high voltage NMOS drifts is reduced, and the restraint of remarkable increase of leakage current after a device is subjected to a Vt stability test can be realized.

Description

A kind of method of making the high pressure NMOS pipe

Technical field

The present invention relates to a kind of method of making the high pressure NMOS pipe.

Background technology

In the prior art, the MOS device of making is carried out threshold voltage (Vt) stability test, gate voltage (GATE) adds 1.1Vcc, after continuing 168 hours under 150 ℃ the environment, as shown in Figure 1, find that the leakage current Idl of device has reached more than 1 microampere, be far longer than and receive the peace rank normally.

Summary of the invention

At the above-mentioned shortcoming and defect of prior art, the present invention proposes a kind of method of making the high pressure NMOS pipe, comes suppression device to carry out the increase of leakage current behind the Vt stability test by reducing the doping content of implanting the high pressure NMOS drift region.

In view of above-mentioned, the present invention proposes a kind of method of making the integrated high voltage metal-oxide-semiconductor, may further comprise the steps:

Substrate is provided;

On described substrate, form the high pressure P trap;

On described high pressure P trap, form the high pressure NMOS structure;

When forming the high pressure NMOS structure, reduce the drain electrode of described high pressure NMOS structure and the doping content that implant near the high pressure NMOS drift region the source electrode.

Preferred as technique scheme, when forming the high pressure NMOS structure, what implanted described high pressure NMOS drift region is N type ion, the doping content after reducing is 6.6E-12 (+/-10%) (number of ions/square centimeter).

Preferred as technique scheme, described N type ion is phosphorus or arsenic.

Preferred as technique scheme for the high pressure NMOS pipe with lightly doped drain, reduces the implant concentration of lightly doped drain.

Preferred as technique scheme, the implant concentration of described lightly doped drain is reduced to: 6.6E-12 (+/-10%) (number of ions/square centimeter).

Preferred as technique scheme for the high pressure NMOS pipe, is not provided with lightly doped drain.

The present invention reduces the doping content that implant high pressure NMOS S drift region in the manufacture process of high pressure NMOS pipe, realized device is carried out the inhibition that leakage current obviously increases behind the Vt stability test.

Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.For the person of ordinary skill in the field, from detailed description of the invention, above-mentioned and other purposes of the present invention, feature and advantage will be apparent.

Description of drawings

Fig. 1 adopts the device of prior art manufacturing to carry out the schematic diagram of leakage current behind the Vt stability test;

Fig. 2 is the structural representation of the high pressure NMOS pipe of prior art manufacturing;

Fig. 3 adopts the device of manufacturing of the present invention to carry out the schematic diagram of leakage current behind the Vt stability test.

Embodiment

Be described in further detail below in conjunction with the method for the drawings and specific embodiments manufacturing high pressure NMOS pipe of the present invention.

A kind of method of making integrated high voltage NMOS pipe may further comprise the steps:

Substrate is provided,

On described substrate, form high pressure P trap (HVPW);

On HVPW, form the high pressure NMOS structure;

The structure of high pressure NMOS pipe as shown in Figure 2.The method that manufacturing has the high pressure NMOS pipe of structure shown in Figure 2 can be any method of the prior art, so do not describe in detail at this.

Of the present invention focusing on when forming the high pressure NMOS structure, reduces the drain electrode of described high pressure NMOS structure and near high pressure NMOS drift region (HVND:high voltage NMOS drift, the doping content of Zhi Ruing as shown in Figure 2) the source electrode.

When forming the high pressure NMOS structure, what implanted described high pressure NMOS drift region is N type ion, and the doping content after reducing is 6.6E-12 (+/-10%) (number of ions/square centimeter).Described N type ion can be phosphorus or arsenic.

Certainly, the present invention also can be used in high-voltage CMOS structure and ISO (Isolated) the high pressure NMOS structure.

As shown in Figure 3, adopt device behind the present invention after carrying out the Vt stability test, leakage current does not have obvious increase, still is in to receive the peace rank.

In addition, for having lightly doped drain (Lightly Doped Drain, the high pressure NMOS pipe of LDD, can also further come the obvious increase of suppression device leakage current after carrying out the Vt stability test by the implant concentration that reduces lightly doped drain, for example the implant concentration of described lightly doped drain is reduced to: 6.6E-12 (+/-10%) (number of ions/square centimeter).Even, the obvious increase that lightly doped drain also can suppression device carrying out leakage current behind the Vt stability test is not set in the high pressure NMOS pipe.

The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; If do not break away from the spirit and scope of the present invention, the present invention is made amendment or is equal to replacement, all should be encompassed in the middle of the protection range of claim of the present invention.

Claims

1. method of making the high pressure NMOS pipe may further comprise the steps at least:

Substrate is provided;

On described substrate, form the high pressure P trap;

On described high pressure P trap, form the high pressure NMOS structure;

It is characterized in that, when forming the high pressure NMOS structure, reduce the drain electrode of described high pressure NMOS structure and the doping content that implant near the high pressure NMOS drift region the source electrode.

2. method according to claim 1 is characterized in that, when forming the high pressure NMOS structure, what implanted described high pressure NMOS drift region is N type ion, and the doping content after reducing is 6.6E-12 (+/-a 10%) number of ions/square centimeter.

3. method according to claim 2 is characterized in that, described N type ion is phosphorus or arsenic.

4. method according to claim 1 is characterized in that, for the high pressure NMOS pipe with lightly doped drain, reduces the implant concentration of lightly doped drain.

5. method according to claim 4 is characterized in that, the implant concentration of described lightly doped drain is reduced to: 6.6E-12 (+/-10%) number of ions/square centimeter.

6. method according to claim 4 is characterized in that, for the high pressure NMOS pipe, lightly doped drain is not set.