CN102270507A - Flash memory capable of adjusting word line voltage - Google Patents
Flash memory capable of adjusting word line voltage Download PDFInfo
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- CN102270507A CN102270507A CN2011101765295A CN201110176529A CN102270507A CN 102270507 A CN102270507 A CN 102270507A CN 2011101765295 A CN2011101765295 A CN 2011101765295A CN 201110176529 A CN201110176529 A CN 201110176529A CN 102270507 A CN102270507 A CN 102270507A
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Abstract
The invention discloses a flash memory capable of adjusting a word line voltage, and the flash memory comprises a current comparator, a correction circuit, a voltage regulator, a word line voltage switch, a row decoder, a flash memory array, a read amplifier and an output buffer. The current comparator is used for comparing a reference current with a corrected current generated by a corrective storage unit to generate and output a corrective control signal. The correction circuit is connected with the output end of the current comparator, and controlled by the corrective control signal and generates correction information, and the correction information is output to the voltage regulator, so as to correct the word line voltage input to the voltage regulator. The circuit disclosed by the invention can be started when being powered on each time or triggered by self commands of a user. According to the invention, the word line voltage can adaptively change along with the change of process/temperature/voltage, thus solving the problem that errors of the read operation of the flash memory are easy to occur due to the change of process, temperature or voltage in the prior art.
Description
Technical field
The present invention relates to a kind of flash memory, but particularly relate to a kind of flash memory of self-regulation word line voltage.
Background technology
In semiconductor storage, flash memory (flash memory) is a kind of volatile memory, and belong to Erasable Programmable Read Only Memory EPROM (Erasable Programmable Read-Only Memory, EPROM).The advantage of flash memory is that it can be wiped at whole memory block, and erasing speed is fast, needs one to two second approximately.Therefore, in recent years, flash memory has applied in the various consumption electronic products, for example: digital camera, digital code camera, mobile phone or notebook computer etc.
Fig. 1 is the structural representation of a kind of flash memory in the prior art.As shown in Figure 1, common flash memory structure comprises voltage stabilizer 101, word line voltage switch 102, line decoder 103, flash array 104, sensor amplifier 105 and output buffer 106.In this common flash memory structure, the word line voltage Vreg of the storage unit of voltage regulator 101 outputs often is designed to a fixed value, such shortcoming is: when technique change or temperature variation or change in voltage, the working current of storage unit can change synchronously, carry out read operation in this case and then can be affected, cause and read " 0 "/" 1 " and make mistakes.
In sum, the flash memory of prior art exists because the word line voltage of storage unit is designed to the fixed value problem that read operation easily makes mistakes when causing technique change or temperature variation or change in voltage as can be known, therefore, be necessary to propose improved technological means in fact, solve this problem.
Summary of the invention
For the flash memory that overcomes above-mentioned prior art exists because the word line voltage of storage unit is designed to the fixed value problem that read operation easily makes mistakes when causing technique change or temperature variation or change in voltage, but fundamental purpose of the present invention is to provide a kind of flash memory of self-regulation word line voltage, it produces correcting current by correcting storing unit, and correcting current and reference current are compared the back produce correcting controlling signal and control information, transport to the word line voltage of voltage stabilizer with correction, make word line voltage also carry out respective change, improve the efficient of flash reading and writing with the variation of technology/temperature/voltage.
For reaching above-mentioned and other purpose, but the flash memory of a kind of self-regulation word line voltage of the present invention comprises voltage stabilizer, word line voltage switch, line decoder, flash array, sensor amplifier and output buffer at least, and in addition, this flash memory also comprises:
Current comparator is used for a reference current and a correcting current are compared the output of back generation one correcting controlling signal, and this correcting current is produced by a correcting storing unit; And
Correcting circuit links to each other with the output terminal of this current comparator, with under the control of this correcting controlling signal, produces control information and exports this voltage stabilizer to, so that the word line voltage that inputs to this voltage stabilizer is proofreaied and correct.
Further, this current comparator comprises at least:
Correcting storing unit is used to produce this correcting current;
Mirror-image constant flow source, a PMOS transistor AND gate the 2nd PMOS transistor that comprises gate interconnection, the one PMOS transistor AND gate the 2nd PMOS transistor source all is connected to this word line voltage, and this mirror-image constant flow source is used for this correcting current mirror image to the 2nd PMOS transistor drain;
Gating circuit switch is connected in this correcting storing unit, with this correcting current of conducting;
Buffer circuit is connected between a PMOS transistor drain and this gating circuit switch, is used to isolate the voltage of PMOS transistor drain voltage and the generation of this correcting storing unit;
Reference current generating circuit produces this reference current; And
Correcting controlling signal produces circuit, is connected with the 2nd PMOS transistor drain and this reference current generating circuit, so that this reference current and this correcting current are compared this correcting controlling signal output of back generation.
Further, this buffer circuit comprises one first nmos pass transistor and one first phase inverter, this first nmos transistor drain is connected to PMOS transistor P1 drain electrode, its grid is connected to the output terminal of this first phase inverter, source electrode links to each other with this gating circuit switch, and this source electrode also is connected to the input end of this first phase inverter simultaneously.
Further, this reference current generating circuit comprises second nmos pass transistor, and this second nmos pass transistor grid connects the bias voltage of a fixed bias, source ground, and drain electrode produces reference current and exports this correcting controlling signal generation circuit to.
Further, this correcting controlling signal produces circuit and comprises one second phase inverter, and the input end of this second phase inverter is connected to the 2nd PMOS transistor drain and this second nmos transistor drain, and output terminal is exported this correcting controlling signal to this correcting circuit.
Further, this gating circuit switch comprises three nmos pass transistors of series connection mutually.
Compared with prior art, but the invention provides a kind of flash memory of self-regulation word line voltage, it produces correcting current by correcting storing unit, and correcting current and reference current are compared the back produce correcting controlling signal and control information, transport to the word line voltage of voltage stabilizer with correction, make word line voltage also carry out respective change, the problem that flash read operation is easily made mistakes when solving in the prior art because of technique change or temperature variation or change in voltage with the variation of technology/temperature/voltage.
Description of drawings
Fig. 1 is the structural representation of a kind of flash memory in the prior art;
But Fig. 2 is the structural representation of the preferred embodiment of the flash memory of a kind of self-regulation word line voltage of the present invention;
Fig. 3 is the detailed circuit diagram of the current comparator of Fig. 2.
Fig. 4 is the sequential synoptic diagram of preferred embodiment of the present invention.
Embodiment
Below by specific instantiation and accompanying drawings embodiments of the present invention, those skilled in the art can understand other advantage of the present invention and effect easily by the content that this instructions disclosed.The present invention also can be implemented or be used by other different instantiation, and the every details in this instructions also can be based on different viewpoints and application, carries out various modifications and change under the spirit of the present invention not deviating from.
But Fig. 2 is the structural representation of the preferred embodiment of the flash memory of a kind of self-regulation word line voltage of the present invention.According to Fig. 2, a kind of flash memory of the present invention also comprises a current comparator 201 and correcting circuit 202 except comprising conventional voltage stabilizer, word line voltage switch, line decoder, flash array, sensor amplifier and output buffer.
Correcting circuit 202 links to each other with current comparator 201, to produce control information T＜3:0 under the control of correcting controlling signal Flag〉to voltage stabilizer, so that the word line voltage Vreg that inputs to voltage stabilizer is proofreaied and correct.
Fig. 4 is the sequential synoptic diagram of preferred embodiment of the present invention, below will with reference to figure 4 principle of work of the present invention be described in the lump: among the present invention, correcting storing unit 301 is as the reference current of mirror-image constant flow source 302, when temperature, technology, voltage etc. change, the read current meeting respective change of storage unit, the read current of the correcting storing unit 301 identical with storage unit is understood respective change equally; Timing, three nmos pass transistor YA/YB/YC of decoding unit control gating circuit switch 303 are high, correcting storing unit 301 is connected, the nmos pass transistor N1 source voltage of buffer circuit 304 is low, after phase inverter INV1 is anti-phase, nmos pass transistor N1 grid is high, nmos pass transistor N1 conducting, the PMOS transistor P1 conducting of mirror-image constant flow source 302, the correcting current Iref_array of correcting storing unit is by the nmos pass transistor N2 of mirror image to PMOS transistor P2 and reference current generating circuit 305, because nmos pass transistor N2 grid meets the bias voltage Vb of fixed bias, it is equal to a resistance.
When word line voltage Vreg is low, correcting current Iref_array is less, mirror image is also less to the electric current of nmos pass transistor N2, it is also less that nmos pass transistor N2 goes up the voltage that forms, the drain voltage of nmos pass transistor N2 is lower, the correcting controlling signal Flag that exports behind phase inverter INV2 is for high, 202 work of this correcting controlling signal Flag control correcting circuit, under the clock signal clk effect, correcting circuit 202 output calibration information T＜3:0〉add 1, thereby make the output linearity of voltage stabilizer add 1, after word line voltage Vreg increases to certain amplitude, the electric current of the enough ambassador's nmos pass transistors of correcting current Iref_array N2 is bigger, the drain voltage of nmos pass transistor N2 is higher, its output step-down after phase inverter INV2 is anti-phase, this moment, correcting circuit was not worked, and last simultaneously control information goes on record as the parameter under this state and is stored in the special register.
As seen, but the invention provides a kind of flash memory of self-regulation word line voltage, it produces correcting current by correcting storing unit, and correcting current and reference current are compared the back produce correcting controlling signal and control information, transport to the word line voltage of voltage stabilizer with correction, the present invention's circuit can start when powering at every turn, perhaps by user's command triggers voluntarily, the invention enables word line voltage also to carry out respective change, the problem that flash read operation is easily made mistakes in the time of can solving in the prior art because of technique change or temperature variation or change in voltage with the variation of technology/temperature/voltage.
The foregoing description is illustrative principle of the present invention and effect thereof only, but not is used to limit the present invention.Any those skilled in the art all can be under spirit of the present invention and category, and the foregoing description is modified and changed.Therefore, the scope of the present invention should be listed as claims.
Claims (6)
1. but the flash memory of a self-regulation word line voltage comprises voltage stabilizer, word line voltage switch, line decoder, flash array, sensor amplifier and output buffer at least, it is characterized in that this flash memory also comprises:
Current comparator is used for a reference current and a correcting current are compared the output of back generation one correcting controlling signal, and this correcting current is produced by a correcting storing unit; And
Correcting circuit links to each other with the output terminal of this current comparator, with under the control of this correcting controlling signal, produces control information and exports this voltage stabilizer to, so that the word line voltage that inputs to this voltage stabilizer is proofreaied and correct.
2. but the flash memory of self-regulation word line voltage as claimed in claim 1 is characterized in that, this current comparator comprises at least:
Correcting storing unit is used to produce this correcting current;
Mirror-image constant flow source, a PMOS transistor AND gate the 2nd PMOS transistor that comprises gate interconnection, the one PMOS transistor AND gate the 2nd PMOS transistor source all is connected to this word line voltage, and this mirror-image constant flow source is used for this correcting current mirror image to the 2nd PMOS transistor drain;
Gating circuit switch is connected in this correcting storing unit, with this correcting current of conducting;
Buffer circuit is connected between a PMOS transistor drain and this gating circuit switch, is used to isolate the voltage of PMOS transistor drain voltage and the generation of this correcting storing unit;
Reference current generating circuit produces this reference current; And
Correcting controlling signal produces circuit, is connected with the 2nd PMOS transistor drain and this reference current generating circuit, so that this reference current and this correcting current are compared this correcting controlling signal output of back generation.
3. but the flash memory of self-regulation word line voltage as claimed in claim 2, it is characterized in that: this buffer circuit comprises one first nmos pass transistor and one first phase inverter, this first nmos transistor drain is connected to PMOS transistor P1 drain electrode, its grid is connected to the output terminal of this first phase inverter, source electrode links to each other with this gating circuit switch, and this source electrode also is connected to the input end of this first phase inverter simultaneously.
4. but the flash memory of self-regulation word line voltage as claimed in claim 2, it is characterized in that: this reference current generating circuit comprises second nmos pass transistor, this second nmos pass transistor grid connects the bias voltage of a fixed bias, source ground, drain electrode produce reference current and export this correcting controlling signal generation circuit to.
5. but the flash memory of self-regulation word line voltage as claimed in claim 2, it is characterized in that: this correcting controlling signal produces circuit and comprises one second phase inverter, the input end of this second phase inverter is connected to the 2nd PMOS transistor drain and this second nmos transistor drain, and output terminal is exported this correcting controlling signal to this correcting circuit.
6. but the flash memory of self-regulation word line voltage as claimed in claim 2 is characterized in that: this gating circuit switch comprises three nmos pass transistors of series connection mutually.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110176529.5A CN102270507B (en) | 2011-06-28 | 2011-06-28 | Can the flash memory of adjusting word line voltage |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110176529.5A CN102270507B (en) | 2011-06-28 | 2011-06-28 | Can the flash memory of adjusting word line voltage |
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| CN102270507A true CN102270507A (en) | 2011-12-07 |
| CN102270507B CN102270507B (en) | 2016-08-10 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106981301A (en) * | 2016-01-18 | 2017-07-25 | 旺宏电子股份有限公司 | Semiconductor device and its compensation method |
| CN107170481A (en) * | 2017-05-16 | 2017-09-15 | 中国科学院微电子研究所 | Adaptive operating device and method for three-dimensional memory |
| CN108766493A (en) * | 2018-05-23 | 2018-11-06 | 上海华力微电子有限公司 | A kind of adjustable WLUD applied to SRAM reads and writes auxiliary circuit |
| CN108932964A (en) * | 2017-05-23 | 2018-12-04 | 三星电子株式会社 | The method for storing equipment and operation storage equipment |
| CN109785896A (en) * | 2018-12-17 | 2019-05-21 | 珠海博雅科技有限公司 | It is a kind of to power on while reading the circuit for trimming position, method and device |
| CN115425961A (en) * | 2022-11-04 | 2022-12-02 | 西安水木芯邦半导体设计有限公司 | High-voltage analog switch array circuit |
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| US5659502A (en) * | 1995-06-19 | 1997-08-19 | Sgs-Thomson Microelectronics S.R.L. | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices |
| CN1716454A (en) * | 2004-06-23 | 2006-01-04 | 三星电子株式会社 | The flash memory device and the bit-line voltage control method thereof that comprise the bit line voltage clamp circuit |
| US20100172191A1 (en) * | 2009-01-08 | 2010-07-08 | Macronix International Co., Ltd. | Voltage Regulation Method and Memory Applying Thereof |
| CN102013267A (en) * | 2009-09-07 | 2011-04-13 | 上海宏力半导体制造有限公司 | Memory and sensitive amplifier |
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2011
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Patent Citations (4)
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| US5659502A (en) * | 1995-06-19 | 1997-08-19 | Sgs-Thomson Microelectronics S.R.L. | Negative word line voltage regulation circuit for electrically erasable semiconductor memory devices |
| CN1716454A (en) * | 2004-06-23 | 2006-01-04 | 三星电子株式会社 | The flash memory device and the bit-line voltage control method thereof that comprise the bit line voltage clamp circuit |
| US20100172191A1 (en) * | 2009-01-08 | 2010-07-08 | Macronix International Co., Ltd. | Voltage Regulation Method and Memory Applying Thereof |
| CN102013267A (en) * | 2009-09-07 | 2011-04-13 | 上海宏力半导体制造有限公司 | Memory and sensitive amplifier |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106981301A (en) * | 2016-01-18 | 2017-07-25 | 旺宏电子股份有限公司 | Semiconductor device and its compensation method |
| CN106981301B (en) * | 2016-01-18 | 2020-02-11 | 旺宏电子股份有限公司 | Semiconductor device and compensation method thereof |
| CN107170481A (en) * | 2017-05-16 | 2017-09-15 | 中国科学院微电子研究所 | Adaptive operating device and method for three-dimensional memory |
| CN108932964A (en) * | 2017-05-23 | 2018-12-04 | 三星电子株式会社 | The method for storing equipment and operation storage equipment |
| CN108766493A (en) * | 2018-05-23 | 2018-11-06 | 上海华力微电子有限公司 | A kind of adjustable WLUD applied to SRAM reads and writes auxiliary circuit |
| CN108766493B (en) * | 2018-05-23 | 2021-04-02 | 上海华力微电子有限公司 | Adjustable WLUD read-write auxiliary circuit applied to SRAM |
| CN109785896A (en) * | 2018-12-17 | 2019-05-21 | 珠海博雅科技有限公司 | It is a kind of to power on while reading the circuit for trimming position, method and device |
| CN109785896B (en) * | 2018-12-17 | 2020-12-15 | 珠海博雅科技有限公司 | Circuit, method and device for simultaneously reading trimming bit during power-on |
| CN115425961A (en) * | 2022-11-04 | 2022-12-02 | 西安水木芯邦半导体设计有限公司 | High-voltage analog switch array circuit |
| CN115425961B (en) * | 2022-11-04 | 2023-03-10 | 西安水木芯邦半导体设计有限公司 | High-voltage analog switch array circuit |
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| CN102270507B (en) | 2016-08-10 |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140430 |
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Effective date of registration: 20140430 Address after: 201203 Shanghai Zhangjiang hi tech park Zuchongzhi Road No. 1399 Applicant after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201203 Shanghai Guo Shou Jing Road, Pudong New Area Zhangjiang hi tech Park No. 818 Applicant before: Hongli Semiconductor Manufacture Co., Ltd., Shanghai |
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