CN102263500B - Charge pump circuit - Google Patents
Charge pump circuit Download PDFInfo
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- CN102263500B CN102263500B CN201010192870.5A CN201010192870A CN102263500B CN 102263500 B CN102263500 B CN 102263500B CN 201010192870 A CN201010192870 A CN 201010192870A CN 102263500 B CN102263500 B CN 102263500B
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Abstract
The invention discloses a charge pump circuit, which comprises a clock oscillation unit, a first clock driving unit, a second clock driving unit, a boosting unit, a driving control unit and a voltage comparison unit, wherein the clock oscillation unit forms a first control voltage based on a feedback voltage provided by the voltage comparison unit, and provides the first control voltage for the first and second clock driving units; the driving control unit receives the feedback voltage provided by the voltage comparison unit, and forms a second control voltage used for controlling the on/off state of the second clock driving unit based on the feedback voltage; the first clock driving unit forms a first driving voltage based on the first control voltage, and provides the first driving voltage for the boosting unit; and the second clock driving unit determines own on/off state based on the second control voltage, and when in an on state, forms a second driving voltage based on the first control voltage and provides the second driving unit for the boosting unit. The charge pump circuit provided by the invention reduces output voltage ripples and power consumption.
Description
Technical field
The present invention relates to technical field of semiconductors, more specifically, the present invention relates to charge pump circuit.
Background technology
In recent years, in the process that semiconductor memory develops rapidly, because the advanced memories such as DRAM (dynamic random access memory), EEPROM (electric erasable programmable memory device), FLASH (flash memory) have the advantage of high density, low-power consumption and low price, it has become the storage device generally adopted in computer, mobile communication terminal.
In semiconductor memory, charge pump circuit is to provide the circuit module of high pressure, and data message is write in memory module by the amplitude voltage that storage system utilizes charge pump circuit to export.Application number be 200810183600 Chinese patent application namely disclose a kind of charge pump circuit, described charge pump circuit drives by the non-overlapping clock that a pair phase place is contrary the capacitor element switching stored charge in boosting unit, thus realizes the pump liter of voltage.
Fig. 1 is the schematic diagram of prior art charge pump circuit.Described charge pump circuit comprises: clock oscillation unit 101, clock driver cell 103, boosting unit 105 and voltage comparison unit 107, its operation principle is: charge pump circuit starts, the booster voltage that boosting unit 105 exports is provided to voltage comparison unit 107, and booster voltage and charge pump circuit need the target voltage reached to compare by described voltage comparison unit 107; Based on the comparative result of described booster voltage and target voltage, voltage comparison unit 107 output feedack voltage is to control the work of clock oscillation unit 101.
Specifically, if booster voltage is less than target voltage, the feedback voltage that then voltage comparison unit 107 exports is the first level, the feedback voltage of described first level is sent to the input of clock oscillation unit 101, the control voltage that clock oscillation unit 101 is exported is rectilinear oscillation signal, described rectilinear oscillation signal is supplied to clock driver cell 103, form the non-overlapped clock driving voltage that a pair phase place is contrary, the clock driving voltage that described phase place is contrary drives boosting unit 105 continuous voltage rise;
And if booster voltage exceedes target voltage, the feedback voltage that then voltage comparison unit 107 exports is second electrical level, the feedback voltage of described second electrical level is sent to the input of clock oscillation unit 101, clock oscillation unit 101 is stopped oscillation, the control voltage exported is invalid control signal, described invalid control signal cannot form the contrary clock driving voltage of phase place by enable clock driver element 103, and boosting unit 105 stops boosting.
In theory, after the booster voltage of boosting unit output exceedes target voltage, clock oscillation unit 101 should stop oscillation, and exports invalid control signal.But, in side circuit, there is path delay in the path of the input of voltage comparison unit 107 to boosting unit 105, after booster voltage exceedes target voltage, due to described path delay, clock driver cell 103 output still can maintain the clock driving voltage of the rectilinear oscillation of a period of time; The clock driving voltage of described temporary transient existence controls boosting unit 105 and works on, in short time, booster voltage still continues to rise, the continuation rising of described booster voltage can make to comprise unnecessary voltage ripple in booster voltage, if and the change of the voltage magnitude of ripple is excessive, then can cause the instability of storage operation, affect the stability of data write and the reliability of device.
Summary of the invention
The invention provides a kind of charge pump circuit, reduce the output voltage of charge pump circuit in the amplitude reaching the follow-up pressure of continuing rising of target voltage, thus reduce voltage ripple, avoid the misoperation problem caused because output voltage is unstable.
For solving the problem, the invention provides a kind of charge pump circuit, comprising clock oscillation unit, the first clock driver cell, second clock driver element, boosting unit, driving control unit and voltage comparison unit, wherein:
Clock oscillation unit forms the first control voltage based on the feedback voltage that voltage comparison unit provides, and described first control voltage is supplied to the first clock driver cell and second clock driver element respectively;
The feedback voltage that driving control unit receiver voltage comparing unit provides, forms the second control voltage for controlling second clock driver element on off state based on described feedback voltage;
First clock driver cell forms the first driving voltage based on described first control voltage, and is supplied to boosting unit;
Second clock driver element determines its on off state based on the second control voltage, when being in opening, forming the second driving voltage, and be supplied to boosting unit based on the first control voltage;
The first driving voltage that boosting unit provides based on the first clock driver cell and the second driving voltage that second clock driver element provides, pump rises booster voltage and exports voltage comparison unit to;
Voltage comparison unit compares booster voltage and target voltage, provides feedback voltage based on described comparative result to clock oscillation unit, driving control unit.
Accordingly, present invention also offers a kind of driving method of above-mentioned charge pump circuit, comprising:
When booster voltage is less than target voltage, voltage comparison unit exports the feedback voltage of the first level, the feedback voltage of described first level controls the second control voltage that driving control unit exports three level, and second clock driver element is normally worked, the first control voltage provided based on clock oscillation unit generates the second driving voltage;
When booster voltage exceedes target voltage, voltage comparison unit exports the feedback voltage of second electrical level, and the feedback voltage of described second electrical level controls the second control voltage that driving control unit exports the 4th level, and second clock driver element is closed.
Compared with prior art, the present invention has the following advantages:
The clock driver cell being used for controlling boosting unit boosting in charge pump circuit is divided into two parts, and the clock driver cell of driving control unit to a part is set controls.After the output voltage of charge pump circuit reaches target voltage, described driving control unit control section clock driver cell is closed, the driving force that this makes boosting unit input obtain reduces, the corresponding reduction of overshoot voltage amplitude that boosting unit exports, meanwhile, the clock driver cell that described part is opened also effectively reduces the power consumption of charge pump circuit.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of prior art charge pump circuit.
Fig. 2 is the schematic diagram of embodiment of the present invention charge pump circuit.
Fig. 3 is the schematic diagram of a kind of execution mode of driving control unit in charge pump circuit of the present invention.
Embodiment
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, are described in detail the specific embodiment of the present invention below in conjunction with accompanying drawing.
Set forth a lot of detail in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here to implement, therefore the present invention is not by the restriction of following public specific embodiment.
Just as described in the background section, in charge pump circuit, because voltage comparison unit to the path of boosting unit input exists path delay, what the booster voltage that boosting unit exports can be temporary transient exceedes target voltage, namely forms overshoot voltage; Described overshoot voltage makes the fluctuation of the output voltage meeting generating period of charge pump circuit, namely includes voltage ripple in described output voltage.
The boosting unit of charge pump circuit normally utilizes electric capacity both end voltage difference the characteristic of transient change not realize boosting, and when boosting unit boosts, the voltage difference wherein for the electric capacity two ends of stored charge can not transition.In this case, the two-plate of described electric capacity is periodically overturn, the voltage keeps at electric capacity two ends namely can be made to raise.
The present inventor finds, in described boosting unit, the punctuated turning over of electric capacity is normally realized by the switching of analog switch, and the on off state of described analog switch is then that the driving voltage exported by clock driver cell controls.Therefore, after the booster voltage of boosting unit exceedes target voltage, clock driver cell part is closed, reduce the driving force of described clock driver cell, the opening speed of the analog switch of boosting unit can be made to reduce, the rate of pressure rise of booster voltage reduces, and then reduces the amplitude of booster voltage overshoot.
Fig. 2 is the schematic diagram of embodiment of the present invention charge pump circuit.
As shown in Figure 2, the circuit of embodiment of the present invention charge pump circuit comprises clock oscillation unit 201, first clock driver cell 203, second clock driver element 204, boosting unit 205, driving control unit 206 and voltage comparison unit 207, wherein:
Clock oscillation unit 201 forms the first control voltage based on the feedback voltage that voltage comparison unit 207 provides, and described first control voltage is supplied to the first clock driver cell 203 and second clock driver element 204 respectively.
The feedback voltage that driving control unit 206 receiver voltage comparing unit 207 provides, forms the second control voltage for controlling second clock driver element 204 on off state based on described feedback voltage.
First clock driver cell 203 forms the first driving voltage based on described first control voltage, and is supplied to boosting unit 205.
Second clock driver element 204 determines its on off state based on the second control voltage, when being in opening, forms the second driving voltage based on the first control voltage, and is supplied to boosting unit 205.
The first driving voltage that boosting unit 205 provides based on the first clock driver cell 203 and the second driving voltage that second clock driver element 204 provides, pump rises booster voltage and exports voltage comparison unit 207 to.
Voltage comparison unit 207 pairs of booster voltages and target voltage compare, and provide feedback voltage based on described comparative result to clock oscillation unit 201, driving control unit 206.
The operation principle of described charge pump circuit is:
Charge pump circuit starts, because booster voltage is less than target voltage, the first control voltage that clock oscillation unit 201 exports is rectilinear oscillation signal, therefore, now the first driving voltage of the first clock driver cell 203 output and the second driving voltage of second clock driver element 204 output are the clock drive signals of mechanical periodicity.The clock drive signals of described mechanical periodicity makes boosting unit 205 start pump and rises booster voltage.The first control voltage that described first driving voltage and the second driving voltage all provide based on clock oscillation unit 201 is formed, and described first driving voltage has identical phase place and frequency with the second driving voltage.In a particular embodiment, described first clock driver cell 203 can adopt line to be connected with mode with second clock driver element, to realize the parallel connection of drive current.
In described charge pump circuit boost process, voltage comparison unit 207 pairs of booster voltages and target voltage compare, and based on described comparative result, provide feedback voltage to clock oscillation unit 201 and driving control unit 206.
When booster voltage is still less than target voltage, the feedback voltage that voltage comparison unit 207 exports is the first level, the feedback voltage of described first level is sent to the input of clock oscillation unit 201, the first control voltage that clock oscillation unit 201 is exported is rectilinear oscillation signal, and the first control voltage of described rectilinear oscillation signal is supplied to the first clock driver cell 203 and second clock driver element 204.First control voltage of described rectilinear oscillation signal controls the clock drive signals that the first clock driver cell 203 forms rectilinear oscillation.Simultaneously, the feedback voltage of described first level controls the second control voltage that driving control unit 206 forms three level, second control voltage of described three level controls second clock driver element 204 and normally works, and the first control voltage based on rectilinear oscillation signal forms the clock drive signals of rectilinear oscillation.Described be the clock drive signals of mechanical periodicity the first driving voltage and the second driving voltage jointly drive boosting unit 205 continuous voltage rise.
When boosting unit 205 is after boost action repeatedly, its booster voltage exported reaches target voltage, the feedback voltage that then voltage comparison unit 207 exports is second electrical level, the feedback voltage of described second electrical level is sent to clock oscillation unit 201, clock oscillation unit 201 is stopped oscillation, its first control voltage exported should be invalid control signal, described invalid control signal makes the first driving voltage and the second driving voltage all become invalid drive singal, and boosting unit 205 stops boosting.
But in practical work process, for clock oscillation unit 201, although its input have received the feedback voltage of second electrical level, but due to the delay of clock oscillation unit 201, clock oscillation unit 201 output still can maintain the rectilinear oscillation signal of certain hour, and the rectilinear oscillation signal of described temporary transient existence can continue the clock drive signals that driving first clock driver cell 203 exports mechanical periodicity.
The feedback voltage of described second electrical level is also sent to the input of driving control unit 206 simultaneously, make driving control unit 206 export the second control voltage of the 4th level, the second control voltage of described 4th level makes second clock driver element 204 be in closed condition.Now, the output of second clock driver element 204 presents high-impedance state.Because the response speed of driving control unit 206 is very fast, postpone less, therefore, second clock driver element 204 closing velocity is very fast, namely no longer exports the clock drive signals of mechanical periodicity after the second control voltage of acquisition the 4th level.
Therefore, after booster voltage reaches target voltage, the first clock driver cell 203 is only had to provide clock drive signals to boosting unit 205, compared with simultaneously providing clock drive signals by the first clock driver cell 203 with second clock driver element 204 with during booster voltage miss the mark voltage, driving force reduces greatly, this makes the opening speed of the analog switch of boosting unit 205 reduce, the corresponding reduction of the rate of pressure rise of booster voltage.
In a particular embodiment, described first clock driver cell 203 is 1: 3 to 3: 1 with the driving force ratio of second clock driver element 204, and preferably, described first clock driver cell 203 is 1: 1 with the driving force ratio of second clock driver element 204.The clock driver cell being used for controlling boosting unit boost action is divided into two parts by described charge pump circuit, after the output voltage of charge pump circuit reaches target voltage, described clock driver cell part is opened, another part is closed, therefore, the clock driver cell that described part is opened effectively reduces the power consumption of charge pump circuit.
In order to better understand the driving control unit and operation principle thereof that form charge pump circuit of the present invention, next the concrete formation of the driving control unit in embodiment of the present invention charge pump circuit is described.But it should be understood that those skilled in the art can revise the present invention described here and still realize advantageous effects of the present invention.Therefore, following description is appreciated that the extensive instruction to those skilled in the art, and not as limitation of the present invention.
Fig. 3 is the schematic diagram of a kind of execution mode of driving control unit in charge pump circuit of the present invention.
As described in Figure 3, described driving control unit adopts the d type flip flop of edging trigger to form, described d type flip flop includes signal input part 301 (in figure D end), clock along input 302 (in figure CLK end), removing end 303 (in figure RST end) and signal output part 304 (in figure Q end), wherein, signal input part 301 receives the voltage of the 4th level provided by external voltage source, clock receives the feedback voltage provided by voltage comparison unit along input 302, remove end 303 and receive the reset signal provided by external control module.
The operation principle of described driving control unit is: when reset signal is effective, described d type flip flop state is set to preset value, the second control voltage of three level is exported by signal output part 304, second control voltage of described three level makes second clock driver element normally work, and its first control voltage provided based on clock oscillation unit forms the second driving voltage.
When voltage comparison unit export feedback voltage by the first level to (now reset signal is invalid) during second electrical level saltus step, d type flip flop changes state based on the clock edge of described saltus step, is exported the voltage signal of the 4th level provided by signal input part 301 by signal output part 304.Second control voltage of described 4th level makes second clock driver element be in closed condition, no longer forms the clock drive signals of mechanical periodicity, and this makes the clock driving force of whole charge pump circuit reduce, the corresponding reduction of the rate of pressure rise of boosting unit.
Based on the operating characteristic of d type flip flop, when the reset signal of its removing end 303 is invalid, as long as the clock of d type flip flop does not receive by the clock edge of the first level to second electrical level saltus step along input 302, the state of whole d type flip flop just remains unchanged, and its signal output part 304 keeps the 4th level constant.Therefore, when described charge pump circuit needs again pumping voltage, the reset signal removing end 303 is needed to be set to useful signal, d type flip flop is made to export the second control voltage of three level, thus control the unlatching of second clock driver element, and again export the second driving voltage based on the first control voltage.
The clock driver cell being used for controlling boosting unit boosting in charge pump circuit is divided into two parts by charge pump circuit of the present invention, and arranges the clock driver cell of driving control unit to a part and control.After the output voltage of charge pump circuit reaches target voltage, described driving control unit control section clock driver cell is closed, the driving force that this makes boosting unit input obtain reduces, the corresponding reduction of overshoot voltage amplitude that boosting unit exports, meanwhile, the clock driver cell that described part is opened also effectively reduces the power consumption of charge pump circuit.
Should be appreciated that, example herein and embodiment are only exemplary, and those skilled in the art when not deviating from the spirit and scope of the present invention that the application and claims limit, can make various amendment and corrigendum.
Claims (5)
1. a charge pump circuit, is characterized in that, comprises clock oscillation unit, the first clock driver cell, second clock driver element, boosting unit, driving control unit and voltage comparison unit, wherein:
Clock oscillation unit forms the first control voltage based on the feedback voltage that voltage comparison unit provides, and described first control voltage is supplied to the first clock driver cell and second clock driver element respectively;
The feedback voltage that driving control unit receiver voltage comparing unit provides, forms the second control voltage for controlling second clock driver element on off state based on described feedback voltage;
First clock driver cell forms the first driving voltage based on described first control voltage, and is supplied to boosting unit;
Second clock driver element determines its on off state based on the second control voltage, when being in opening, forming the second driving voltage, and be supplied to boosting unit based on the first control voltage;
The first driving voltage that boosting unit provides based on the first clock driver cell and the second driving voltage that second clock driver element provides, pump rises booster voltage and exports voltage comparison unit to;
Voltage comparison unit compares booster voltage and target voltage, and result provides feedback voltage to clock oscillation unit, driving control unit based on the comparison.
2. charge pump circuit as claimed in claim 1, it is characterized in that, the output of described second clock driver element and the first clock driver cell adopts line and mode to be connected to the input of boosting unit.
3. charge pump circuit as claimed in claim 1, it is characterized in that, the driving force ratio of described first clock driver cell and second clock driver element is 1:3 to 3:1.
4. charge pump circuit as claimed in claim 1, is characterized in that, described driving control unit adopts d type flip flop structure, and described d type flip flop includes signal input part, clock along input, removing end and signal output part, wherein,
Signal input part receives the voltage of the 4th level provided by external voltage source, clock receives the feedback voltage provided by voltage comparison unit along input, remove termination and receive the reset signal provided by external control module, signal output part exports described second control voltage.
5. application rights requires a driving method for the charge pump circuit described in 1, it is characterized in that,
When booster voltage is less than target voltage, voltage comparison unit exports the feedback voltage of the first level, the feedback voltage of described first level controls the second control voltage that driving control unit exports three level, and second clock driver element is normally worked, the first control voltage provided based on clock oscillation unit generates the second driving voltage;
When booster voltage exceedes target voltage, voltage comparison unit exports the feedback voltage of second electrical level, and the feedback voltage of described second electrical level controls the second control voltage that driving control unit exports the 4th level, and second clock driver element is closed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010192870.5A CN102263500B (en) | 2010-05-27 | 2010-05-27 | Charge pump circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201010192870.5A CN102263500B (en) | 2010-05-27 | 2010-05-27 | Charge pump circuit |
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| CN102263500A CN102263500A (en) | 2011-11-30 |
| CN102263500B true CN102263500B (en) | 2015-07-22 |
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| CN201010192870.5A Active CN102263500B (en) | 2010-05-27 | 2010-05-27 | Charge pump circuit |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105094193B (en) * | 2014-05-04 | 2017-06-30 | 中芯国际集成电路制造(上海)有限公司 | Low-dropout regulator |
| CN104467405A (en) * | 2014-12-30 | 2015-03-25 | 上海华虹宏力半导体制造有限公司 | Charge pump circuit and storage device |
| CN106160462B (en) * | 2016-07-18 | 2018-08-10 | 西安紫光国芯半导体有限公司 | A kind of charge pump system that driving capability is stablized |
| CN110233570B (en) * | 2018-03-05 | 2020-09-01 | 长鑫存储技术有限公司 | Control circuit and charge pump using same |
| CN112187042B (en) * | 2020-09-28 | 2021-07-30 | 恒烁半导体(合肥)股份有限公司 | Charge pump regulating circuit and application thereof |
| CN113056387B (en) * | 2021-03-26 | 2022-10-18 | 华为技术有限公司 | Charging control device and method and electric automobile |
| CN113991999B (en) * | 2021-10-18 | 2024-02-06 | 上海华虹宏力半导体制造有限公司 | Charge pump boosting system |
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| CN1485971A (en) * | 2003-08-29 | 2004-03-31 | 清华大学 | High precision low power dissipation charge pump circuit |
| CN1735081A (en) * | 2004-08-11 | 2006-02-15 | 华为技术有限公司 | Control method and circuit for line drive output signal waveform |
| CN101510728A (en) * | 2008-12-18 | 2009-08-19 | 昆山锐芯微电子有限公司 | Charge pump and CMOS image sensor |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100632951B1 (en) * | 2004-09-22 | 2006-10-11 | 삼성전자주식회사 | High voltage generator circuit with ripple stabilization function |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1485971A (en) * | 2003-08-29 | 2004-03-31 | 清华大学 | High precision low power dissipation charge pump circuit |
| CN1735081A (en) * | 2004-08-11 | 2006-02-15 | 华为技术有限公司 | Control method and circuit for line drive output signal waveform |
| CN101510728A (en) * | 2008-12-18 | 2009-08-19 | 昆山锐芯微电子有限公司 | Charge pump and CMOS image sensor |
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