CN102254786A - Method for analyzing and checking local pattern density of chip - Google Patents
Method for analyzing and checking local pattern density of chip Download PDFInfo
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- CN102254786A CN102254786A CN2010101801085A CN201010180108A CN102254786A CN 102254786 A CN102254786 A CN 102254786A CN 2010101801085 A CN2010101801085 A CN 2010101801085A CN 201010180108 A CN201010180108 A CN 201010180108A CN 102254786 A CN102254786 A CN 102254786A
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Abstract
The invention discloses a method for analyzing and checking the local pattern density of a chip. The method comprises the following steps of: 1, defining the size of a local area according to chemical mechanical polarization (CMP) and the requirement of an etching process for macro loading, and dividing the chip into a plurality of local chip blocks of which the area is local area; 2, cutting each local chip block into a plurality of small equal-area local chip blocks; 3, checking the pattern density of each small local chip block; 4, drawing a two-dimensional contour chart of the pattern density of the chip; 5, calculating whether a region of which the area is larger than the local area and a pattern density value is beyond the density range of a target pattern exits in the two-dimensional contour chart; and 6, judging whether the design pattern is required to be changed according to a calculation value in the step 5. By the method, the checking capacity of the pattern density is enhanced without increase of false warning cases during checking of the pattern density.
Description
Technical field
The present invention relates to semiconductor integrated circuit and make the field, particularly relate to a kind of analysis and inspection method of pattern density of chip.
Background technology
Along with the continuous progress of integrated circuit processing technique, especially after 0.13 micron technology, the live width of silicon technology makes that all less than the wavelength length of exposure the stability of technology is more and more difficult.The spin-off effects that just begins to consider technology early stage in design has produced a lot of Design Rule Checking (DRC, Design Rule Check) thus.Design Rule Checking comprises a lot of aspects.Wherein, whole and local pattern density (Pattern Density) all has a significant impact for macroscopical load (Macro Loading) of cmp (CMP, ChemicalMechanical Polarization) and etching.Just exist in the prior art, do not come out, directly cause the product Failure cases but DRC has inspection owing to active area (AA, Active Area) pattern density is violated design rule.
The Design Rule Checking of present local figure density, be mainly: chip (chip) is divided into a plurality of local chip pieces according to the specific portion area, carry out the calculating of the pattern density of each described local chip piece, judge whether the pattern density of the described local chip piece of each piece reaches targeted graphical density.Described targeted graphical density range is according to CMP and the grand load request of etching technics, and according to the process layer under the described figure by he design rules specify.As shown in Figure 2, schematic diagram for the local figure density inspection method one of prior art chip, this moment, step-length equaled the length of side of local chip piece, wherein the big square of solid line is a chip, the little square of solid line is the local chip piece of first measurement pattern density, and dotted line is the local chip piece through second the adjacent measurement pattern density after the step-length.As shown in Figure 3, schematic diagram for the local figure density inspection method two of prior art chip, step-length is less than the length of side of local chip piece at this moment, wherein the big square of solid line is a chip, the little square of solid line is the local chip piece of first measurement pattern density, dotted line is the local chip piece through second measurement pattern density after the step-length, and second local chip piece can be overlapping with previous local chip piece.
Above-mentioned inspection method one and two all can be omitted certain situation, causes and checks failure.As shown in Figure 4, the big square of solid line is a chip, and the little square of solid line is the local chip piece of measurement pattern density, and the little square of dotted line is the local chip piece that does not satisfy design rule of pattern density; Because prior art can only be measured the local chip piece shown in the little square of solid line, and can not be by measuring for the pattern density of the local chip piece shown in the little square of dotted line, so even when the pattern density of the local chip piece shown in the little square of all solid lines all reached targeted graphical density, the pattern density that can not determine the local chip piece shown in the little square of dotted line was a normal value; When the pattern density of the local chip piece shown in the little square of dotted line exceeds desired value, will make the product failure.Check the blind area so the local figure density inspection method of prior art chip exists, feasible local chip piece shown in the little square of Fig. 4 dotted line is by omission.
But, if simply local area is dwindled, can cause a lot of false alarms, must artificial examination, can not reach the effect of inspection so on the contrary.
Summary of the invention
Technical problem to be solved by this invention provides a kind of analysis and inspection method of local figure density of chip, can check that pattern density occurs under the false alarm situation not increasing, and increases the checking ability of pattern density.
For solving the problems of the technologies described above, the analysis and the inspection method of the local figure density of chip provided by the invention comprise the steps:
Step 1, according to the size of the grand load request definition of cmp and etching technics local area; Described chip is divided into the structure of being made up of the local chip piece of a plurality of homalographics, and the area of each described local chip piece equals described local area; The size range of described local area is 0.0025 micron
2～250000 microns
2The shape of described local chip piece can be any special pattern such as rectangle, circle or ellipse etc.
Step 2, be the structure of being made up of the local chip fritter of a plurality of homalographics with each described local chip piece cutting, the area of each described local chip fritter is the fritter area.Each described local chip piece cutting is that the umber of local chip fritter is: 2～10
10Described local chip fritter is a special pattern such as rectangle, triangle etc.
Step 3, measure the pattern density of each described local chip fritter.
Step 4, according to the pattern density value of each measured described local chip fritter and draw out the two-dimentional contour map of the pattern density of described chip according to the physical location of each described local chip fritter on described chip.
Step 5, according to described two-dimentional contour map, the area that whether exists that adopts manual calculations or programming Calculation Method to calculate in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value; Described targeted graphical density range is according to CMP and the grand load request of etching technics, and according to the process layer under the described figure by he design rules specify.
If the exist area of step 6 in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value, then need to revise design configuration; If the area that do not exist in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value, then do not need to revise design configuration.
Beneficial effect of the present invention is:
1, the present invention can increase the checking ability of pattern density, and method directly, simply is not easy to omit the zone of not satisfying pattern density.
2, because the present invention need not dwindle local area, promptly not by dwindling the checking ability that local area improves pattern density, so the present invention can avoid too much false alarm occurring owing to dwindling local area.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 is the flow chart of the inventive method;
Fig. 2 is the schematic diagram of the local figure density inspection method one of prior art chip;
Fig. 3 is the schematic diagram of the local figure density inspection method two of prior art chip;
Schematic diagram when Fig. 4 is the local figure density inspection method omission of prior art chip;
Fig. 5 is the two-dimentional contour map that embodiment of the invention method is drawn.
Embodiment
Enumerate an embodiment of the invention below and advantage of the present invention is described in conjunction with prior art.Chip for a requirement is measured is divided into the local chip piece of a plurality of rectangles to described chip according to the size of a local area, and supposes that the targeted graphical density range of the described local chip piece with local area size of this kind chip is＜=30%.In embodiments of the present invention, described chip is divided into directions X 3 equal portions according to the size of described local area, 12 identical described local chip pieces of Y direction 4 equal portions.
One, adopt a pair of described chip of local figure density inspection method of prior art chip to check, obtain data as described in Table 1, checked the pattern density of 12 each described local chip piece as can be seen altogether, and the pattern density of all described local chip pieces is all less than 30%.The check result that is the local figure density inspection method one of prior art chip is qualified.
Table 1
| X/Y | X1 | X2 | X3 |
| Y1 | 0.24 | 0.24 | 0.19 |
| Y2 | 0.19 | 0.28 | 0.27 |
| Y3 | 0.28 | 0.25 | 0.19 |
| Y4 | 0.21 | 0.24 | 0.25 |
Two, adopt two pairs of described chips of local figure density inspection method of prior art chip to check, the step-length of supposing directions X and Y direction all is kept to above-mentioned half, and obtaining area as described in Table 2 is the pattern density data of the local chip piece of local area size.The pattern density of all as can be seen described local chip pieces is all less than 30%.The check result that is the local figure density inspection method two of prior art chip is qualified.
Table 2
| X/Y | X1 | X2 | X3 | X4 | X5 |
| Y1 | 0.24 | 0.26 | 0.24 | 0.22 | 0.19 |
| Y2 | 0.23 | 0.28 | 0.28 | 0.23 | 0.21 |
| Y3 | 0.19 | 0.26 | 0.28 | 0.27 | 0.27 |
| Y4 | 0.21 | 0.27 | 0.28 | 0.26 | 0.23 |
| Y5 | 0.28 | 0.28 | 0.25 | 0.24 | 0.19 |
| Y6 | 0.26 | 0.25 | 0.23 | 0.25 | 0.24 |
| Y7 | 0.21 | 0.24 | 0.24 | 0.27 | 0.25 |
Three, adopt the analysis and the inspection method of the local figure density of the chip that the embodiment of the invention provides that described chip is checked, after according to above-mentioned described local area described chip being divided into the described local chip piece of 12 identical rectangular shapes, also comprise the steps:
Step 2, be the structure of being made up of the local chip fritter of a plurality of homalographics with each described local chip piece cutting, cutting method is: each described local chip carries out obtaining in the cutting of directions X 4 equal portions, Y direction 4 equal portions the described local chip fritter of 16 identical rectangular shapes.
Step 3, measure the pattern density of each described local chip fritter; Obtain data as described in Table 3.The pattern density of the described local chip fritter of part is greater than 30% as can be seen.
Table 3
| X/Y | X1 | X2 | X3 | X4 | X5 | X6 | X7 | X8 | X9 | X10 | X11 | X12 |
| Y1 | 0.15 | 0.21 | 0.26 | 0.24 | 0.13 | 0.31 | 0.24 | 0.18 | 0.26 | 0.41 | 0.17 | 0.18 |
| Y2 | 0.26 | 0.28 | 0.36 | 0.27 | 0.15 | 0.26 | 0.13 | 0.17 | 0.16 | 0.14 | 0.09 | 0.22 |
| Y3 | 0.25 | 0.16 | 0.24 | 0.24 | 0.24 | 0.21 | 0.19 | 0.34 | 0.37 | 0.11 | 0.08 | 0.24 |
| Y4 | 0.26 | 0.18 | 0.11 | 0.35 | 0.39 | 0.37 | 0.28 | 0.25 | 0.23 | 0.09 | 0.1 | 0.17 |
| Y5 | 0.15 | 0.16 | 0.13 | 0.39 | 0.33 | 0.35 | 0.24 | 0.18 | 0.26 | 0.24 | 0.23 | 0.15 |
| Y6 | 0.26 | 0.21 | 0.19 | 0.37 | 0.21 | 0.39 | 0.28 | 0.15 | 0.18 | 0.35 | 0.21 | 0.33 |
| Y7 | 0.19 | 0.14 | 0.09 | 0.32 | 0.33 | 0.31 | 0.26 | 0.29 | 0.41 | 0.33 | 0.34 | 0.25 |
| Y8 | 0.18 | 0.11 | 0.08 | 0.12 | 0.35 | 0.19 | 0.28 | 0.31 | 0.37 | 0.21 | 0.15 | 0.34 |
| Y9 | 0.14 | 0.12 | 0.26 | 0.39 | 0.33 | 0.31 | 0.24 | 0.18 | 0.26 | 0.14 | 0.09 | 0.22 |
| Y10 | 0.26 | 0.28 | 0.36 | 0.37 | 0.35 | 0.18 | 0.26 | 0.28 | 0.16 | 0.21 | 0.14 | 0.11 |
| Y11 | 0.34 | 0.21 | 0.19 | 0.34 | 0.31 | 0.19 | 0.21 | 0.19 | 0.24 | 0.37 | 0.42 | 0.11 |
| Y12 | 0.39 | 0.26 | 0.28 | 0.25 | 0.18 | 0.17 | 0.44 | 0.25 | 0.16 | 0.21 | 0.14 | 0.11 |
| Y13 | 0.16 | 0.2 | 0.26 | 0.39 | 0.33 | 0.14 | 0.11 | 0.18 | 0.24 | 0.35 | 0.33 | 0.21 |
| Y14 | 0.26 | 0.18 | 0.3 | 0.17 | 0.35 | 0.19 | 0.08 | 0.33 | 0.34 | 0.245 | 0.31 | 0.11 |
| Y15 | 0.16 | 0.14 | 0.09 | 0.22 | 0.21 | 0.35 | 0.21 | 0.25 | 0.25 | 0.35 | 0.14 | 0.15 |
| Y16 | 0.32 | 0.11 | 0.08 | 0.24 | 0.21 | 0.25 | 0.3 | 0.35 | 0.45 | 0.25 | 0.14 | 0.11 |
Step 4, according to the pattern density value of each measured described local chip fritter and draw out the two-dimentional contour map of the pattern density of described chip according to the physical location of each described local chip fritter on described chip.Promptly draw out the two-dimentional contour map that embodiment of the invention method is as shown in Figure 5 drawn according to data as described in Table 3.In Fig. 5,＜=10%,＜=20%,＜=30%,＜=40% and＞40% value each mark with different colors, be beneficial to distinguish fast pattern density everywhere on the described chip.
Step 5, according to Fig. 5, find out graph block greater than 30%, promptly find out＜=40% and＞color block of 40% correspondence, adopt manual calculations or programming Calculation Method to calculate greater than whether there being the graph block of area in 30% the graph block greater than described local area.Shown in dashed lines circled among Fig. 5, do not satisfy the pattern density standard at coordinate (3,3) to may exist between the coordinate (7,7) and promptly exist greater than the described local chip piece with local area size of higher limit 30%.Can obtain the pattern density of two local chip pieces greater than higher limit 30% by calculating, described two local chip pieces are respectively coordinate (4,4) to coordinate (7,7) be that X4～X7, ordinate are local chip piece and the coordinate (4 of Y4～Y7 promptly corresponding to abscissa as described in Table 3,3) be that X4～X7, ordinate are the local chip piece of Y3～Y6 promptly to coordinate (7,6) corresponding to abscissa as described in Table 3.
Step 6, owing to exist two local chip pieces to exceed standard, so described chip design is defective, need the modification design configuration.
By above embodiment as can be known, employing embodiment of the invention method can increase the checking ability of pattern density really, and method directly, simply is not easy to omit the zone of not satisfying pattern density.And the present invention can also avoid too much false alarm occurring owing to dwindling local area.
More than by specific embodiment the present invention is had been described in detail, but these are not to be construed as limiting the invention.Under the situation that does not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (7)
1. the analysis and the inspection method of the local figure density of a chip is characterized in that, comprise the steps:
Step 1, described chip is divided into the structure of being made up of the local chip piece of a plurality of homalographics, the area of each described local chip piece is a local area;
Step 2, be the structure of being made up of the local chip fritter of a plurality of homalographics with each described local chip piece cutting, the area of each described local chip fritter is the fritter area;
Step 3, measure the pattern density of each described local chip fritter;
Step 4, according to the pattern density value of each measured described local chip fritter and draw out the two-dimentional contour map of the pattern density of described chip according to the physical location of each described local chip fritter on described chip;
Step 5, according to described two-dimentional contour map, the area that whether exists that calculates in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value;
If the exist area of step 6 in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value, then need to revise design configuration; If the area that do not exist in described two-dimentional contour map exceeds the zone of targeted graphical density range greater than described local area and pattern density value, then do not need to revise design configuration.
2. the analysis and the inspection method of the local figure density of chip as claimed in claim 1, it is characterized in that: the size of described local area defines according to cmp and the grand load request of etching technics, and the size range of described local area is 0.0025 micron
2～250000 microns
2
3. the analysis and the inspection method of the local figure density of chip as claimed in claim 1, it is characterized in that: each described local chip piece cutting is that the umber of local chip fritter is: 2～10
10
4. the analysis and the inspection method of the local figure density of chip as claimed in claim 1, it is characterized in that: described targeted graphical density range is according to CMP and the grand load request of etching technics, and according to the process layer under the described figure by he design rules specify.
5. as the analysis and the inspection method of the local figure density of claim 1 or 4 described chips, it is characterized in that: the area that whether exists that can adopt manual calculations or programming Calculation Method to calculate in described two-dimentional contour map in the step 5 exceeds the zone of targeted graphical density range greater than described local area and pattern density value.
6. the analysis and the inspection method of the local figure density of chip as claimed in claim 1 is characterized in that: described local chip piece be shaped as a special pattern such as rectangle, circle or oval.
7. the analysis and the inspection method of the local figure density of chip as claimed in claim 1 is characterized in that: described local chip fritter is a special pattern such as rectangle, triangle.
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| CN108564638A (en) * | 2018-04-20 | 2018-09-21 | 京东方科技集团股份有限公司 | A kind of method and apparatus that stream of people hot-zone is determined based on geographic pattern |
| CN108830004A (en) * | 2018-06-26 | 2018-11-16 | 上海华力微电子有限公司 | The judgment method of layout patterns risk zones |
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| US6484300B1 (en) * | 1999-06-21 | 2002-11-19 | Samsung Electronics Co., Ltd. | Systems, methods and computer program products for obtaining an effective pattern density of a layer in an integrated circuit, and for simulating a chemical-mechanical polishing process using the same |
| JP3447621B2 (en) * | 1999-07-15 | 2003-09-16 | 沖電気工業株式会社 | Generation method of flattening pattern |
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| CN108564638A (en) * | 2018-04-20 | 2018-09-21 | 京东方科技集团股份有限公司 | A kind of method and apparatus that stream of people hot-zone is determined based on geographic pattern |
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| US11068714B2 (en) | 2018-04-20 | 2021-07-20 | Boe Technology Group Co., Ltd. | Method and apparatus for determining hot zones of human flow based on cartography |
| CN108830004A (en) * | 2018-06-26 | 2018-11-16 | 上海华力微电子有限公司 | The judgment method of layout patterns risk zones |
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