CN103839847A - Graphics detection method - Google Patents
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- CN103839847A CN103839847A CN201210484780.2A CN201210484780A CN103839847A CN 103839847 A CN103839847 A CN 103839847A CN 201210484780 A CN201210484780 A CN 201210484780A CN 103839847 A CN103839847 A CN 103839847A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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Abstract
The invention discloses a graphics detection method. Graphics are acquired through an image acquisition device, and the acquired graphics are overlapped with standard graphics to calculate the coverage of a set region, so that the executive capacity of a same manufacturing process on different shapes and the executive capacity of different processes on a same shape can be obtained quantificationally, so the method has great help in the improvement and optimization of the process and the improvement of the yield of manufactured devices.
Description
Technical field
The present invention relates to integrated circuit and manufacture field, particularly a kind of graph testing method.
Background technology
Semi-conductive manufacture process is very complicated, and its general thought is that the circuit of needs is formed on substrate through a series of technical process, thereby by various element manufacturing out.
On the one hand, circuit diagram is transferred on substrate, need to adopt photoetching process, that the pattern on mask plate is projected on substrate after amplifying, still, due to the character of trimmed book body and in manufacturing process inevitable extraneous factor, as the problem of environment, mask aligner itself etc., being projected in on-chip pattern will change, and this X-Y scheme especially around the corner will there will be and shrink and/or round and smooth phenomenon.Situation a as shown in Figure 1, needed figure is rectangle 10, in substrate, forms and becomes round rectangle 11, the structure that causes making likely can not be reached needed structure by this.
On the other hand, after photoetching process, also need to carry out a series of techniques such as etching, CVD, PVD, CMP, each step also can be summarized as the variation to figure in fact.Same, due to the problem such as size, response situation, all can not be perfect to the variation of figure in these processes.Ratio situation b as shown in Figure 1, need to etch the structure 12 of an I shape, obviously can there is deformation in this structure, after its etching, will become the round and smooth structure of corner 13, and the large young pathbreaker of corner's distortion may affect the performance of device, also may be by operation follow-up impact.
At present, have realized that in the industry this situation.Can directly measure evaluation state of arts with instruments such as similar critical size scanning electron microscopy for one-dimentional structure figure.But for as two-dimensional structure figure, the how reliability of a quantitative technique of description, or for same figure, which kind of technique more can be competent at, or a kind of technique has preferably completeness to the figure of which kind of shape, the executive capability of established technology to figure, does not also have a kind of method of system.
Summary of the invention
The object of the present invention is to provide a kind of graph testing method, to solve the problem of executive capability of description related semiconductor manufacturing process that can not be quantitative in prior art.
For solving the problems of the technologies described above, the invention provides a kind of graph testing method, comprising:
Utilize image collecting device to gather figure;
The figure of described collection and test pattern are carried out overlapping;
Choose the region of setting, and calculate the coverage rate of the figure gathering described in the region of described setting to described test pattern;
Judge the quality of the figure of described collection according to described coverage rate.
Optionally, for described graph testing method, the figure of described collection and test pattern are carried out overlapping after, before choosing the region of setting, also need the figure of described collection to process.
Optionally, for described graph testing method, the described figure to described collection is processed and is comprised one dimension region is processed.
Optionally, for described graph testing method, described figure harvester is characteristic size scanning electron microscopy.
Optionally, for described graph testing method, the figure of described collection is on-chip figure.
Optionally, for described graph testing method, the substrate of the same structure that the figure of described collection makes from different process.
Optionally, for described graph testing method, obtain block diagram according to described coverage rate, judge the quality of different process.
Optionally, for described graph testing method, the figure of described collection is from same substrate.
Optionally, for described graph testing method, obtain block diagram according to described coverage rate, judge that this technique is to making the quality of difform structure.
Optionally, for described graph testing method, the region of described setting comprises 2 dimensional region.
Optionally, for described graph testing method, adopt the identical framework of choosing to choose described 2 dimensional region from the figure of described collection and the point of contact place of test pattern.
Compared with prior art, in graph testing method provided by the invention, utilize image collecting device to gather figure, and carry out overlapping with test pattern, to calculate the coverage rate of key area, thereby can be quantitative obtain same manufacturing process to difform executive capability, and the executive capability of different process to same shape, this improvement and optimization to technique and the yield that promotes the device of manufacturing have great help.
Accompanying drawing explanation
Fig. 1 is the targeted graphical of different process and the structural representation of actual graphical in existing technique;
Fig. 2 is the flow chart of the graph testing method of the embodiment of the present invention;
Fig. 3 is the test pattern schematic diagram of the embodiment of the present invention;
Fig. 4 is the figure of embodiment of the present invention collection to two kind of technique;
To be the embodiment of the present invention carry out two figures of test pattern and collection overlapping and choose the schematic diagram of relevant range Fig. 5;
The block diagram that the graph testing method that Fig. 6 is the embodiment of the present invention is painted the coverage rate of the relevant range obtaining after different photo-etching technological process;
The block diagram that the graph testing method that Fig. 7 is the embodiment of the present invention is painted the coverage rate of the zones of different obtaining after same photo-etching technological process
Fig. 8 is the coverage rate computational methods schematic diagram of the graph testing method of the embodiment of the present invention.
Embodiment
Below in conjunction with the drawings and specific embodiments, graph testing method provided by the invention is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying, only in order to convenient, the object of the aid illustration embodiment of the present invention lucidly.
Graph testing method provided by the invention, for the quality of the structure that forms on quantitative expression semiconductor fabrication mask plate and/or substrate.In view of the feature of three-dimensional structure and the complexity to Entity measurement, and X-Y scheme just can be expressed the pattern of semiconductor structure conventionally, therefore the present invention adopts the X-Y scheme of semiconductor structure to detect.
Please refer to Fig. 2, first semiconductor structure to be detected is provided, such as being the substrate of patterning after photoetching, if expect the effect of different process, the substrate that two kinds of different photoetching technological methods are obtained, utilizes image collecting device to gather figure, conventionally can adopt characteristic size scanning electron microscopy (Critical Dimension Scanning Electron Microscope, CD-SEM) take needed structure on substrate, to obtain the figure of collection.
The figure of described collection and test pattern are carried out overlapping, preferably, need to make the center superposition of the two, and not have deflection, but, due to problems such as the enlargement ratios in manufacture process, also can there is corresponding variation in the pattern edge gathering, can process one dimension region, it should be noted that, one dimension region herein refers to figure and should show as the boundary member of straight line, should be 2 dimensional region as regions such as turnings.
Then, choose the region of setting, the region of described setting is decided by figure and manufacturing technique requirent, can be also to choose according to experience, is conventionally preferably key area, i.e. 2 dimensional region.Now, because the figure of test pattern and collection is still overlapping, can be in the region of setting by the pattern mRNA differential display mRNA of the two out, in order can more comprehensively variant part to be included in the region of setting, preferably, to same or analogous 2 dimensional region, adopt the framework of choosing of formed objects, and described test pattern should be identical at the area of choosing in framework, choose framework and be preferably rectangle, the summit that its long limit and broadside should be the region Plays figure of choosing is to described test pattern and the point of contact of figure of collection or the integral multiple of the ultimate range of intersection point, described point of contact or intersection point should chosen on framework or choose framework inside.
Afterwards, calculate the coverage rate of the figure gathering described in the region of described setting to described test pattern.Coverage rate can show as two kinds of forms:
The former ratio is more high, and more to approach 1 technique performance more excellent, is desirably 1 most, and latter ratio is more low, and more to approach 0 technique performance more excellent, is desirably 0 most.By calculate value carry out list, also can be transformed into block diagram, thus clean the technique quality of having judged this figure.
Be illustrated below in conjunction with actual production.
Please refer to Fig. 3, this is a part for a kind of circuit diagram related in a mask plate manufacture process.
Adopt two kinds of different photoetching processes to make test pattern 110, on substrate, form figure, after CD-SEM gathers, obtain two kinds of figures as shown in Figure 4, the first collection figure 121 is served as reasons and is got through the first photo-etching technological process, and the second collection figure 122 is served as reasons and got through the second photo-etching technological process.Which is better and which is worse for these two kinds of photo-etching technological process so, can adopt following determination methods.It should be noted that, the present invention does not relate to the improvement to photo-etching technological process.
As shown in Figure 5, test pattern 110 is gathered to figure 122 with the first collection figure 121 and second respectively to carry out overlapping, obtain the first overlapping figure 131 and the second overlapping figure 132, overlapping rear matching is all in the field of business as seen from the figure can tolerance range in, so locate not need to process.Can see clearly, figure and test pattern 110 in turning and the collection of end points place have difference, for example can choose the region of setting as shown in the figure, in the first overlapping figure 131, have successively in first area 1311, second area 1312, the 3rd region 1313, the overlapping figure 132 in the 4th region 1314 and the 5th region 1315, the second successively to having the 6th region 1321, SECTOR-SEVEN territory 1322, Section Eight territory 1323, the 9th region 1324 and the tenth region 1325.
Calculate respectively the coverage rate in above-mentioned ten regions, first calculate the area of the region Plays figure of setting, calculate again afterwards the area of the figure gathering in the region of setting, accurate for what calculate, can adopt the software that can catch graphic limit, for example computer-aided design (Computer Aided Design, CAD) software calculates.Carry out afterwards list, and tables of data is changed into block diagram, the algorithm of different forms (1), its result as described in Figure 6, can be found out by this figure, in five regions of setting, two kinds, the first two region photo-etching technological process there is no larger difference, but the first photo-etching technological process is preponderated, the 3rd location the first photo-etching technological process is with the obvious advantage, and latter two location second photo-etching technological process is with the obvious advantage.For need of production, as a certain to device or some electrically, the requirement of size, infer the size restrictions to figure, if the size of figure line end is had to larger tolerance band, and corner is required harsh, should select the first photo-etching technological process, otherwise, should select the second photo-etching technological process to produce.
Can also be very quantitative by said method give expression to the executive capability of different photo-etching technological process to same structure, this can guide related personnel autotelic to different photo-etching technological process adjust, in conjunction with or optimize.
Above-mentioned is that same structure place is identical to choosing framework in the deterministic process of two kinds of photo-etching technological process, this is also because be to carry out lateral comparison (being the comparison between different photo-etching technological process), if and will carry out longitudinal comparison (same photo-etching technological process being analyzed), such as can be will be clear that in the first photo-etching technological process byer force to the executive capability of which kind of structure, should take the identical framework of choosing to five regions, first area to the.That is to say, such as the block diagram by Fig. 6 can not be greater than the conclusion such to the executive capability in the 6th region to the executive capability in the tenth region because the coverage rate that the coverage rate in the tenth region in the second photo-etching technological process is greater than the 6th region obtains the second photo-etching technological process.
The second overlapping figure 132 shown in Fig. 5 is being adopted to identical choosing after framework, make test pattern to choose area in framework identical, obtain the block diagram shown in Fig. 7, as seen from Figure 7, the second photo-etching technological process has good executive capability to line end place and corner, but the executive capability that specifically, the second photo-etching technological process will be compared line end place to the executive capability of corner slightly a little less than.It should be noted that, because the second overlapping figure 132 shown in Fig. 5 varies in size at different structure places, marquee may exceed the region of the figure of setting so, to exceeding part, should to do coverage rate be 100% to calculate, and the impact of the difference that the figure that can not be set around has with test pattern.
If do not adopt software to carry out the calculating of coverage rate, can be with reference to figure 8.The problem of two-dimensional structure figure is mainly manifested in the actual fillet phenomenon of making of rectangle wedge angle, and Fig. 8 illustrates a kind of situation (other situations can this reasoning obtain).Dotted line square is the test pattern in the region of setting, and two limits of exterior angle C should overlap with the border of figure, and another two limits at least should be chosen at the tangent E of place of fillet curve and ideal boundary, or suitably expand to straight border.When calculating, according to actual fillet border, fillet is fitted to standard circular arc, thereby obtain the radius of curvature of fillet and further obtain the area that circular arc and line segment OE1, line segment OE2 comprise.The Area comparison of itself and test pattern CE1OE2 can be drawn to coverage rate.
Above-described embodiment has been set forth the judgement of the present invention to technique as an example of photo-etching technological process example, the method can be not limited to photo-etching technological process, for example, whether reach requirement for growth of the structure after etching, side wall etc. and the similar technique on mask and also can be competent at.
In the graph testing method that above-described embodiment provides, utilize image collecting device to gather figure, and carry out overlapping with test pattern, to calculate the coverage rate in region of setting, thereby can be quantitative obtain same manufacturing process to difform executive capability, and the executive capability of different process to same shape, this improvement to technique and optimization and the yield that promotes the device of manufacturing have great help.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to including these changes and modification.
Claims (11)
1. a graph testing method, is characterized in that, comprising:
Utilize image collecting device to gather figure;
The figure of described collection and test pattern are carried out overlapping;
Choose the region of setting, and calculate the coverage rate of the figure gathering described in the region of described setting to described test pattern;
Judged the quality of the technique of this figure according to described coverage rate.
2. graph testing method as claimed in claim 1, is characterized in that, the figure of described collection and test pattern are carried out overlapping after, before choosing the region of setting, also need the figure of described collection to process.
3. graph testing method as claimed in claim 2, is characterized in that, the described figure to described collection is processed and comprised one dimension region is processed.
4. graph testing method as claimed in claim 1, is characterized in that, described figure harvester is characteristic size scanning electron microscopy.
5. graph testing method as claimed in claim 1, is characterized in that, the figure of described collection is on-chip figure.
6. graph testing method as claimed in claim 5, is characterized in that, the substrate of the same structure that the figure of described collection makes from different process.
7. graph testing method as claimed in claim 6, is characterized in that, obtains block diagram according to described coverage rate, judges the quality of different process.
8. graph testing method as claimed in claim 5, is characterized in that, the figure of described collection is from same substrate.
9. graph testing method as claimed in claim 8, is characterized in that, obtains block diagram according to described coverage rate, judges that this technique is to making the quality of difform structure.
10. graph testing method as claimed in claim 1, is characterized in that, the region of described setting comprises 2 dimensional region.
11. graph testing methods as claimed in claim 10, is characterized in that, employing is chosen framework and chosen described 2 dimensional region from the figure of described collection and the point of contact place of test pattern.
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| CN201210484780.2A CN103839847B (en) | 2012-11-23 | 2012-11-23 | Graph testing method |
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| CN201210484780.2A CN103839847B (en) | 2012-11-23 | 2012-11-23 | Graph testing method |
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| CN103839847B CN103839847B (en) | 2017-09-26 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110544640A (en) * | 2018-05-28 | 2019-12-06 | 长鑫存储技术有限公司 | method and apparatus for inspecting semiconductor substrate |
| CN111106054A (en) * | 2019-12-05 | 2020-05-05 | 福建省福联集成电路有限公司 | Method for prejudging wafer calibration value and storage medium |
| CN117393451A (en) * | 2023-12-07 | 2024-01-12 | 无锡卓海科技股份有限公司 | Method and system for measuring average curvature radius of wafer surface |
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| KR20090008846A (en) * | 2007-07-19 | 2009-01-22 | 주식회사 동부하이텍 | Optical proximity correction model fitting system and data processing method |
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| CN1205545A (en) * | 1997-07-11 | 1999-01-20 | 冲电气工业株式会社 | Figure measuring setting and method for measuring circuit figure dimensional accuracy and overlapping accuracy |
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| US20060085772A1 (en) * | 2004-10-15 | 2006-04-20 | Youping Zhang | Model-based pattern characterization to generate rules for rule-model-based hybrid optical proximity correction |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110544640A (en) * | 2018-05-28 | 2019-12-06 | 长鑫存储技术有限公司 | method and apparatus for inspecting semiconductor substrate |
| CN111106054A (en) * | 2019-12-05 | 2020-05-05 | 福建省福联集成电路有限公司 | Method for prejudging wafer calibration value and storage medium |
| CN111106054B (en) * | 2019-12-05 | 2022-08-12 | 福建省福联集成电路有限公司 | Method for prejudging wafer calibration value and storage medium |
| CN117393451A (en) * | 2023-12-07 | 2024-01-12 | 无锡卓海科技股份有限公司 | Method and system for measuring average curvature radius of wafer surface |
| CN117393451B (en) * | 2023-12-07 | 2024-03-26 | 无锡卓海科技股份有限公司 | Method and system for measuring average curvature radius of wafer surface |
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