CN102253907B - Super input-output module, computer system and control method thereof - Google Patents
Super input-output module, computer system and control method thereof Download PDFInfo
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- CN102253907B CN102253907B CN201010185285.2A CN201010185285A CN102253907B CN 102253907 B CN102253907 B CN 102253907B CN 201010185285 A CN201010185285 A CN 201010185285A CN 102253907 B CN102253907 B CN 102253907B
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Abstract
The embodiment of the invention discloses a super input-output module, a computer system and a control method thereof, which are used for controlling at least input-output port of the computer system. The super input-output module comprises a controller, a signal detector and a selector. The controller supports a function corresponding to the input-output port. The signal detector receives an input signal from the input-output port, detects whether the input signal has an identification code, and generates a selection signal according to the identification code when the signal detector detects the identification code. The selector receives the selection signal and selectively provides the input signal to one of the controller and a function circuit of the computer system according to the selection signal. According to the embodiment of the invention, a user can directly carry out operations such as control, debug and burn on elements inside the computer system.
Description
Technical field
The present invention relates to the super input-output module of computer system, relate to especially the method that uses super input-output module to control element in computer system.
Background technology
At present, the data of part computer system execution boot program are in tandem perimeter interface (serial peripheral interface, the SPI) flash memory that is stored in computer system.Therefore,, in the time that the Data Update in flash memory is failed, Maintenance Engineer must first take the host machine casing of computer system apart, and SPI flash memory sealing-off on motherboard is unloaded.Then, Maintenance Engineer can utilize cd-rom recorder to carry out burning to the SPI flash memory under sealing-off, to carry out Data Update.Then, the SPI flash memory that Maintenance Engineer can complete burning welds back on motherboard, puts in back the host machine casing of computer system.Therefore, Maintenance Engineer need to carry out above-mentioned loaded down with trivial details step and could upgrade the data of SPI flash memory traditionally.In addition, if sealing-off or the baulk of welding back SPI flash memory can cause computer system normally to work.
Therefore, need a kind of control method can be in the case of not loading and unloading the host machine casing of computer system, to computer system inner member control, the action such as debug or burning.
Summary of the invention
The embodiment of the present invention provides a kind of super input-output module, in order to control at least one input/output port of a computer system.Above-mentioned super input-output module comprises: a controller, in order to support the function corresponding to above-mentioned input/output port; One signal detector, in order to receive the input signal from above-mentioned input/output port, and detects in above-mentioned input signal whether have an identification code, in the time that above-mentioned signal detector detects above-mentioned identification code, produces one select signal according to above-mentioned identification code; And a selector switch, receives above-mentioned selection signal and the one of above-mentioned input signal to a functional circuit of above-mentioned controller and above-mentioned computer system is optionally provided accordingly.
Moreover the embodiment of the present invention provides a kind of computer system, comprising: at least one input/output port, in order to receive an input signal; One super input-output module; And, a functional circuit.Above-mentioned super input-output module comprises: a controller, in order to support the function corresponding to above-mentioned input/output port; One signal detector, in order to detect in above-mentioned input signal whether have an identification code, in the time that above-mentioned signal detector detects above-mentioned identification code, will produce one according to above-mentioned identification code and select signal; And, a selector switch.Above-mentioned selector switch, according to above-mentioned selection signal, optionally provides the one of above-mentioned input signal to above-mentioned controller and above-mentioned functions circuit.
Moreover the embodiment of the present invention provides a kind of control method, be applicable to have a computer system of a super I/O chip.Above-mentioned control method comprises: via an input/output port of above-mentioned computer system, receive one first input signal, wherein above-mentioned input/output port is coupled to above-mentioned super I/O chip; Detect the identification code of above-mentioned the first input signal; And, according to the identification code of above-mentioned the first input signal detecting, optionally provide the one of above-mentioned the first input signal to controller and a functional circuit.Above-mentioned controller is arranged in above-mentioned super I/O chip and supports the function corresponding to above-mentioned input/output port.
By the content described in the above embodiment of the present invention, user can be directly to computer system inner member control, the action of debug and burning.
Brief description of the drawings
Accompanying drawing described herein is used to provide a further understanding of the present invention, forms the application's a part, does not form limitation of the invention.In the accompanying drawings:
Fig. 1 shows according to the computer system described in one embodiment of the invention;
Fig. 2 shows according to the identification code table described in one embodiment of the invention, and it describes the corresponding identification code of different circuit in computer system; And
Fig. 3 shows according to the control method described in one embodiment of the invention, is applicable to have the computer system of super I/O chip.
Drawing reference numeral:
100～computer system; 110～input/output port;
120～super input-output module; 122～signal detector;
124～selector switch; 126～controller;
130～SPI flash memory; 140～jtag circuit;
150～general asynchronous receiver transmitter;
160～mouse; 170～simulator;
Sel～selection signal; And Sin～input signal.
Embodiment
For above and other object of the present invention, feature and advantage can be become apparent, cited below particularly go out embodiment, and coordinate accompanying drawing, be described in detail below:
Embodiment:
In as the computer system of desktop computer, notebook computer etc., super input and output (Super I/O) module comprises different input/output control unit interior, it can control respectively the PS/2 port, sequence port of computer system, the interface such as port, game port side by side, to communicate with the peripheral device of computer system.Aforesaid input/output control unit for example can be PS/2 port controller, sequence port controller, port controller arranged side by side, game port controller, wherein, PS/2 port controller can be used to control the keyboard and the mouse that link with PS/2, and port controller can be used to the printer of controlling with port links side by side side by side.
Fig. 1 shows according to the computer system 100 described in one embodiment of the invention.Computer system 100 comprises input/output port 110, super input-output module (super I/O) 120, tandem perimeter interface (SPI) flash memory 130, (the Joint Test Action Group of joint test working group, JTAG) circuit/bus 140 and general asynchronous receiver transmitter (Universal asynchronous receiver/transmitter, UART) 150.Super input-output module 120 is arranged in a super I/O chip, and wherein super input-output module 120 comprises signal detector 122, selector switch 124 and the controller 126 corresponding to input/output port 110.For instance, input/output port 110 can be the PS/2 port that connects mouse and keyboard, and controller 126 can be PS/2 port controller, be used for being received from the signal (for example data DATA and clock pulse CLK) of mouse 160 and keyboard 180 and processing.In this embodiment, although be to illustrate as example with PS/2 port, so it is not in order to limit the present invention.In another embodiment, input/output port 110 can be other input/output port such as the sequence port of computer system 100, port arranged side by side, game port, and controller 126 can be according to the classification of input/output port 110 other input/output port controllers such as sequence port controller, port controller arranged side by side, game port controller.In addition, for the purpose of simplifying the description, other circuit such as the central processing unit of computer system 100, north bridge chips, South Bridge chip, power module (not shown) will not further describe.
In Fig. 1, in the time receiving input signal Si n via input/output port 110, signal detector 122 can first judge whether input signal Si n has specific identification code.For instance, if while being connected in input/output port 110 for simulator 170, simulator 170 can provide the signal with specific identification code to computer system 100 via input/output port 110, so as to the circuit in computer system 100 control, the action such as debug or burning.In this embodiment, simulator 170 can be controlled SPI flash memory 130, jtag circuit 140 and general asynchronous receiver transmitter 150 via input/output port 110.If while being connected in input/output port 110 for mouse 160 and/or keyboard, just do not there is specific identification code by the received signal of input/output port 110.So signal detector 122 will not provide selects signal Sel to selector switch 124, in this case, selector switch 124 will maintain the function choosing-item of last control, debug or burning, and does not carry out the switching of any function.
With reference to figure 2, Fig. 2 shows according to the identification code table described in one embodiment of the invention, and it describes the corresponding identification code of different circuit in computer system.
With reference to figure 1 and Fig. 2, in the time that simulator 170 will carry out burning to SPI flash memory 130 through input/output port 110, can provide the input signal Si n with identification code ID1 to super input-output module 120 simultaneously.Then, signal detector 122 can judge whether input signal Si n has specific identification code, and the identification code that identifies input signal Si n is ID1.Then, signal detector 122 can be controlled selector switch 124 according to identification code ID1 generation selection signal Sel and switch, to input signal Si n is provided to SPI flash memory 130, but not input signal Si n is provided to controller 126 circuit such as grade.In one embodiment, selector switch 124 can be a de-multiplexer (demultiplexer).Therefore,, before signal detector 122 not yet identifies next identification code, the selector switch 124 in the future signal of self simulation device 170 is orderly sent to SPI flash memory 130.So user just can, in the case of the casing of not dismounting computer system 100, for example, upgrade the data (Basic Input or Output System (BIOS) (BIOS)) that are stored in SPI flash memory 130.Similarly, simulator 170 also can transmit the input signal Si n with identification code ID2 to super input-output module 120.Then, it is ID2 that signal detector 122 can identify this identification code, and controls selector switch 124 and will provide to jtag circuit 140 from the signal of input/output port 110, to see through jtag circuit 140, the partial circuit in computer system 100 is carried out to debug.Moreover simulator 170 also can transmit the input signal Si n with identification code ID3 to super input-output module 120.Then, it is ID3 that signal detector 122 can identify this identification code, and control selector switch 124 by provide from the signal of input/output port 110 to asynchronous receiver transmitter 150 to communicate.Aforesaid jtag circuit 140 also can be arranged in super input-output module 120, carries out debug in order to the microcontroller in super input-output module (not illustrating).Same, aforesaid general asynchronous reception transferring and receiving apparatus 150 also can be arranged in super input-output module 120.
In one embodiment, before specific identification code is provided, simulator 170 can first transmit particular detection code to super input-output module 120.Error detecting code for example can be cyclic redundancy check code (CyclicRedundancy Check, CRC), and to accelerate the judgement speed of signal detector 122 to specific identification code, wherein the length of particular detection code can determine according to practical application.For instance, if particular detection code is the CRC16 code of 64k position, signal detector 122 can, after receiving above-mentioned CRC16 code, just can further judge input signal Si n, to identify the identification code of input signal Si n.Therefore,, in the situation that not receiving CRC16 code, signal detector 122 can not judge the identification code of input signal Si n.In Fig. 1, super input-output module 120, SPI flash memory 130, jtag circuit 140 and general asynchronous receiver transmitter 150 can be arranged in different chips.But in one embodiment, super input-output module 120 can be arranged in same chip with other circuit of 170 wish controls of simulator.
It should be noted that, simulator 170 is after completing the actions such as control, debug or burning to other circuit, can be before the link of interruption and computer system 100, first transmit the input signal Si n with identification code ID0 to super input-output module 120, to control selector switch 124, follow-up input signal is sent to controller 126, makes the energy normal running after again linking computer system 100 of mouse 160 or/and keyboard 180.
Fig. 3 shows according to the control method described in one embodiment of the invention, is applicable to have the computer system of super I/O chip.First, at step S302, via computer system input/output port (for example Fig. 1 110) receive input signal Si n.Then,, at step S304, signal detector in super I/O chip (for example Fig. 1 122) can detect input signal Si n, to judge whether input signal Si n has particular detection code.If not, the selector switch in super I/O chip (for example Fig. 1 124) can directly be sent to input signal Si n previously selected functional circuit to carry out subsequent treatment (step S306).Otherwise if input signal Si n has particular detection code, the signal detector in super I/O chip can continue to identify the identification code (step S308) of input signal Si n.Then, in super I/O chip, selector switch be controlled/be switched to signal detector can according to above-mentioned identification code, make selector switch input signal Si n can be sent to corresponding in the functional circuit of above-mentioned identification code to carry out subsequent treatment (step S310).
Although the present invention discloses as above with embodiment; so it is not in order to limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on the claim scope person of defining.
Claims (9)
1. a super input-output module, is characterized in that, in order to control at least one input/output port of a computer system, described super input-output module comprises:
One controller, in order to support the function corresponding to described input/output port;
One signal detector, in order to receive the input signal from described input/output port, and detect in described input signal whether there is a specific identification code, in the time that described signal detector detects described identification code, produce one according to described identification code and select signal; And
One selector switch, receives described selection signal and the one of described input signal to a functional circuit of described controller and described computer system is optionally provided accordingly;
Wherein, described signal detector judges whether described input signal has a particular detection code, and in the time that described input signal has described particular detection code, described signal detector more judges whether described input signal has described specific identification code, to produce described selection signal.
2. super input-output module as claimed in claim 1, it is characterized in that, described controller is the one of a sequence port controller, a port controller arranged side by side, a PS/2 port controller and a game port controller, in order to control the input/output port corresponding with described controller.
3. super input-output module as claimed in claim 2, is characterized in that, a tandem perimeter interface flash memory, a joint test working group circuit or a general asynchronous receiver transmitter that described functional circuit is described computer system.
4. a computer system, is characterized in that, described computer system comprises:
At least one input/output port, in order to receive an input signal;
One super input-output module, comprising:
One controller, in order to support the function corresponding to described input/output port;
One signal detector, in order to detect in described input signal whether have an identification code, in the time that described signal detector detects described identification code, will produce one according to described identification code and select signal; And
One selector switch; And
One functional circuit,
Wherein said selector switch, according to described selection signal, optionally provides the one of described input signal to described controller and described functional circuit;
Wherein, described signal detector judges whether described input signal has a particular detection code, and in the time that described input signal has described particular detection code, described signal detector more detects the described identification code of described input signal, to produce described selection signal.
5. computer system as claimed in claim 4, is characterized in that, described functional circuit is a tandem perimeter interface flash memory, a joint test working group circuit or a general asynchronous receiver transmitter.
6. computer system as claimed in claim 4, is characterized in that, described functional circuit is arranged at outside described super input-output module.
7. a control method, is characterized in that, described control method is applicable to have a computer system of a super I/O chip, comprising:
Via an input/output port of described computer system, receive one first input signal, wherein said input/output port is coupled to described super I/O chip;
Detect the identification code of described the first input signal; And
According to the identification code of described the first input signal detecting, the one of described the first input signal to controller and a functional circuit is optionally provided,
Wherein said controller is arranged in described super I/O chip and supports the function corresponding to described input/output port;
Wherein, described control method more comprises:
Via the described input/output port of described computer system, receive one second input signal;
Judge whether described the second input signal has particular detection code;
In the time that described the second input signal does not have described particular detection code, provide described the second input signal to previously selected described controller and the one of described functional circuit.
8. control method as claimed in claim 7, is characterized in that, described control method is more included in and detects before described identification code, detects described the first input signal and whether has a particular detection code.
9. control method as claimed in claim 7, is characterized in that, described control method more comprises:
In the time that described the second input signal has described particular detection code, detect the identification code of described the second input signal; And
According to the identification code of described the second input signal detecting, optionally provide the one of described the second input signal to described controller and described functional circuit.
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| CN201010185285.2A CN102253907B (en) | 2010-05-20 | 2010-05-20 | Super input-output module, computer system and control method thereof |
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| CN201010185285.2A CN102253907B (en) | 2010-05-20 | 2010-05-20 | Super input-output module, computer system and control method thereof |
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| CN102253907B true CN102253907B (en) | 2014-06-18 |
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| CN103425607B (en) * | 2012-05-23 | 2017-02-01 | 神讯电脑(昆山)有限公司 | USB (universal serial bus) burning device for directly burning SPI ROM (serial peripheral interface read only memory) on mainboard |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4939732A (en) * | 1987-05-29 | 1990-07-03 | Fujitsu Limited | Method and system for checking errors of signal being transferred through transmission line |
| CN1245572A (en) * | 1997-10-30 | 2000-02-23 | 全昌龙 | Computer security device |
| US6792378B2 (en) * | 2002-11-21 | 2004-09-14 | Via Technologies, Inc. | Method for testing I/O ports of a computer motherboard |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4939732A (en) * | 1987-05-29 | 1990-07-03 | Fujitsu Limited | Method and system for checking errors of signal being transferred through transmission line |
| CN1245572A (en) * | 1997-10-30 | 2000-02-23 | 全昌龙 | Computer security device |
| US6792378B2 (en) * | 2002-11-21 | 2004-09-14 | Via Technologies, Inc. | Method for testing I/O ports of a computer motherboard |
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